| Message ID | alpine.DEB.2.20.2311171722590.5892@tpp.orcam.me.uk |
|---|---|
| State | New |
| Headers | show |
| Series | RISC-V: Various if-conversion fixes and improvements | expand |
LGTM On Sun, Nov 19, 2023 at 1:39 PM Maciej W. Rozycki <macro@embecosm.com> wrote: > > Update `riscv_expand_conditional_move' and handle the missing GEU and > LEU operators there, avoiding an extraneous conditional set operation, > such as with this output: > > sgtu a0,a0,a1 > seqz a1,a0 > czero.eqz a3,a3,a1 > czero.nez a1,a2,a1 > or a0,a1,a3 > > produced when optimizing for Zicond targets from: > > int > movsigtu (int w, int x, int y, int z) > { > return w > x ? y : z; > } > > These operators can be inverted producing optimal code such as this: > > sgtu a1,a0,a1 > czero.nez a3,a3,a1 > czero.eqz a1,a2,a1 > or a0,a1,a3 > > which this change causes to happen. > > gcc/ > * config/riscv/riscv.cc (riscv_expand_conditional_move): Also > invert the condition for GEU and LEU. > --- > gcc/config/riscv/riscv.cc | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > gcc-riscv-expand-conditional-move-geu-leu.diff > Index: gcc/gcc/config/riscv/riscv.cc > =================================================================== > --- gcc.orig/gcc/config/riscv/riscv.cc > +++ gcc/gcc/config/riscv/riscv.cc > @@ -4142,7 +4142,7 @@ riscv_expand_conditional_move (rtx dest, > /* If riscv_expand_int_scc inverts the condition, then it will > flip the value of INVERT. We need to know where so that > we can adjust it for our needs. */ > - if (code == LE || code == GE) > + if (code == LE || code == LEU || code == GE || code == GEU) > invert_ptr = &invert; > > /* Emit an scc like instruction into a temporary
Index: gcc/gcc/config/riscv/riscv.cc =================================================================== --- gcc.orig/gcc/config/riscv/riscv.cc +++ gcc/gcc/config/riscv/riscv.cc @@ -4142,7 +4142,7 @@ riscv_expand_conditional_move (rtx dest, /* If riscv_expand_int_scc inverts the condition, then it will flip the value of INVERT. We need to know where so that we can adjust it for our needs. */ - if (code == LE || code == GE) + if (code == LE || code == LEU || code == GE || code == GEU) invert_ptr = &invert; /* Emit an scc like instruction into a temporary
Update `riscv_expand_conditional_move' and handle the missing GEU and LEU operators there, avoiding an extraneous conditional set operation, such as with this output: sgtu a0,a0,a1 seqz a1,a0 czero.eqz a3,a3,a1 czero.nez a1,a2,a1 or a0,a1,a3 produced when optimizing for Zicond targets from: int movsigtu (int w, int x, int y, int z) { return w > x ? y : z; } These operators can be inverted producing optimal code such as this: sgtu a1,a0,a1 czero.nez a3,a3,a1 czero.eqz a1,a2,a1 or a0,a1,a3 which this change causes to happen. gcc/ * config/riscv/riscv.cc (riscv_expand_conditional_move): Also invert the condition for GEU and LEU. --- gcc/config/riscv/riscv.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) gcc-riscv-expand-conditional-move-geu-leu.diff