diff mbox series

[06/44] RISC-V: Avoid repeated GET_MODE calls in `riscv_expand_conditional_move'

Message ID alpine.DEB.2.20.2311171423450.5892@tpp.orcam.me.uk
State New
Headers show
Series RISC-V: Various if-conversion fixes and improvements | expand

Commit Message

Maciej W. Rozycki Nov. 19, 2023, 5:36 a.m. UTC 
Use `mode0' and `mode1' shorthands respectively for `GET_MODE (op0)' and 
`GET_MODE (op1)' to improve code readability.

	gcc/
	* config/riscv/riscv.cc (riscv_expand_conditional_move): Use 
	`mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'.
---
 gcc/config/riscv/riscv.cc |   11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

gcc-riscv-expand-conditional-move-mode-cmp.diff

Comments

Kito Cheng Nov. 19, 2023, 5:55 a.m. UTC | #1 
LGTM

On Sun, Nov 19, 2023 at 1:36 PM Maciej W. Rozycki <macro@embecosm.com> wrote:
>
> Use `mode0' and `mode1' shorthands respectively for `GET_MODE (op0)' and
> `GET_MODE (op1)' to improve code readability.
>
>         gcc/
>         * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
>         `mode0' and `mode1' for `GET_MODE (op0)' and `GET_MODE (op1)'.
> ---
>  gcc/config/riscv/riscv.cc |   11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
>
> gcc-riscv-expand-conditional-move-mode-cmp.diff
> Index: gcc/gcc/config/riscv/riscv.cc
> ===================================================================
> --- gcc.orig/gcc/config/riscv/riscv.cc
> +++ gcc/gcc/config/riscv/riscv.cc
> @@ -4007,12 +4007,15 @@ riscv_expand_conditional_move (rtx dest,
>    else if (TARGET_ZICOND_LIKE
>            && GET_MODE_CLASS (mode) == MODE_INT)
>      {
> +      machine_mode mode0 = GET_MODE (op0);
> +      machine_mode mode1 = GET_MODE (op1);
> +
>        /* The comparison must be comparing WORD_MODE objects.   We must
>          enforce that so that we don't strip away a sign_extension
>          thinking it is unnecessary.  We might consider using
>          riscv_extend_operands if they are not already properly extended.  */
> -      if ((GET_MODE (op0) != word_mode && GET_MODE (op0) != VOIDmode)
> -         || (GET_MODE (op1) != word_mode && GET_MODE (op1) != VOIDmode))
> +      if ((mode0 != word_mode && mode0 != VOIDmode)
> +         || (mode1 != word_mode && mode1 != VOIDmode))
>         return false;
>
>        /* Canonicalize the comparison.  It must be an equality comparison
> @@ -4032,9 +4035,9 @@ riscv_expand_conditional_move (rtx dest,
>           rtx tmp = gen_reg_rtx (word_mode);
>
>           /* We can support both FP and integer conditional moves.  */
> -         if (INTEGRAL_MODE_P (GET_MODE (XEXP (op, 0))))
> +         if (INTEGRAL_MODE_P (mode0))
>             riscv_expand_int_scc (tmp, code, op0, op1, invert_ptr);
> -         else if (FLOAT_MODE_P (GET_MODE (XEXP (op, 0)))
> +         else if (FLOAT_MODE_P (mode0)
>                    && fp_scc_comparison (op, GET_MODE (op)))
>             riscv_expand_float_scc (tmp, code, op0, op1);
>           else
diff mbox series

Patch

Index: gcc/gcc/config/riscv/riscv.cc
===================================================================
--- gcc.orig/gcc/config/riscv/riscv.cc
+++ gcc/gcc/config/riscv/riscv.cc
@@ -4007,12 +4007,15 @@  riscv_expand_conditional_move (rtx dest,
   else if (TARGET_ZICOND_LIKE
 	   && GET_MODE_CLASS (mode) == MODE_INT)
     {
+      machine_mode mode0 = GET_MODE (op0);
+      machine_mode mode1 = GET_MODE (op1);
+
       /* The comparison must be comparing WORD_MODE objects.   We must
 	 enforce that so that we don't strip away a sign_extension
 	 thinking it is unnecessary.  We might consider using
 	 riscv_extend_operands if they are not already properly extended.  */
-      if ((GET_MODE (op0) != word_mode && GET_MODE (op0) != VOIDmode)
-	  || (GET_MODE (op1) != word_mode && GET_MODE (op1) != VOIDmode))
+      if ((mode0 != word_mode && mode0 != VOIDmode)
+	  || (mode1 != word_mode && mode1 != VOIDmode))
 	return false;
 
       /* Canonicalize the comparison.  It must be an equality comparison
@@ -4032,9 +4035,9 @@  riscv_expand_conditional_move (rtx dest,
 	  rtx tmp = gen_reg_rtx (word_mode);
 
 	  /* We can support both FP and integer conditional moves.  */
-	  if (INTEGRAL_MODE_P (GET_MODE (XEXP (op, 0))))
+	  if (INTEGRAL_MODE_P (mode0))
 	    riscv_expand_int_scc (tmp, code, op0, op1, invert_ptr);
-	  else if (FLOAT_MODE_P (GET_MODE (XEXP (op, 0)))
+	  else if (FLOAT_MODE_P (mode0)
 		   && fp_scc_comparison (op, GET_MODE (op)))
 	    riscv_expand_float_scc (tmp, code, op0, op1);
 	  else