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Add RISC-V Hypervisor Extension v0.4
| State =
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| 27 patches
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Nobody
jgarzik
arnd
ymano
smfrench
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tseliot
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amitk
awhitcroft
mst
dayangkun
jwboyer
jwboyer
colinking
colinking
azummo
dwmw2
rtg
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ms
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zecke
__damien__
luka
luka
prafulla@marvell.com
cyrus
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nico
dedeckeh
dedeckeh
yousong
yousong
tomcwarren
mb
mrchuck
vineetg76
computersforpeace
Noltari
Noltari
patrick_delaunay
ee07b291
ldir
ldir
stefanct
zhouhan
carldani
blp
ffainelli
ffainelli
regXboi
bbrezillon
pravin
mkp
jpettit
mkresin
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thess
thess
fbarrat
fbarrat
phil
linville
jesse
tjaalton
esben
abrodkin
abrodkin
diproiettod
tbot
stephenfin
vriera
darball1
sammj
ajd
jogo
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bhelgaas
blogic
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tagr
tagr
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ptomsich
agraf
joestringer
davem
davem
davem
mwalle
naveen
pchotard
pepe2k
pepe2k
arj
arj
andmur01
amitay
matttbe
pabeni
istokes
aparcar
Ansuel
goliath
martineau
tytso
danielschwierzeck
hs
mariosix
dcaratti
ovsrobot
ovsrobot
aserdean
XiaoYang
khem
mkorpershoek
marex
tpetazzoni
liwang
robimarko
apritzel
danielhb
groug
mmichelson
npiggin
pareddja
atishp
netdrv
mkubecek
stintel
stintel
jkicinski
cpitchen
maximeh
dsa
jstancek
pm215
bpf
jonhunter
shettyg
lorpie01
acelan
wigyori
wigyori
apopple
dja
alexhung
lynxis
lynxis
brgl
brgl
peda
akodanev
narmstrong
981213
0andriy
chunkeey
snowpatch_ozlabs
snowpatch_ozlabs
snowpatch_ozlabs
aivanov
atishp04
shemminger
blocktrron
monstr
vigneshr
mraynal
horms
stewart
stewart
freenix
rmilecki
rmilecki
rfried
kevery
akumar
ehristev
jacmet
wsa
Jaehoon
rsalvaterra
adrianschmutzler
sjg
hegdevasant
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prom
bmeng
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ukleinek
ukleinek
ag
xypron
metan
kabel
ivanhu
arbab
abelloni
chleroy
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pablo
pablo
svanheule
Hauke
Hauke
legoater
legoater
legoater
rw
rw
wbx
trini
bjonglez
ynezz
aik
sbabic
sbabic
pevik
xback
xback
richiejp
dangole
dangole
forty
next_ghost
anuppatel
anuppatel
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rgrimm
acer
segher
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jms
jms
jms
festevam
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Andes
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jk
jk
jk
jk
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linusw
linusw
ymorin
ymorin
numans
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tambarus
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apalos
dceara
strlen
strlen
pbrobinson
imaximets
spectrum
cazzacarna
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aldot
TIENFONG
mpe
ktraynor
arnout
nbd
nbd
calebccff
robh
anguy11
paulus
jm
stroese
Apply
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v1,28/28] target/riscv: Allow enabling the Hypervisor extension
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,27/28] target/riscv: Add the MSTATUS_MPV_ISSET helper macro
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,26/28] target/riscv: Add support for the 32-bit MSTATUSH CSR
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,25/28] target/riscv: Call the second stage MMU in virtualisation mode
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,24/28] target/riscv: Implement second stage MMU
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,23/28] target/riscv: Allow specifying number of MMU stages
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,22/28] target/riscv: Allow specifying MMU stage
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,21/28] target/riscv: Respect MPRV and SPRV for floating point ops
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,20/28] target/riscv: Mark both sstatus and vsstatus as dirty
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,19/28] target/riscv: Disable guest FP support based on virtual status
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,18/28] target/riscv: Add hfence instructions
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,17/28] target/riscv: Add Hypervisor trap return support
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,16/28] target/riscv: Add hypvervisor trap support
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,15/28] riscv: plic: Always set sip.SEIP bit for HS
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,14/28] target/riscv: Generate illegal instruction on WFI when V=1
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,13/28] target/ricsv: Flush the TLB on virtulisation mode changes
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,12/28] target/riscv: Add support for virtual interrupt setting
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,11/28] target/riscv: Add background register swapping function
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,10/28] target/riscv: Convert mie and mstatus to pointers
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,09/28] target/riscv: Add Hypervisor virtual CSRs accesses
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,08/28] target/riscv: Add Hypervisor CSR access functions
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,07/28] target/riscv: Dump Hypervisor registers if enabled
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,06/28] target/riscv: Print priv and virt in disas log
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,05/28] target/riscv: Add the Hypervisor CSRs to CPUState
Add RISC-V Hypervisor Extension v0.4
- - 2 -
-
-
-
2019-08-23
Alistair Francis
New
[v1,04/28] target/riscv: Fix CSR perm checking for HS mode
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,03/28] target/riscv: Add the force HS exception mode
Add RISC-V Hypervisor Extension v0.4
- - - -
-
-
-
2019-08-23
Alistair Francis
New
[v1,01/28] target/riscv: Add the Hypervisor extension
Add RISC-V Hypervisor Extension v0.4
- - 1 -
-
-
-
2019-08-23
Alistair Francis
New