Message ID | 4f1ff6ef5fb2baa3c461d16b5669d3bd829733a0.1566603412.git.alistair.francis@wdc.com |
---|---|
State | New |
Headers | show |
Series | Add RISC-V Hypervisor Extension v0.4 | expand |
On Fri, 23 Aug 2019 16:38:39 PDT (-0700), Alistair Francis wrote: > When the Hypervisor extension is in use we only enable floating point > support when both status and vsstatus have enabled floating point > support. > > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> > --- > target/riscv/cpu_helper.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c > index 17eec6217b..098873c83e 100644 > --- a/target/riscv/cpu_helper.c > +++ b/target/riscv/cpu_helper.c > @@ -90,6 +90,9 @@ bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request) > bool riscv_cpu_fp_enabled(CPURISCVState *env) > { > if (*env->mstatus & MSTATUS_FS) { > + if (riscv_cpu_virt_enabled(env) && !(env->vsstatus & MSTATUS_FS)) { > + return false; > + } > return true; > } Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 17eec6217b..098873c83e 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -90,6 +90,9 @@ bool riscv_cpu_exec_interrupt(CPUState *cs, int interrupt_request) bool riscv_cpu_fp_enabled(CPURISCVState *env) { if (*env->mstatus & MSTATUS_FS) { + if (riscv_cpu_virt_enabled(env) && !(env->vsstatus & MSTATUS_FS)) { + return false; + } return true; }
When the Hypervisor extension is in use we only enable floating point support when both status and vsstatus have enabled floating point support. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> --- target/riscv/cpu_helper.c | 3 +++ 1 file changed, 3 insertions(+)