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Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[v2] RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512.
[v2] RISC-V: Fix the riscv_legitimize_poly_move issue on targets where the minimal VLEN exceeds 512.
- - - -
-
-
-
2023-10-12
Kito Cheng
New
[v2] RISC-V: Fix sync.md and riscv.cc whitespace errors
[v2] RISC-V: Fix sync.md and riscv.cc whitespace errors
- - - -
-
-
-
2023-04-26
Patrick O'Neill
New
[v2] RISC-V: Fix regression of -fzero-call-used-regs=all
[v2] RISC-V: Fix regression of -fzero-call-used-regs=all
- - - -
-
-
-
2023-04-07
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Fix one typo in autovec.md pattern comment
[v2] RISC-V: Fix one typo in autovec.md pattern comment
- - - -
-
-
-
2023-08-24
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Fix one bug for floating-point static frm
[v2] RISC-V: Fix one bug for floating-point static frm
- - - -
-
-
-
2023-07-04
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
[v2] RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init
- - - -
-
-
-
2023-09-24
Li, Pan2
New
[v2] RISC-V: Fix dynamic lmul tests depended on abi
[v2] RISC-V: Fix dynamic lmul tests depended on abi
- - - -
-
-
-
2023-12-13
demin.han
New
[v2] RISC-V: Fix Zicond ICE on large constants
[v2] RISC-V: Fix Zicond ICE on large constants
- - - -
-
-
-
2023-09-05
Tsukasa OI
New
[v2] RISC-V: Fix VWEXTF iterator requirement
[v2] RISC-V: Fix VWEXTF iterator requirement
- - - -
-
-
-
2023-06-19
Li Xu
New
[v2] RISC-V: Fix RVV frm run test failure on RV32
[v2] RISC-V: Fix RVV frm run test failure on RV32
- - - -
-
-
-
2023-07-18
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Fix ICE of RVV vget/vset intrinsic[PR111935]
[v2] RISC-V: Fix ICE of RVV vget/vset intrinsic[PR111935]
- - - -
-
-
-
2023-10-24
Li Xu
New
[v2] RISC-V: Fix ICE in riscv vector costs
[v2] RISC-V: Fix ICE in riscv vector costs
- - - -
-
-
-
2024-03-07
demin.han
New
[v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888]
[v2] RISC-V: Fix CTZ unnecessary sign extension [PR #106888]
- - - -
-
-
-
2023-05-08
Raphael Moreira Zinsly
New
[v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32
[v2] RISC-V: FAIL:g++.dg/torture/vshuf-v[2|4]di.C -Os (execution test) on RV32
- - - -
-
-
-
2023-12-05
Li Xu
New
[v2] RISC-V: Enable ztso tests on rv32
[v2] RISC-V: Enable ztso tests on rv32
- - - -
-
-
-
2023-10-31
Patrick O'Neill
New
[v2] RISC-V: Enable overlap-by-pieces in case of fast unaliged access
[v2] RISC-V: Enable overlap-by-pieces in case of fast unaliged access
- - - -
-
-
-
2021-07-22
Christoph Müllner
New
[v2] RISC-V: Enable Hoist to GCSE simple constants
[v2] RISC-V: Enable Hoist to GCSE simple constants
- - - -
-
-
-
2023-08-25
Vineet Gupta
New
[v2] RISC-V: Elimilate warning in class vcreate
[v2] RISC-V: Elimilate warning in class vcreate
- - - -
-
-
-
2023-09-12
Li Xu
New
[v2] RISC-V: Documnet the list of supported extensions
[v2] RISC-V: Documnet the list of supported extensions
- - - -
-
-
-
2024-01-19
Kito Cheng
New
[v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit
[v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit
- - - -
-
-
-
2023-12-04
Christoph Müllner
New
[v2] RISC-V: Clarify vlmax and length handling.
[v2] RISC-V: Clarify vlmax and length handling.
- - - -
-
-
-
2023-05-11
Robin Dapp
New
[v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention
[v2] RISC-V: Bugfix for vls mode aggregated in GPR calling convention
- - - -
-
-
-
2024-01-30
Li, Pan2
New
[v2] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32
[v2] RISC-V: Bugfix for vec_init repeating auto vectorization in RV32
- - - -
-
-
-
2023-06-14
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Bugfix for the const vector in single steps
[v2] RISC-V: Bugfix for the const vector in single steps
- - - -
-
-
-
2023-12-20
Li, Pan2
New
[v2] RISC-V: Bugfix for the RVV const vector
[v2] RISC-V: Bugfix for the RVV const vector
- - - -
-
-
-
2023-12-18
Li, Pan2
New
[v2] RISC-V: Bugfix for rvv bool mode precision adjustment
[v2] RISC-V: Bugfix for rvv bool mode precision adjustment
- - - -
-
-
-
2023-03-02
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Bugfix for resolve_overloaded_builtin[PR113420]
[v2] RISC-V: Bugfix for resolve_overloaded_builtin[PR113420]
- - - -
-
-
-
2024-01-22
Li Xu
New
[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
[v2] RISC-V: Bugfix for legitimize move when get vec mode in zve32f
- - - -
-
-
-
2023-12-01
Li, Pan2
New
[v2] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64
[v2] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64
- - - -
-
-
-
2023-06-19
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.
[v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.
- - - -
-
-
-
2023-03-29
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Bugfix for RVV integer reduction in ZVE32/64.
[v2] RISC-V: Bugfix for RVV integer reduction in ZVE32/64.
- - - -
-
-
-
2023-06-16
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Bugfix for RVV float reduction in ZVE32/64
[v2] RISC-V: Bugfix for RVV float reduction in ZVE32/64
- - - -
-
-
-
2023-06-18
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Bugfix for RTL check[PR111533]
[v2] RISC-V: Bugfix for RTL check[PR111533]
- - - -
-
-
-
2023-09-28
Li Xu
New
[v2] RISC-V: Bugfix ICE for __attribute__((target("arch=+v"))
[v2] RISC-V: Bugfix ICE for __attribute__((target("arch=+v"))
- - - -
-
-
-
2024-03-22
Li, Pan2
New
[v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU
[v2] RISC-V: Avoid redundant sign-extension for SImode SGE, SGEU, SLE, SLEU
- - - -
-
-
-
2022-11-28
Maciej W. Rozycki
New
[v2] RISC-V: Avoid calloc() poisoning on musl
[v2] RISC-V: Avoid calloc() poisoning on musl
- - - -
-
-
-
2023-03-11
Sam James
New
[v2] RISC-V: Allow vector constants in riscv_const_insns.
[v2] RISC-V: Allow vector constants in riscv_const_insns.
- - - -
-
-
-
2023-05-11
Robin Dapp
New
[v2] RISC-V: Allow Vector IOR(V1, NOT V1) optimization
[v2] RISC-V: Allow Vector IOR(V1, NOT V1) optimization
- - - -
-
-
-
2023-04-18
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization
[v2] RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization
- - - -
-
-
-
2023-04-19
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Allow RVV intrinsic for more function target
[v2] RISC-V: Allow RVV intrinsic for more function target
- - - -
-
-
-
2024-04-02
Li, Pan2
New
[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET
[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET
- - - -
-
-
-
2023-04-29
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR
[v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR
- - - -
-
-
-
2023-04-28
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Adjust floating point code gen for LTGT compare
[v2] RISC-V: Adjust floating point code gen for LTGT compare
- - - -
-
-
-
2020-02-21
Kito Cheng
New
[v2] RISC-V: Add xfail test case for wv insn register overlap
[v2] RISC-V: Add xfail test case for wv insn register overlap
- - - -
-
-
-
2024-04-20
Li, Pan2
New
[v2] RISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW
[v2] RISC-V: Add xfail test case for indexed load overlap with SRC EEW < DEST EEW
- - - -
-
-
-
2024-04-22
Li, Pan2
New
[v2] RISC-V: Add vectorized binops and insn_expander helpers.
[v2] RISC-V: Add vectorized binops and insn_expander helpers.
- - - -
-
-
-
2023-05-11
Robin Dapp
New
[v2] RISC-V: Add vector_scalar_shift_operand
[v2] RISC-V: Add vector_scalar_shift_operand
- - - -
-
-
-
2023-05-11
Palmer Dabbelt
New
[v2] RISC-V: Add test cases for the RVV mask insn shortcut.
[v2] RISC-V: Add test cases for the RVV mask insn shortcut.
- - - -
-
-
-
2023-04-14
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Add support for vector crypto extensions
[v2] RISC-V: Add support for vector crypto extensions
- - - -
-
-
-
2023-07-03
Christoph Müllner
New
[v2] RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)
[v2] RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)
- - - -
-
-
-
2022-11-27
Christoph Müllner
New
[v2] RISC-V: Add split pattern to generate SFB instructions. [PR113095]
[v2] RISC-V: Add split pattern to generate SFB instructions. [PR113095]
- - - -
-
-
-
2024-01-22
Monk Chiang
New
[v2] RISC-V: Add riscv_vector_cc function attribute
[v2] RISC-V: Add riscv_vector_cc function attribute
- - - -
-
-
-
2024-03-01
Li Xu
New
[v2] RISC-V: Add more tests for RVV floating-point FRM.
[v2] RISC-V: Add more tests for RVV floating-point FRM.
- - - -
-
-
-
2023-07-13
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Add more test cases for RVV FP16
[v2] RISC-V: Add more test cases for RVV FP16
- - - -
-
-
-
2023-06-08
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Add minimal support for 7 new unprivileged extensions
[v2] RISC-V: Add minimal support for 7 new unprivileged extensions
- - - -
-
-
-
2024-02-01
Monk Chiang
New
[v2] RISC-V: Add configure option: --with-multilib-config to flexible config multi-lib settings.
[v2] RISC-V: Add configure option: --with-multilib-config to flexible config multi-lib settings.
- - - -
-
-
-
2020-10-19
Kito Cheng
New
[v2] RISC-V: Add bext pattern for ZBS
[v2] RISC-V: Add bext pattern for ZBS
- - - -
-
-
-
2023-05-08
Raphael Moreira Zinsly
New
[v2] RISC-V: Add avail interface into function_group_info
[v2] RISC-V: Add avail interface into function_group_info
- - - -
-
-
-
2023-12-08
Feng Wang
New
[v2] RISC-V: Add autovectorization tests for binary integer, operations.
[v2] RISC-V: Add autovectorization tests for binary integer, operations.
- - - -
-
-
-
2023-05-11
Robin Dapp
New
[v2] RISC-V: Add autovec FP unary operations.
[v2] RISC-V: Add autovec FP unary operations.
- - - -
-
-
-
2023-06-15
Robin Dapp
New
[v2] RISC-V: Add autovec FP binary operations.
[v2] RISC-V: Add autovec FP binary operations.
- - - -
-
-
-
2023-06-15
Robin Dapp
New
[v2] RISC-V: Add ZVFHMIN extension to the -march= option
[v2] RISC-V: Add ZVFHMIN extension to the -march= option
- - - -
-
-
-
2023-05-29
Li, Pan2 via Gcc-patches
New
[v2] RISC-V: Add Z*inx imcompatible check in gcc.
[v2] RISC-V: Add Z*inx imcompatible check in gcc.
- - - -
-
-
-
2023-03-28
Jiawei
New
[v2] RISC-V/testsuite: constraint some of tests to hard_float
[v2] RISC-V/testsuite: constraint some of tests to hard_float
- - - -
-
-
-
2022-05-27
Vineet Gupta
New
[v2] RISC-V/testsuite/pr111466.c: update test and expected output
[v2] RISC-V/testsuite/pr111466.c: update test and expected output
- - - -
-
-
-
2023-10-17
Vineet Gupta
New
[v2] RISC-V modified add3 for large stack frame optimization [PR105733]
[v2] RISC-V modified add3 for large stack frame optimization [PR105733]
- - - -
-
-
-
2022-11-01
Kevin Lee
New
[v2] RISC-V missing __builtin_lceil and __builtin_lfloor
[v2] RISC-V missing __builtin_lceil and __builtin_lfloor
- - - -
-
-
-
2022-11-08
Kevin Lee
New
[v2] REE: PR rtl-optimization/100264: Handle more PARALLEL SET expressions
[v2] REE: PR rtl-optimization/100264: Handle more PARALLEL SET expressions
- - - -
-
-
-
2021-05-10
Christoph Müllner
New
[v2] Python testcases to check DWARF output
- - - -
-
-
-
2017-08-09
Pierre-Marie de Rodat
New
[v2] Print padding size when aligning struct member
[v2] Print padding size when aligning struct member
- - - -
-
-
-
2023-02-24
Vit Kabele
New
[v2] PowerPC: Add 'prefix' to the 'isa' attribute
[v2] PowerPC: Add 'prefix' to the 'isa' attribute
- - - -
-
-
-
2019-06-19
Michael Meissner
New
[v2] Performance/size improvement to single_use when matching GIMPLE.
[v2] Performance/size improvement to single_use when matching GIMPLE.
- - - -
-
-
-
2022-03-16
Roger Sayle
New
[v2] PR92090: Fix testcase failures by r276469
[v2] PR92090: Fix testcase failures by r276469
- - - -
-
-
-
2019-11-04
Xionghu Luo
New
[v2] PR85678: Change default to -fno-common
[v2] PR85678: Change default to -fno-common
- - - -
-
-
-
2019-10-29
Wilco Dijkstra
New
[v2] PR81136: ICE from inconsistent DR_MISALIGNMENTs
- - - -
-
-
-
2017-06-28
Richard Sandiford
New
[v2] PR80108: Fix ICE with cross compiler
- - - -
-
-
-
2017-04-06
Kelvin Nilsen
New
[v2] PR80101: Fix ICE in store_data_bypass_p
- - - -
-
-
-
2017-04-14
Kelvin Nilsen
New
[v2] PR71482: Add -Wglobal-constructors
[v2] PR71482: Add -Wglobal-constructors
- - - -
-
-
-
2019-06-01
Sean Gillespie
New
[v2] PR68972: g++.dg/cpp1y/vla-initlist1.C test case fails on power
- - - -
-
-
-
2017-02-07
Kelvin Nilsen
New
[v2] PR56771: Fix arm-rtems target for 32-bit hosts
- - - -
-
-
-
2013-04-02
Sebastian Huber
New
[v2] PR48344: Fix unrecognizable insn error when gcc
- - - -
-
-
-
2016-01-20
Kelvin Nilsen
New
[v2] PR44970, rewrite fwprop dataflow update
- - - -
-
-
-
2010-11-17
Paolo Bonzini
New
[v2] PR105169 Fix references to discarded sections
[v2] PR105169 Fix references to discarded sections
- - - -
-
-
-
2022-05-07
Giuliano Belinassi
New
[v2] PR tree-optimization/98335: Improvements to DSE's compute_trims.
[v2] PR tree-optimization/98335: Improvements to DSE's compute_trims.
- - - -
-
-
-
2022-03-09
Roger Sayle
New
[v2] PR tree-optimization/55079: Don't remove all exits of a loop during loop unroll
- - - -
-
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2012-11-15
Siddhesh Poyarekar
New
[v2] PR target/98743: Fix ICE in convert_move for RISC-V
[v2] PR target/98743: Fix ICE in convert_move for RISC-V
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2021-02-02
Kito Cheng
New
[v2] PR target/97682 - Fix to reuse t1 register between call address and epilogue.
[v2] PR target/97682 - Fix to reuse t1 register between call address and epilogue.
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2020-11-13
Monk Chiang
New
[v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return …
[v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return …
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2020-09-25
Kito Cheng
New
[v2] PR target/89828 Inernal compiler error on -fno-omit-frame-pointer
[v2] PR target/89828 Inernal compiler error on -fno-omit-frame-pointer
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2023-03-15
Yoshinori Sato
New
[v2] PR target/78748: S/390: Fix ICE with ANDC splitter.
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2016-12-12
Dominik Vogt
New
[v2] PR sanitizer/78992: Fix sigaction definition on 32-bit sparc
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2017-01-10
Jessica Clarke
New
[v2] PR rtl-optimization/83565: Fix 32-bit rotate on ia64
[v2] PR rtl-optimization/83565: Fix 32-bit rotate on ia64
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2017-12-24
Jessica Clarke
New
[v2] PR rtl-optimization/66790: uninitialized registers handling in REE
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2015-10-13
Pierre-Marie de Rodat
New
[v2] PR rtl-optimization/66790: uninitialized registers handling in REE
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2015-10-19
Pierre-Marie de Rodat
New
[v2] PR middle-end/60281
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2014-02-21
林作健
New
[v2] PR fortran/105184 - ICE in gfc_array_init_size, at fortran/trans-array.cc:5841
[v2] PR fortran/105184 - ICE in gfc_array_init_size, at fortran/trans-array.cc:5841
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2022-04-08
Harald Anlauf
New
[v2] PR fortran/104573 - ICE in resolve_structure_cons, at fortran/resolve.cc:1299
[v2] PR fortran/104573 - ICE in resolve_structure_cons, at fortran/resolve.cc:1299
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2022-03-01
Harald Anlauf
New
[v2] PR fortran/103418 - random_number() does not accept pointer, intent(in) array argument
[v2] PR fortran/103418 - random_number() does not accept pointer, intent(in) array argument
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2021-12-09
Harald Anlauf
New
[v2] PR fortran/103411 - ICE in gfc_conv_array_initializer, at fortran/trans-array.c:6377
[v2] PR fortran/103411 - ICE in gfc_conv_array_initializer, at fortran/trans-array.c:6377
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2021-11-25
Harald Anlauf
New
[v2] PR c/20385: more detection of unknown type names
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2010-11-30
Paolo Bonzini
New
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