@@ -108,6 +108,8 @@ static const riscv_implied_info_t riscv_implied_info[] =
{"zhinx", "zhinxmin"},
{"zhinxmin", "zfinx"},
+ {"smaia", "ssaia"},
+
{NULL, NULL}
};
@@ -219,6 +221,8 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
{"zmmul", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"smaia", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"ssaia", ISA_SPEC_CLASS_NONE, 1, 0},
{"svinval", ISA_SPEC_CLASS_NONE, 1, 0},
{"svnapot", ISA_SPEC_CLASS_NONE, 1, 0},
@@ -28662,6 +28662,10 @@ If both @option{-march} and @option{-mcpu=} are not specified, the default for
this argument is system dependent, users who want a specific architecture
extensions should specify one explicitly.
+Note, that AIA support (@samp{Smaia} and @samp{Ssaia}) is based on an AIA
+specification, which is frozen but contains draft chapters ("Duo-PLIC" and
+"IOMMU Support").
+
@item -mcpu=@var{processor-string}
@opindex mcpu
Use architecture of and optimize the output for the given processor, specified
new file mode 100644
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_smaia" { target { rv64 } } } */
+/* { dg-options "-march=rv32gc_smaia" { target { rv32 } } } */
+
+#ifndef __riscv_smaia
+#error Feature macro not defined
+#endif
+
+// Smaia implies Ssaia
+#ifndef __riscv_ssaia
+#error Feature macro not defined
+#endif
+
+int
+foo (int a)
+{
+ return a;
+}
new file mode 100644
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc_ssaia" { target { rv64 } } } */
+/* { dg-options "-march=rv32gc_ssaia" { target { rv32 } } } */
+
+#ifndef __riscv_ssaia
+#error Feature macro not defined
+#endif
+
+int
+foo (int a)
+{
+ return a;
+}