Show patches with: Submitter = Kito Cheng       |    State = Action Required       |    Archived = No       |   113 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
RISC-V: Handle different sigcontext struct layout. RISC-V: Handle different sigcontext struct layout. - - - - --- 2022-01-18 Kito Cheng New
[2/2] RISC-V: Minimal support of vector extensions RISC-V: Vector extensions support - - - - --- 2021-12-03 Kito Cheng New
[1/2] RISC-V: Allow extension name contain digit RISC-V: Vector extensions support - - - - --- 2021-12-03 Kito Cheng New
[committed] RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string [committed] RISC-V: Fix wrong zifencei handling in riscv_subset_list::to_string - - - - --- 2021-11-11 Kito Cheng New
[committed,PR/target,102957] Allow Z*-ext extension with only 2 char. [committed,PR/target,102957] Allow Z*-ext extension with only 2 char. - - - - --- 2021-11-09 Kito Cheng New
[committed] RISC-V: Fix wrong predicator for zero_extendsidi2_internal pattern [committed] RISC-V: Fix wrong predicator for zero_extendsidi2_internal pattern - - - - --- 2021-10-28 Kito Cheng New
[committed] RISC-V: Handle zi* extension correctly for arch-canonicalize script [committed] RISC-V: Handle zi* extension correctly for arch-canonicalize script - - - - --- 2021-10-28 Kito Cheng New
[v3,PR/target,100316] Allow constant address for __builtin___clear_cache. [v3,PR/target,100316] Allow constant address for __builtin___clear_cache. - - - - --- 2021-10-08 Kito Cheng New
[v2,PR/target,100316] Allow constant address for __builtin___clear_cache. [v2,PR/target,100316] Allow constant address for __builtin___clear_cache. - - - - --- 2021-10-07 Kito Cheng New
[PR/target,100316] Allow constant address for __builtin___clear_cache. [PR/target,100316] Allow constant address for __builtin___clear_cache. - - - - --- 2021-10-07 Kito Cheng New
[RFC,8/8] RISC-V: Cost model for ZBS extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,7/8] RISC-V: Implement instruction patterns for ZBS extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,6/8] RISC-V: Use li and rori to load constants. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,5/8] RISC-V: Cost model for zbb extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,4/8] RISC-V: Implement instruction patterns for ZBB extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,3/8] RISC-V: Cost model for zba extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,2/8] RISC-V: Implement instruction patterns for ZBA extension. RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[RFC,1/8] RISC-V: Minimal support of bitmanip extension RISC-V: Bit-manipulation extension. - - - - --- 2021-09-23 Kito Cheng New
[v3,2/2] RISC-V: Implement TARGET_COMPUTE_MULTILIB New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - - - --- 2021-09-16 Kito Cheng New
[v3,1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result. New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - - - --- 2021-09-16 Kito Cheng New
[2/2] RISC-V: Implement TARGET_COMPUTE_MULTILIB New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - - - --- 2021-07-21 Kito Cheng New
[1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result. New target hook TARGET_COMPUTE_MULTILIB and implementation for RISC-V - - - - --- 2021-07-21 Kito Cheng New
RISC-V: Allow multi-lib build with different code model RISC-V: Allow multi-lib build with different code model - - - - --- 2021-07-21 Kito Cheng New
[committed] RISC-V: Detect python and pick best one for calling multilib-generator [committed] RISC-V: Detect python and pick best one for calling multilib-generator - - - - --- 2021-07-20 Kito Cheng New
[v2] docs: Add 'S' to Machine Constraints for RISC-V [v2] docs: Add 'S' to Machine Constraints for RISC-V - - 1 - --- 2021-07-12 Kito Cheng New
docs: Add 'S' to Machine Constraints for RISC-V docs: Add 'S' to Machine Constraints for RISC-V - - - - --- 2021-07-02 Kito Cheng New
[committed] testuite: Add pthread check to dg-module-cmi for omp module testing [committed] testuite: Add pthread check to dg-module-cmi for omp module testing - - - - --- 2021-06-22 Kito Cheng New
[committed] RISC-V: Pass -mno-relax to assembler [committed] RISC-V: Pass -mno-relax to assembler - - - - --- 2021-05-25 Kito Cheng New
[committed] testuite: Check pthread for omp module testing [committed] testuite: Check pthread for omp module testing - - - - --- 2021-05-19 Kito Cheng New
[wwwdoc] gcc-11/changes: Document RISC-V changes [wwwdoc] gcc-11/changes: Document RISC-V changes - - - - --- 2021-03-24 Kito Cheng New
[committed] PR target/99702: Check RTL type before get value [committed] PR target/99702: Check RTL type before get value - - - - --- 2021-03-22 Kito Cheng New
PR target/99314: Fix integer signedness issue for cpymem pattern expansion. PR target/99314: Fix integer signedness issue for cpymem pattern expansion. - - - - --- 2021-03-05 Kito Cheng New
config.sub, config.guess : Import upstream 2021-01-25. config.sub, config.guess : Import upstream 2021-01-25. - - - - --- 2021-02-23 Kito Cheng New
PR target/98878 - Incorrect multilib list for riscv*-rtems PR target/98878 - Incorrect multilib list for riscv*-rtems - - - - --- 2021-02-04 Kito Cheng New
[v2] PR target/98743: Fix ICE in convert_move for RISC-V [v2] PR target/98743: Fix ICE in convert_move for RISC-V - - - - --- 2021-02-02 Kito Cheng New
PR target/98743: Fix ICE in convert_move for RISC-V PR target/98743: Fix ICE in convert_move for RISC-V - - - - --- 2021-02-01 Kito Cheng New
[v2,2/2] RISC-V: Implement new style of architecture extension test macros. RISC-V: Introduce new architecture extension test macros - - - - --- 2021-01-07 Kito Cheng New
[v2,1/2] RISC-V: Move class riscv_subset_list and riscv_subset_t to riscv-protos.h RISC-V: Introduce new architecture extension test macros - - - - --- 2021-01-07 Kito Cheng New
Fix array-quals-1.c for RISC-V Fix array-quals-1.c for RISC-V - - - - --- 2021-01-06 Kito Cheng New
[2/2] RISC-V: Implement new style of architecture extension test macros. RISC-V: Introduce new architecture extension test macros - - - - --- 2021-01-04 Kito Cheng New
[1/2] RISC-V: Move class riscv_subset_list and riscv_subset_t to riscv-protos.h RISC-V: Introduce new architecture extension test macros - - - - --- 2021-01-04 Kito Cheng New
[committed] RISC-V: Fix python3 compatibility for multilib-generator [committed] RISC-V: Fix python3 compatibility for multilib-generator - - - - --- 2020-12-24 Kito Cheng New
PR target/98152: Checking python is available before using PR target/98152: Checking python is available before using - - - - --- 2020-12-06 Kito Cheng New
[2/2] RISC-V: Implement TARGET_COMPUTE_MULTILIB [1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result. - - - - --- 2020-12-01 Kito Cheng New
[1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result. [1/2] Add TARGET_COMPUTE_MULTILIB hook to override multi-lib result. - - - - --- 2020-12-01 Kito Cheng New
RISC-V: Canonicalize --with-arch RISC-V: Canonicalize --with-arch - - - - --- 2020-12-01 Kito Cheng New
[committed] RISC-V: Drop some commited accidentally code. [committed] RISC-V: Drop some commited accidentally code. - - - - --- 2020-12-01 Kito Cheng New
Fix print_multilib_info when default arguments appear in the option list with '!' Fix print_multilib_info when default arguments appear in the option list with '!' - - - - --- 2020-11-26 Kito Cheng New
RISC-V: Always define MULTILIB_DEFAULTS RISC-V: Always define MULTILIB_DEFAULTS - - - - --- 2020-11-20 Kito Cheng New
[3/3] RISC-V: Support version controling for ISA standard extensions RISC-V: Support version controling for ISA standard extensions - - - - --- 2020-11-13 Kito Cheng New
[2/3] RISC-V: Support zicsr and zifencei extension for -march. RISC-V: Support version controling for ISA standard extensions - - - - --- 2020-11-13 Kito Cheng New
[1/3] RISC-V: Handle implied extension in canonical ordering. RISC-V: Support version controling for ISA standard extensions - - - - --- 2020-11-13 Kito Cheng New
[3/3] RISC-V: Support version controling for ISA standard extensions [1/3] RISC-V: Handle implied extension in canonical ordering. - - - - --- 2020-11-13 Kito Cheng New
[2/3] RISC-V: Support zicsr and zifencei extension for -march. [1/3] RISC-V: Handle implied extension in canonical ordering. - - - - --- 2020-11-13 Kito Cheng New
[1/3] RISC-V: Handle implied extension in canonical ordering. [1/3] RISC-V: Handle implied extension in canonical ordering. - - - - --- 2020-11-13 Kito Cheng New
[committed] RISC-V: Mark non-export symbol static and const in riscv-common.c [committed] RISC-V: Mark non-export symbol static and const in riscv-common.c - - - - --- 2020-11-06 Kito Cheng New
[committed] RISC-V: Check multiletter extension has more than 1 letter [committed] RISC-V: Check multiletter extension has more than 1 letter - - - - --- 2020-11-02 Kito Cheng New
[committed] RISC-V: Refine riscv_parse_arch_string [committed] RISC-V: Refine riscv_parse_arch_string - - - - --- 2020-10-27 Kito Cheng New
[v2] RISC-V: Add configure option: --with-multilib-config to flexible config multi-lib settings. [v2] RISC-V: Add configure option: --with-multilib-config to flexible config multi-lib settings. - - - - --- 2020-10-19 Kito Cheng New
RISC-V: Extend syntax for the multilib-generator RISC-V: Extend syntax for the multilib-generator - - - - --- 2020-10-16 Kito Cheng New
RISC-V: Add configure option: --with-multilib-config to flexible config multi-lib settings. RISC-V: Add configure option: --with-multilib-config to flexible config multi-lib settings. - - - - --- 2020-10-16 Kito Cheng New
[committed] RISC-V: Handle implied extension in multilib-generator [committed] RISC-V: Handle implied extension in multilib-generator - - - - --- 2020-10-16 Kito Cheng New
RISC-V: Add support for -mcpu option. RISC-V: Add support for -mcpu option. - - - - --- 2020-10-13 Kito Cheng New
RISC-V: Derive ABI from -march if -mabi is not present. RISC-V: Derive ABI from -march if -mabi is not present. - - - - --- 2020-10-06 Kito Cheng New
PR target/96307: Fix KASAN option checking. PR target/96307: Fix KASAN option checking. - - - - --- 2020-10-05 Kito Cheng New
RISC-V: Define __riscv_cmodel_medany for PIC mode. RISC-V: Define __riscv_cmodel_medany for PIC mode. - - - - --- 2020-09-25 Kito Cheng New
[v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return … [v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return … - - - - --- 2020-09-25 Kito Cheng New
PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return value… PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return value… - - - - --- 2020-09-10 Kito Cheng New
PR target/96260 - KASAN should work even back-end not porting anything. PR target/96260 - KASAN should work even back-end not porting anything. - - - - --- 2020-07-22 Kito Cheng New
testsuite: Improve signal supporting detection testsuite: Improve signal supporting detection - - - - --- 2020-07-21 Kito Cheng New
[committed] testsuite: Add signal checking for signal related testcase in analyzer. [committed] testsuite: Add signal checking for signal related testcase in analyzer. - - - - --- 2020-07-21 Kito Cheng New
RISC-V: Implment __builtin_thread_pointer RISC-V: Implment __builtin_thread_pointer - - - - --- 2020-07-07 Kito Cheng New
RISC-V: Disable remove unneeded save-restore call optimization if there are any arguments on stack. RISC-V: Disable remove unneeded save-restore call optimization if there are any arguments on stack. - - - - --- 2020-07-07 Kito Cheng New
[v2] RISC-V: Handle multi-letter extension for multilib-generator [v2] RISC-V: Handle multi-letter extension for multilib-generator - - - - --- 2020-07-01 Kito Cheng New
RISC-V: Handle multi-letter extension for multilib-generator RISC-V: Handle multi-letter extension for multilib-generator - - - - --- 2020-06-30 Kito Cheng New
RISC-V: Preserve arch version info during normalizing arch string RISC-V: Preserve arch version info during normalizing arch string - - - - --- 2020-06-30 Kito Cheng New
RISC-V: Normalize arch string in driver time RISC-V: Normalize arch string in driver time - - - - --- 2020-06-19 Kito Cheng New
RISC-V: Fix compilation failed for frflags builtin in C++ mode RISC-V: Fix compilation failed for frflags builtin in C++ mode - - - - --- 2020-06-19 Kito Cheng New
RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683] RISC-V: Fix ICE on riscv_gpr_save_operation_p [PR95683] - - - - --- 2020-06-15 Kito Cheng New
[committed] RISC-V: Suppress warning for signed and unsigned integer comparison. [committed] RISC-V: Suppress warning for signed and unsigned integer comparison. - - - - --- 2020-06-15 Kito Cheng New
[2/2] RISC-V: Unify the output asm pattern between gpr_save and gpr_restore pattern. [1/2] RISC-V: Describe correct USEs for gpr_save pattern [PR95252] - - - - --- 2020-06-10 Kito Cheng New
[1/2] RISC-V: Describe correct USEs for gpr_save pattern [PR95252] [1/2] RISC-V: Describe correct USEs for gpr_save pattern [PR95252] - - - - --- 2020-06-10 Kito Cheng New
testsuite: Disable colorization for ubsan test testsuite: Disable colorization for ubsan test - - - - --- 2020-05-20 Kito Cheng New
testsuite: Match ASCII color code for ubsan's test pattern. testsuite: Match ASCII color code for ubsan's test pattern. - - - - --- 2020-05-19 Kito Cheng New
[committed] testsuite: Require gnu-tm support for pr94856.C [committed] testsuite: Require gnu-tm support for pr94856.C - - - - --- 2020-05-11 Kito Cheng New
[v4] Fix alignment for local variable [PR90811] [v4] Fix alignment for local variable [PR90811] - - - - --- 2020-04-14 Kito Cheng New
[v2,2/2] RISC-V: Handle implied extension for -march parser. [v2,1/2] RISC-V: Update march parser - - - - --- 2020-04-10 Kito Cheng New
[v2,1/2] RISC-V: Update march parser [v2,1/2] RISC-V: Update march parser - - - - --- 2020-04-10 Kito Cheng New
[2/2] RISC-V: Handle implied extension for -march parser. [1/2] RISC-V: Update march parser - - - - --- 2020-03-31 Kito Cheng New
[1/2] RISC-V: Update march parser [1/2] RISC-V: Update march parser - - - - --- 2020-03-31 Kito Cheng New
[v3] Fix alignment for local variable [PR90811] [v3] Fix alignment for local variable [PR90811] - - - - --- 2020-03-31 Kito Cheng New
Respect user align for local variable Respect user align for local variable - - - - --- 2020-03-30 Kito Cheng New
[2/2] Fix alignment for local variable [PR90811] [1/2] Move out increase_alignment into ipa-increase-alignment.cc - - - - --- 2020-03-27 Kito Cheng New
[1/2] Move out increase_alignment into ipa-increase-alignment.cc [1/2] Move out increase_alignment into ipa-increase-alignment.cc - - - - --- 2020-03-27 Kito Cheng New
Fix alignment for local variable [PR90811] Fix alignment for local variable [PR90811] - - - - --- 2020-03-27 Kito Cheng New
[committed] RISC-V: Fix testsuite regression due to recent IRA changes. [committed] RISC-V: Fix testsuite regression due to recent IRA changes. - - - - --- 2020-03-11 Kito Cheng New
[committed] RISC-V: Fix testsuite regression due to recent IRA changes. [committed] RISC-V: Fix testsuite regression due to recent IRA changes. - - - - --- 2020-03-06 Kito Cheng New
PR target/93995 ICE in patch_jump_insn, at cfgrtl.c:1290 on riscv64-linux-gnu PR target/93995 ICE in patch_jump_insn, at cfgrtl.c:1290 on riscv64-linux-gnu - - - - --- 2020-03-03 Kito Cheng New
re PR tree-optimization/90883 (Generated code is worse if returned struct is unnamed) re PR tree-optimization/90883 (Generated code is worse if returned struct is unnamed) - - - - --- 2020-03-03 Kito Cheng New
[v2] RISC-V: Adjust floating point code gen for LTGT compare [v2] RISC-V: Adjust floating point code gen for LTGT compare - - - - --- 2020-02-21 Kito Cheng New
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