diff mbox series

[v2,9/9] riscv: Update alignment for some sections in linker scripts

Message ID 20230413062008.981238-9-bmeng@tinylab.org
State Accepted
Commit 9a6569a043d336138fca857bc3140fab33a11afc
Delegated to: Andes
Headers show
Series [v2,1/9] riscv: Optimize source end address calculation in start.S | expand

Commit Message

Bin Meng April 13, 2023, 6:20 a.m. UTC
Some sections in the linker scripts are aligned to 4 bytes, which
may cause misaligned exception on some platforms, e.g.: clearing
the bss section on 64-bit hardware if __bss_start does not start
from a naturally 8 bytes aligned address.

Signed-off-by: Bin Meng <bmeng@tinylab.org>

---

(no changes since v1)

 arch/riscv/cpu/u-boot-spl.lds | 2 +-
 arch/riscv/cpu/u-boot.lds     | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

Comments

Leo Liang April 20, 2023, 7:49 a.m. UTC | #1
On Thu, Apr 13, 2023 at 02:20:08PM +0800, Bin Meng wrote:
> Some sections in the linker scripts are aligned to 4 bytes, which
> may cause misaligned exception on some platforms, e.g.: clearing
> the bss section on 64-bit hardware if __bss_start does not start
> from a naturally 8 bytes aligned address.
> 
> Signed-off-by: Bin Meng <bmeng@tinylab.org>
> 
> ---
> 
> (no changes since v1)
> 
>  arch/riscv/cpu/u-boot-spl.lds | 2 +-
>  arch/riscv/cpu/u-boot.lds     | 6 +++---
>  2 files changed, 4 insertions(+), 4 deletions(-)

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Michal Simek Feb. 14, 2024, 11:15 a.m. UTC | #2
Hi Bin,

čt 13. 4. 2023 v 8:21 odesílatel Bin Meng <bmeng@tinylab.org> napsal:

> Some sections in the linker scripts are aligned to 4 bytes, which
> may cause misaligned exception on some platforms, e.g.: clearing
> the bss section on 64-bit hardware if __bss_start does not start
> from a naturally 8 bytes aligned address.
>
> Signed-off-by: Bin Meng <bmeng@tinylab.org>
>
> ---
>
> (no changes since v1)
>
>  arch/riscv/cpu/u-boot-spl.lds | 2 +-
>  arch/riscv/cpu/u-boot.lds     | 6 +++---
>  2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds
> index c3b4907905..d1113a59aa 100644
> --- a/arch/riscv/cpu/u-boot-spl.lds
> +++ b/arch/riscv/cpu/u-boot-spl.lds
> @@ -44,7 +44,7 @@ SECTIONS
>                 __binman_sym_end = .;
>         } > .spl_mem
>
> -       . = ALIGN(4);
> +       . = ALIGN(8);
>
>         _end = .;
>         _image_binary_end = .;
> diff --git a/arch/riscv/cpu/u-boot.lds b/arch/riscv/cpu/u-boot.lds
> index 1c937aebee..15b5cbc585 100644
> --- a/arch/riscv/cpu/u-boot.lds
> +++ b/arch/riscv/cpu/u-boot.lds
> @@ -57,7 +57,7 @@ SECTIONS
>                 __efi_runtime_rel_stop = .;
>         }
>
> -       . = ALIGN(4);
> +       . = ALIGN(8);
>
>         /DISCARD/ : { *(.rela.plt*) }
>         .rela.dyn : {
> @@ -66,7 +66,7 @@ SECTIONS
>                 __rel_dyn_end = .;
>         }
>
> -       . = ALIGN(4);
> +       . = ALIGN(8);
>
>         .dynsym : {
>                 __dyn_sym_start = .;
> @@ -74,7 +74,7 @@ SECTIONS
>                 __dyn_sym_end = .;
>         }
>
> -       . = ALIGN(4);
> +       . = ALIGN(8);
>
>         _end = .;
>

This change has actually a side effect on SPL and its behavior. You are
enforcing here that symbols _end
or _image_binary_end are 8byte aligned but if previous section are only 4
bytes aligned you are forcing 4byte gap
between the end of u-boot-nodtb.bin binary and symbol reference.
It means when you want to attach dtb behind SPL you have a problem.
DTBs should be 64bit aligned. It means alignment of 8bytes is fine but you
need to also make sure that
spl/u-boot-nodtb.bin is 8byte aligned.

Pretty much talking about change like below but it would require to change
all u-boot-spl.lds to make sure that end symbols are
8byte aligned that appended DTB is 8byte aligned all the time.

Thanks,
Michal

diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 407fc52376a5..486360f10176 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -320,7 +320,7 @@ endif
 endif

 ifneq ($(build_dtb),)
-$(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \
+$(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb-align.bin \
                $(if
$(CONFIG_$(SPL_TPL_)SEPARATE_BSS),,$(obj)/$(SPL_BIN)-pad.bin) \
                $(FINAL_DTB_CONTAINER)  FORCE
        $(call if_changed,cat)
@@ -328,7 +328,7 @@ $(obj)/$(SPL_BIN)-dtb.bin: $(obj)/$(SPL_BIN)-nodtb.bin \
 $(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-dtb.bin FORCE
        $(call if_changed,copy)
 else
-$(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-nodtb.bin FORCE
+$(obj)/$(SPL_BIN).bin: $(obj)/$(SPL_BIN)-nodtb-align.bin FORCE
        $(call if_changed,copy)
 endif

@@ -390,6 +390,9 @@ OBJCOPYFLAGS_$(SPL_BIN)-nodtb.bin = $(SPL_OBJCFLAGS) -O
binary \
 $(obj)/$(SPL_BIN)-nodtb.bin: $(obj)/$(SPL_BIN) FORCE
        $(call if_changed,objcopy)

+$(obj)/$(SPL_BIN)-nodtb-align.bin: $(obj)/$(SPL_BIN)-nodtb.bin
+       @dd if=$< of=$@ conv=block,sync bs=8 2>/dev/null;
+
 OBJCOPYFLAGS_u-boot-x86-start16-spl.bin := -O binary -j .start16
 $(obj)/u-boot-x86-start16-spl.bin: $(obj)/u-boot-spl FORCE
        $(call if_changed,objcopy)

Thanks,
Michal
diff mbox series

Patch

diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds
index c3b4907905..d1113a59aa 100644
--- a/arch/riscv/cpu/u-boot-spl.lds
+++ b/arch/riscv/cpu/u-boot-spl.lds
@@ -44,7 +44,7 @@  SECTIONS
 		__binman_sym_end = .;
 	} > .spl_mem
 
-	. = ALIGN(4);
+	. = ALIGN(8);
 
 	_end = .;
 	_image_binary_end = .;
diff --git a/arch/riscv/cpu/u-boot.lds b/arch/riscv/cpu/u-boot.lds
index 1c937aebee..15b5cbc585 100644
--- a/arch/riscv/cpu/u-boot.lds
+++ b/arch/riscv/cpu/u-boot.lds
@@ -57,7 +57,7 @@  SECTIONS
 		__efi_runtime_rel_stop = .;
 	}
 
-	. = ALIGN(4);
+	. = ALIGN(8);
 
 	/DISCARD/ : { *(.rela.plt*) }
 	.rela.dyn : {
@@ -66,7 +66,7 @@  SECTIONS
 		__rel_dyn_end = .;
 	}
 
-	. = ALIGN(4);
+	. = ALIGN(8);
 
 	.dynsym : {
 		__dyn_sym_start = .;
@@ -74,7 +74,7 @@  SECTIONS
 		__dyn_sym_end = .;
 	}
 
-	. = ALIGN(4);
+	. = ALIGN(8);
 
 	_end = .;