diff mbox series

[v2,1/9] riscv: Optimize source end address calculation in start.S

Message ID 20230413062008.981238-1-bmeng@tinylab.org
State Accepted
Commit 883f553e6ba510d4d4ab7d645ff46bc999752e79
Delegated to: Andes
Headers show
Series [v2,1/9] riscv: Optimize source end address calculation in start.S | expand

Commit Message

Bin Meng April 13, 2023, 6:20 a.m. UTC 
The __bss_start is the source end address hence load its address
directly into register 't2' for optimization.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Rick Chen <rick@andestech.com>
---

(no changes since v1)

 arch/riscv/cpu/start.S | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 4687bca3c9..3c8344c345 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -283,9 +283,7 @@  stack_setup:
 	beq	t0, s4, clear_bss	/* skip relocation */
 
 	mv	t1, s4			/* t1 <- scratch for copy_loop */
-	la	t3, __bss_start
-	sub	t3, t3, t0		/* t3 <- __bss_start_ofs */
-	add	t2, t0, t3		/* t2 <- source end address */
+	la	t2, __bss_start		/* t2 <- source end address */
 
 copy_loop:
 	LREG	t5, 0(t0)