Message ID | 20230413062008.981238-7-bmeng@tinylab.org |
---|---|
State | Accepted |
Commit | 3c09ac2c589fbf4d0976c49956cc9c6d14c33986 |
Delegated to: | Andes |
Headers | show |
Series | [v2,1/9] riscv: Optimize source end address calculation in start.S | expand |
On Thu, Apr 13, 2023 at 02:20:06PM +0800, Bin Meng wrote: > board_init_r does not return for U-Boot SPL hence there is no need > to update the link register when jumping to board_init_r. > > Signed-off-by: Bin Meng <bmeng@tinylab.org> > > --- > > Changes in v2: > - new patch: "riscv: Avoid updating the link register" > > arch/riscv/cpu/start.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index c09d1cb412..8cf25bb14a 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -250,7 +250,7 @@ spl_secondary_hart_stack_gd_setup: spl_call_board_init_r: mv a0, zero mv a1, zero - jal board_init_r + j board_init_r #endif /*
board_init_r does not return for U-Boot SPL hence there is no need to update the link register when jumping to board_init_r. Signed-off-by: Bin Meng <bmeng@tinylab.org> --- Changes in v2: - new patch: "riscv: Avoid updating the link register" arch/riscv/cpu/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)