| Message ID | 1593175161-26278-4-git-send-email-sagar.kadam@sifive.com |
|---|---|
| State | Superseded |
| Delegated to: | Andes |
| Headers | show |
| Series | update clock handler and proper cpu features | expand |
On Fri, Jun 26, 2020 at 8:41 PM Sagar Shrikant Kadam <sagar.kadam@sifive.com> wrote: > > The conditional check to read "mmu-type" from the device tree > is not rightly handled due to which the cpu feature doesn't include > CPU_FEAT_MMU even if it's corresponding entry is present in the device > tree. > > The initialization of cpu features is now taken care in cpu-uclass > driver, so no need to zero out cpu_freq in riscv_cpu driver and can be > removed. > > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> > Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> > --- > drivers/cpu/riscv_cpu.c | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) > Reviewed-by: Bin Meng <bin.meng@windriver.com>
Hi, > -----Original Message----- > From: Bin Meng <bmeng.cn@gmail.com> > Sent: Friday, June 26, 2020 6:50 PM > To: Sagar Kadam <sagar.kadam@sifive.com> > Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Rick Chen > <rick@andestech.com>; Bin Meng <bin.meng@windriver.com>; Jagan Teki > <jagan@amarulasolutions.com>; Pragnesh Patel > <pragnesh.patel@sifive.com>; Anup Patel <anup.patel@wdc.com>; Simon > Glass <sjg@chromium.org>; Ye Li <ye.li@nxp.com>; Peng Fan > <peng.fan@nxp.com>; Sean Anderson <seanga2@gmail.com> > Subject: Re: [PATCH v6 3/4] riscv: cpu: correctly handle the setting of > CPU_FEAT_MMU bit > > [External Email] Do not click links or attachments unless you recognize the > sender and know the content is safe > > On Fri, Jun 26, 2020 at 8:41 PM Sagar Shrikant Kadam > <sagar.kadam@sifive.com> wrote: > > > > The conditional check to read "mmu-type" from the device tree > > is not rightly handled due to which the cpu feature doesn't include > > CPU_FEAT_MMU even if it's corresponding entry is present in the device > > tree. > > > > The initialization of cpu features is now taken care in cpu-uclass > > driver, so no need to zero out cpu_freq in riscv_cpu driver and can be > > removed. > > > > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> > > Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> > > --- > > drivers/cpu/riscv_cpu.c | 5 +---- > > 1 file changed, 1 insertion(+), 4 deletions(-) > > > > Reviewed-by: Bin Meng <bin.meng@windriver.com> Thanks Bin. BR, Sagar
diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c index 76b0489..112690f 100644 --- a/drivers/cpu/riscv_cpu.c +++ b/drivers/cpu/riscv_cpu.c @@ -36,9 +36,6 @@ static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info) struct clk clk; const char *mmu; - /* Zero out the frequency, in case sizeof(ulong) != sizeof(u32) */ - info->cpu_freq = 0; - /* First try getting the frequency from the assigned clock */ ret = clk_get_by_index(dev, 0, &clk); if (!ret) { @@ -52,7 +49,7 @@ static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info) dev_read_u32(dev, "clock-frequency", (u32 *)&info->cpu_freq); mmu = dev_read_string(dev, "mmu-type"); - if (!mmu) + if (mmu) info->features |= BIT(CPU_FEAT_MMU); return 0;