| Message ID | 20180917163103.6113-8-cota@braap.org |
|---|---|
| State | New |
| Headers | show |
| Series | exec: drop BQL from interrupt handling | expand |
On 9/17/18 9:30 AM, Emilio G. Cota wrote: > From: Paolo Bonzini <pbonzini@redhat.com> > > Cc: Richard Henderson <rth@twiddle.net> > Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> > Signed-off-by: Emilio G. Cota <cota@braap.org> > --- > target/alpha/cpu.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini <pbonzini@redhat.com> > > Cc: Richard Henderson <rth@twiddle.net> > Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> > Signed-off-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/alpha/cpu.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c > index b08078e7fc..76001e66f1 100644 > --- a/target/alpha/cpu.c > +++ b/target/alpha/cpu.c > @@ -42,10 +42,10 @@ static bool alpha_cpu_has_work(CPUState *cs) > assume that if a CPU really wants to stay asleep, it will mask > interrupts at the chipset level, which will prevent these bits > from being set in the first place. */ > - return cs->interrupt_request & (CPU_INTERRUPT_HARD > - | CPU_INTERRUPT_TIMER > - | CPU_INTERRUPT_SMP > - | CPU_INTERRUPT_MCHK); > + return atomic_read(&cs->interrupt_request) & (CPU_INTERRUPT_HARD > + | CPU_INTERRUPT_TIMER > + | CPU_INTERRUPT_SMP > + | CPU_INTERRUPT_MCHK); > } > > static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) >
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index b08078e7fc..76001e66f1 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -42,10 +42,10 @@ static bool alpha_cpu_has_work(CPUState *cs) assume that if a CPU really wants to stay asleep, it will mask interrupts at the chipset level, which will prevent these bits from being set in the first place. */ - return cs->interrupt_request & (CPU_INTERRUPT_HARD - | CPU_INTERRUPT_TIMER - | CPU_INTERRUPT_SMP - | CPU_INTERRUPT_MCHK); + return atomic_read(&cs->interrupt_request) & (CPU_INTERRUPT_HARD + | CPU_INTERRUPT_TIMER + | CPU_INTERRUPT_SMP + | CPU_INTERRUPT_MCHK); } static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)