[U-Boot,05/10] board: altera: Stratix10: Add board_get_usable_ram_top()

Add board_get_usable_ram_top() function. Limit maximum usable
ram top to 2GB.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
 board/altera/stratix10-socdk/socfpga.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> Add board_get_usable_ram_top() function. Limit maximum usable
> ram top to 2GB.

Why ? There are ARM64 platforms which can access the entire DRAM range
just fine, what's the problem ?

> Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> ---
>  board/altera/stratix10-socdk/socfpga.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/board/altera/stratix10-socdk/socfpga.c b/board/altera/stratix10-socdk/socfpga.c
> index 043fc543f1..99c10d313c 100644
> --- a/board/altera/stratix10-socdk/socfpga.c
> +++ b/board/altera/stratix10-socdk/socfpga.c
> @@ -5,3 +5,15 @@
>   */
>  
>  #include <common.h>
> +#include <asm/arch/sdram.h>
> +#include <linux/sizes.h>
> +
> +#ifdef CONFIG_ALTERA_SDRAM
> +ulong board_get_usable_ram_top(ulong total_size)
> +{
> +	if (sdram_calculate_size() > SZ_2G)
> +		return SZ_2G;
> +	else
> +		return sdram_calculate_size();
> +}
> +#endif
>

On Tue, 2019-03-12 at 11:46 +0100, Marek Vasut wrote:
> On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> > Add board_get_usable_ram_top() function. Limit maximum usable
> > ram top to 2GB.
> 
> Why ? There are ARM64 platforms which can access the entire DRAM range
> just fine, what's the problem ?
> 

The issue is the gap in memory between 2GB and 4GB.  There is some trickery
you can use to gain access to the memory in that range, but in general, you
dont have access.  I believe just setting the banks up in the dts will
resolve this.

--dalon

> > Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
> > Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
> > ---
> >  board/altera/stratix10-socdk/socfpga.c | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> > 
> > diff --git a/board/altera/stratix10-socdk/socfpga.c
> > b/board/altera/stratix10-socdk/socfpga.c
> > index 043fc543f1..99c10d313c 100644
> > --- a/board/altera/stratix10-socdk/socfpga.c
> > +++ b/board/altera/stratix10-socdk/socfpga.c
> > @@ -5,3 +5,15 @@
> >   */
> >  
> >  #include <common.h>
> > +#include <asm/arch/sdram.h>
> > +#include <linux/sizes.h>
> > +
> > +#ifdef CONFIG_ALTERA_SDRAM
> > +ulong board_get_usable_ram_top(ulong total_size)
> > +{
> > +	if (sdram_calculate_size() > SZ_2G)
> > +		return SZ_2G;
> > +	else
> > +		return sdram_calculate_size();
> > +}
> > +#endif
> > 
> 
>

On 3/12/19 3:33 PM, Westergreen, Dalon wrote:
> On Tue, 2019-03-12 at 11:46 +0100, Marek Vasut wrote:
>> On 3/12/19 9:31 AM, Ley Foon Tan wrote:
>>> Add board_get_usable_ram_top() function. Limit maximum usable
>>> ram top to 2GB.
>>
>> Why ? There are ARM64 platforms which can access the entire DRAM range
>> just fine, what's the problem ?
>>
> 
> The issue is the gap in memory between 2GB and 4GB.  There is some trickery
> you can use to gain access to the memory in that range, but in general, you
> dont have access.  I believe just setting the banks up in the dts will
> resolve this.

E.g. the R8A779{5..9}* platforms also have gaps in memory and it all
works fine . So unless there's some other specialty, there should be no
problem.

On Tue, Mar 12, 2019 at 10:40 PM Marek Vasut <marex@denx.de> wrote:
>
> On 3/12/19 3:33 PM, Westergreen, Dalon wrote:
> > On Tue, 2019-03-12 at 11:46 +0100, Marek Vasut wrote:
> >> On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> >>> Add board_get_usable_ram_top() function. Limit maximum usable
> >>> ram top to 2GB.
> >>
> >> Why ? There are ARM64 platforms which can access the entire DRAM range
> >> just fine, what's the problem ?
> >>
> >
> > The issue is the gap in memory between 2GB and 4GB.  There is some trickery
> > you can use to gain access to the memory in that range, but in general, you
> > dont have access.  I believe just setting the banks up in the dts will
> > resolve this.
>
> E.g. the R8A779{5..9}* platforms also have gaps in memory and it all
> works fine . So unless there's some other specialty, there should be no
> problem.
>
Yes, we don't need this.

Regards
Ley Foon