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[U-Boot,00/10] Update Stratix 10 SDRAM driver

Message ID 1552379474-12867-1-git-send-email-ley.foon.tan@intel.com
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Series Update Stratix 10 SDRAM driver | expand

Message

Ley Foon Tan March 12, 2019, 8:31 a.m. UTC 
This patchset update Stratix 10 SDRAM driver to support:
- Multi-banks memory (Patch [1-8])
  - Stratix 10 support up to 2 memory banks:
	Bank 0: Address 0, size 2GB
	Bank 1: Address 0x100000000, size 124GB
- Add warm reset boot checking function, to use in patch [10] (Patch[9])
- Add ECC memory scrubbing support (Patch [10])
  - Use cache enabled + "DC ZVA" instruction to clear memory to zeros

Ley Foon Tan (10):
  ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
  arm: socfpga: Add sdram_s10.h to sdram.h
  ddr: altera: s10: Add multiple memory banks support
  arm: socfpga: Update dram_init_banksize() for Stratix10
  board: altera: Stratix10: Add board_get_usable_ram_top()
  board: altera: Stratix10: Add ft_board_setup()
  arm: socfpga: Enable OF_BOARD_SETUP for Stratix 10
  configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
  arm: socfpga: stratix10: Add cpu_has_been_warmreset()
  ddr: altera: Stratix10: Add ECC memory scrubbing

 arch/arm/mach-socfpga/Kconfig                 |   1 +
 arch/arm/mach-socfpga/board.c                 |  16 +-
 .../include/mach/reset_manager_s10.h          |   3 +
 arch/arm/mach-socfpga/include/mach/sdram.h    |   2 +
 .../arm/mach-socfpga/include/mach/sdram_s10.h |  10 +
 arch/arm/mach-socfpga/reset_manager_s10.c     |   9 +
 arch/arm/mach-socfpga/spl_s10.c               |  11 --
 board/altera/stratix10-socdk/socfpga.c        |  37 ++++
 configs/socfpga_stratix10_defconfig           |   2 +-
 drivers/ddr/altera/sdram_s10.c                | 178 ++++++++++++++++++
 10 files changed, 256 insertions(+), 13 deletions(-)

Comments

Simon Goldschmidt March 12, 2019, 11:08 a.m. UTC | #1 
On Tue, Mar 12, 2019 at 9:31 AM Ley Foon Tan <ley.foon.tan@intel.com> wrote:
>
> This patchset update Stratix 10 SDRAM driver to support:
> - Multi-banks memory (Patch [1-8])
>   - Stratix 10 support up to 2 memory banks:
>         Bank 0: Address 0, size 2GB
>         Bank 1: Address 0x100000000, size 124GB
> - Add warm reset boot checking function, to use in patch [10] (Patch[9])
> - Add ECC memory scrubbing support (Patch [10])
>   - Use cache enabled + "DC ZVA" instruction to clear memory to zeros

When working on this, would it make sense to move the S10 SDRAM driver
to DM, using UCLASS_RAM, like I did for gen5 (see Marek's 'next' branch:
http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=commit;h=4796a7d5a7fd965c02cf290edec17acb2c9af766)

That might allow us to combine more of the code in mach-socfpga again
in the future...

Regards,
Simon

>
> Ley Foon Tan (10):
>   ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
>   arm: socfpga: Add sdram_s10.h to sdram.h
>   ddr: altera: s10: Add multiple memory banks support
>   arm: socfpga: Update dram_init_banksize() for Stratix10
>   board: altera: Stratix10: Add board_get_usable_ram_top()
>   board: altera: Stratix10: Add ft_board_setup()
>   arm: socfpga: Enable OF_BOARD_SETUP for Stratix 10
>   configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
>   arm: socfpga: stratix10: Add cpu_has_been_warmreset()
>   ddr: altera: Stratix10: Add ECC memory scrubbing
>
>  arch/arm/mach-socfpga/Kconfig                 |   1 +
>  arch/arm/mach-socfpga/board.c                 |  16 +-
>  .../include/mach/reset_manager_s10.h          |   3 +
>  arch/arm/mach-socfpga/include/mach/sdram.h    |   2 +
>  .../arm/mach-socfpga/include/mach/sdram_s10.h |  10 +
>  arch/arm/mach-socfpga/reset_manager_s10.c     |   9 +
>  arch/arm/mach-socfpga/spl_s10.c               |  11 --
>  board/altera/stratix10-socdk/socfpga.c        |  37 ++++
>  configs/socfpga_stratix10_defconfig           |   2 +-
>  drivers/ddr/altera/sdram_s10.c                | 178 ++++++++++++++++++
>  10 files changed, 256 insertions(+), 13 deletions(-)
>
> --
> 2.19.0
>
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> https://lists.denx.de/listinfo/u-boot
Ley Foon Tan March 13, 2019, 6:17 p.m. UTC | #2 
On Tue, 2019-03-12 at 12:08 +0100, Simon Goldschmidt wrote:
> On Tue, Mar 12, 2019 at 9:31 AM Ley Foon Tan <ley.foon.tan@intel.com>
> wrote:
> > 
> > 
> > This patchset update Stratix 10 SDRAM driver to support:
> > - Multi-banks memory (Patch [1-8])
> >   - Stratix 10 support up to 2 memory banks:
> >         Bank 0: Address 0, size 2GB
> >         Bank 1: Address 0x100000000, size 124GB
> > - Add warm reset boot checking function, to use in patch [10]
> > (Patch[9])
> > - Add ECC memory scrubbing support (Patch [10])
> >   - Use cache enabled + "DC ZVA" instruction to clear memory to
> > zeros
> When working on this, would it make sense to move the S10 SDRAM
> driver
> to DM, using UCLASS_RAM, like I did for gen5 (see Marek's 'next'
> branch:
> http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=commit;h=4796a7d5a7
> fd965c02cf290edec17acb2c9af766)
> 
> That might allow us to combine more of the code in mach-socfpga again
> in the future...
Sure, I will look into this. But will be in separate series.

Thanks.

Regards
Ley Foon
> 
> Regards,
> Simon
> 
> > 
> > 
> > Ley Foon Tan (10):
> >   ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
> >   arm: socfpga: Add sdram_s10.h to sdram.h
> >   ddr: altera: s10: Add multiple memory banks support
> >   arm: socfpga: Update dram_init_banksize() for Stratix10
> >   board: altera: Stratix10: Add board_get_usable_ram_top()
> >   board: altera: Stratix10: Add ft_board_setup()
> >   arm: socfpga: Enable OF_BOARD_SETUP for Stratix 10
> >   configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
> >   arm: socfpga: stratix10: Add cpu_has_been_warmreset()
> >   ddr: altera: Stratix10: Add ECC memory scrubbing
> > 
> >  arch/arm/mach-socfpga/Kconfig                 |   1 +
> >  arch/arm/mach-socfpga/board.c                 |  16 +-
> >  .../include/mach/reset_manager_s10.h          |   3 +
> >  arch/arm/mach-socfpga/include/mach/sdram.h    |   2 +
> >  .../arm/mach-socfpga/include/mach/sdram_s10.h |  10 +
> >  arch/arm/mach-socfpga/reset_manager_s10.c     |   9 +
> >  arch/arm/mach-socfpga/spl_s10.c               |  11 --
> >  board/altera/stratix10-socdk/socfpga.c        |  37 ++++
> >  configs/socfpga_stratix10_defconfig           |   2 +-
> >  drivers/ddr/altera/sdram_s10.c                | 178
> > ++++++++++++++++++
> >  10 files changed, 256 insertions(+), 13 deletions(-)
> > 
> > --
> > 2.19.0
> > 
> > _______________________________________________
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > https://lists.denx.de/listinfo/u-boot
Simon Goldschmidt March 14, 2019, 8:23 a.m. UTC | #3 
On Thu, Mar 14, 2019 at 9:21 AM Ley Foon Tan <ley.foon.tan@intel.com> wrote:
>
> On Tue, 2019-03-12 at 12:08 +0100, Simon Goldschmidt wrote:
> > On Tue, Mar 12, 2019 at 9:31 AM Ley Foon Tan <ley.foon.tan@intel.com>
> > wrote:
> > >
> > >
> > > This patchset update Stratix 10 SDRAM driver to support:
> > > - Multi-banks memory (Patch [1-8])
> > >   - Stratix 10 support up to 2 memory banks:
> > >         Bank 0: Address 0, size 2GB
> > >         Bank 1: Address 0x100000000, size 124GB
> > > - Add warm reset boot checking function, to use in patch [10]
> > > (Patch[9])
> > > - Add ECC memory scrubbing support (Patch [10])
> > >   - Use cache enabled + "DC ZVA" instruction to clear memory to
> > > zeros
> > When working on this, would it make sense to move the S10 SDRAM
> > driver
> > to DM, using UCLASS_RAM, like I did for gen5 (see Marek's 'next'
> > branch:
> > http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=commit;h=4796a7d5a7
> > fd965c02cf290edec17acb2c9af766)
> >
> > That might allow us to combine more of the code in mach-socfpga again
> > in the future...
> Sure, I will look into this. But will be in separate series.

Yes, it's a separate issue. It just came to mind when reading this series.

Regards,
Simon

>
> Thanks.
>
> Regards
> Ley Foon
> >
> > Regards,
> > Simon
> >
> > >
> > >
> > > Ley Foon Tan (10):
> > >   ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
> > >   arm: socfpga: Add sdram_s10.h to sdram.h
> > >   ddr: altera: s10: Add multiple memory banks support
> > >   arm: socfpga: Update dram_init_banksize() for Stratix10
> > >   board: altera: Stratix10: Add board_get_usable_ram_top()
> > >   board: altera: Stratix10: Add ft_board_setup()
> > >   arm: socfpga: Enable OF_BOARD_SETUP for Stratix 10
> > >   configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
> > >   arm: socfpga: stratix10: Add cpu_has_been_warmreset()
> > >   ddr: altera: Stratix10: Add ECC memory scrubbing
> > >
> > >  arch/arm/mach-socfpga/Kconfig                 |   1 +
> > >  arch/arm/mach-socfpga/board.c                 |  16 +-
> > >  .../include/mach/reset_manager_s10.h          |   3 +
> > >  arch/arm/mach-socfpga/include/mach/sdram.h    |   2 +
> > >  .../arm/mach-socfpga/include/mach/sdram_s10.h |  10 +
> > >  arch/arm/mach-socfpga/reset_manager_s10.c     |   9 +
> > >  arch/arm/mach-socfpga/spl_s10.c               |  11 --
> > >  board/altera/stratix10-socdk/socfpga.c        |  37 ++++
> > >  configs/socfpga_stratix10_defconfig           |   2 +-
> > >  drivers/ddr/altera/sdram_s10.c                | 178
> > > ++++++++++++++++++
> > >  10 files changed, 256 insertions(+), 13 deletions(-)
> > >
> > > --
> > > 2.19.0