diff mbox series

[12/27] imx: imx8ulp: Change LPAV assignment for dual boot

Message ID 20220214124735.25580-13-peng.fan@oss.nxp.com
State Superseded
Delegated to: Stefano Babic
Headers show
Series imx: imx8ulp: misc update from downstream | expand

Commit Message

Peng Fan (OSS) Feb. 14, 2022, 12:47 p.m. UTC 
From: Ye Li <ye.li@nxp.com>

Assign the LPAV owner to RTD, and assign LPAV masters and peripherals
to APD. So except the masters and peripherals, other resources
(like DDR, cgc2, pcc5) in LPAV won't be reset during reboot and suspend.

No needs to initialize DDR again after reboot.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/imx8ulp/soc.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index e95a159147..b0ddaef222 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -523,10 +523,10 @@  static int trdc_set_access(void)
 	return 0;
 }
 
-void lpav_configure(void)
+void lpav_configure(bool lpav_to_m33)
 {
-	/* LPAV to APD */
-	setbits_le32(SIM_SEC_BASE_ADDR + 0x44, BIT(7));
+	if (!lpav_to_m33)
+		setbits_le32(SIM_SEC_BASE_ADDR + 0x44, BIT(7)); /* LPAV to APD */
 
 	/* PXP/GPU 2D/3D/DCNANO/MIPI_DSI/EPDC/HIFI4 to APD */
 	setbits_le32(SIM_SEC_BASE_ADDR + 0x4c, 0x7F);
@@ -583,8 +583,9 @@  int arch_cpu_init(void)
 				release_rdc(RDC_TRDC);
 
 			trdc_set_access();
-
-			lpav_configure();
+			lpav_configure(false);
+		} else {
+			lpav_configure(true);
 		}
 
 		/* Release xrdc, then allow A35 to write SRAM2 */