mbox series

[v2,0/2] Keep CFR5V[6] as 1 in Octal DTR enable

Message ID cover.1674182602.git.Takahiro.Kuwano@infineon.com
Headers show
Series Keep CFR5V[6] as 1 in Octal DTR enable | expand

Message

Takahiro Kuwano Jan. 20, 2023, 3:28 a.m. UTC 
From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>

Same fix is needed in Linux MTD [0] and Tudor helped for that [1][2].
This series applies the same changes as Linux MTD.

[0] https://patchwork.ozlabs.org/project/linux-mtd/patch/20230106030601.6530-1-Takahiro.Kuwano@infineon.com/
[1] https://patchwork.ozlabs.org/project/linux-mtd/patch/20230110164703.83413-1-tudor.ambarus@linaro.org/
[2] https://patchwork.ozlabs.org/project/linux-mtd/patch/20230110164703.83413-2-tudor.ambarus@linaro.org/

Takahiro Kuwano (2):
  mtd: spi-nor: Consider reserved bits in CFR5 register
  mtd: spi-nor: Make CFRx reg fields generic

 drivers/mtd/spi/spi-nor-core.c |  8 ++++----
 include/linux/mtd/spi-nor.h    | 13 +++++++++----
 2 files changed, 13 insertions(+), 8 deletions(-)

Comments

Jagan Teki Jan. 26, 2023, 3:29 p.m. UTC | #1 
On Fri, Jan 20, 2023 at 8:59 AM <tkuw584924@gmail.com> wrote:
>
> From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>
> Same fix is needed in Linux MTD [0] and Tudor helped for that [1][2].
> This series applies the same changes as Linux MTD.
>
> [0] https://patchwork.ozlabs.org/project/linux-mtd/patch/20230106030601.6530-1-Takahiro.Kuwano@infineon.com/
> [1] https://patchwork.ozlabs.org/project/linux-mtd/patch/20230110164703.83413-1-tudor.ambarus@linaro.org/
> [2] https://patchwork.ozlabs.org/project/linux-mtd/patch/20230110164703.83413-2-tudor.ambarus@linaro.org/
>
> Takahiro Kuwano (2):
>   mtd: spi-nor: Consider reserved bits in CFR5 register
>   mtd: spi-nor: Make CFRx reg fields generic

Applied to u-boot-spi/master