Show patches with: State = Action Required       |    Archived = No       |   136125 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[to-be-committed,RISC-V,PR,target/116256] Fix incorrect return value for predicate [to-be-committed,RISC-V,PR,target/116256] Fix incorrect return value for predicate - - - - --- 2025-01-21 Jeff Law New
[GCC16/PATCH] combine: Better split point for `(and (not X))` [PR111949] [GCC16/PATCH] combine: Better split point for `(and (not X))` [PR111949] - - - - --- 2025-01-21 Andrew Pinski New
[2/2] RISC-V: Support RISC-V Profiles 23. RISC-V: Support RISC-V Profiles. - - - - --- 2025-01-21 Jiawei New
[v2,1/2] RISC-V: Support RISC-V Profiles 20/22. RISC-V: Support RISC-V Profiles. - - - - --- 2025-01-21 Jiawei New
[V5,2/2] RISC-V: Add intrinsics testcases for SiFive Xsfvcp extensions. RISC-V: Add intrinsics support and testcases for SiFive Xsfvcp extension. - - - - --- 2025-01-21 yulong New
[V5,1/2] RISC-V: Add intrinsics support for SiFive Xsfvcp extensions. RISC-V: Add intrinsics support and testcases for SiFive Xsfvcp extension. - - - - --- 2025-01-21 yulong New
[v3] c++: fix wrong-code with constexpr prvalue opt [PR118396] [v3] c++: fix wrong-code with constexpr prvalue opt [PR118396] - - 1 - --- 2025-01-20 Marek Polacek New
[GCC-12,committed] d: Fix failing test with 32-bit compiler [PR114434] [GCC-12,committed] d: Fix failing test with 32-bit compiler [PR114434] - - - - --- 2025-01-20 Iain Buclaw New
[pushed,PR118560,LRA] : Fix typo in checking secondary memory mode for the reg class [pushed,PR118560,LRA] : Fix typo in checking secondary memory mode for the reg class - - - - --- 2025-01-20 Vladimir Makarov New
[committed,PR,target/116256] Adjust expected output in a couple testcases [committed,PR,target/116256] Adjust expected output in a couple testcases - - - - --- 2025-01-20 Jeff Law New
[avr] Tweak some 16-bit shifts using MUL. [avr] Tweak some 16-bit shifts using MUL. - - - - --- 2025-01-20 Georg-Johann Lay New
[to-be-committed,PR,target/114442] Add reservations for all insn types to xiangshan-nanhu model [to-be-committed,PR,target/114442] Add reservations for all insn types to xiangshan-nanhu model - - - - --- 2025-01-20 Jeff Law New
[_Hashtable] Fix hash code cache usage [_Hashtable] Fix hash code cache usage - - - - --- 2025-01-20 François Dumont New
[committed] Fortran: improve error message for conflicting OpenMP clauses [PR107122] [committed] Fortran: improve error message for conflicting OpenMP clauses [PR107122] - - - - --- 2025-01-20 Harald Anlauf New
vect: Preserve OMP info for conditional stores [PR118384] vect: Preserve OMP info for conditional stores [PR118384] - - - - --- 2025-01-20 Richard Sandiford New
[pushed] aarch64: Fix invalid subregs in xorsign [PR118501] [pushed] aarch64: Fix invalid subregs in xorsign [PR118501] - - - - --- 2025-01-20 Richard Sandiford New
[to-be-committed,RISC-V,PR,target/116256] Fix latent regression in pattern to associate arithmetic … [to-be-committed,RISC-V,PR,target/116256] Fix latent regression in pattern to associate arithmetic … - - - - --- 2025-01-20 Jeff Law New
[committed] d: Fix failing test with 32-bit compiler [PR114434] [committed] d: Fix failing test with 32-bit compiler [PR114434] - - - - --- 2025-01-20 Iain Buclaw New
middle-end: use ncopies both when registering and reading masks [PR118273] middle-end: use ncopies both when registering and reading masks [PR118273] - - - - --- 2025-01-20 Tamar Christina New
[v5] AArch64: Add LUTI ACLE for SVE2 [v5] AArch64: Add LUTI ACLE for SVE2 - - - - --- 2025-01-20 Saurabh Jha New
tree-optimization/117875 - missed SLP vectorization tree-optimization/117875 - missed SLP vectorization - - - - --- 2025-01-20 Richard Biener New
tree-optimization/118552 - failed LC SSA update after unrolling tree-optimization/118552 - failed LC SSA update after unrolling - - - - --- 2025-01-20 Richard Biener New
c++/modules: Handle mismatching TYPE_CANONICAL when deduping partial specs [PR118101] c++/modules: Handle mismatching TYPE_CANONICAL when deduping partial specs [PR118101] - - - - --- 2025-01-20 Nathaniel Shead New
nvptx: Gracefully handle '-mptx=3.1' if neither sm_30 nor sm_35 multilib variant is built (was: nvp… nvptx: Gracefully handle '-mptx=3.1' if neither sm_30 nor sm_35 multilib variant is built (was: nvp… - - - - --- 2025-01-20 Thomas Schwinge New
[18/18] s390: Update vec_(load,store)_len(,_r) s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[17/18] s390: Vector shift: Add 128-bit integer support s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[16/18] s390: arch15: Vector maximum/minimum: Add 128-bit integer support s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[15/18] s390: arch15: Vector load positive: Add 128-bit integer support s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[14/18] s390: arch15: Vector compare: Add 128-bit integer support s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[13/18] s390: arch15: Vector devide/remainder s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[12/18] s390: arch15: Count leading/trailing zeros s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[11/18] s390: arch15: Vector generate element masks s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[10/18] s390: arch15: Vector eval s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[09/18] s390: arch15: Vector blend s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[08/18] s390: arch15: Bit deposit and extract s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[07/18] s390: arch15: Load indexed address s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[06/18] s390: arch15: New instruction variants supporting 128-bit integer s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[05/18] s390: arch15: Prepare for future builtins s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[04/18] s390: Bump __VEC__ and add 128-bit integer zvector types s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[03/18] s390: arch15: Prepare for a future architecture s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[02/18] s390: Sort definitions in vecintrin.h s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[01/18] s390: Stay scalar for TOINTVEC/tointvec s390: arch15: Prepare for a future architecture - - - - --- 2025-01-20 Stefan Schulze Frielinghaus New
[v2,2/2] LoongArch: Implement target pragma. [v2,1/2] LoongArch: Implement target attribute. - - - - --- 2025-01-20 Lulu Cheng New
[v2,1/2] LoongArch: Implement target attribute. [v2,1/2] LoongArch: Implement target attribute. - - - - --- 2025-01-20 Lulu Cheng New
[v2,0/2] Implement target attribute and pragma. - - - - --- 2025-01-20 Lulu Cheng New
[v1] RISC-V: Fix incorrect code gen for scalar signed SAT_SUB [PR117688] [v1] RISC-V: Fix incorrect code gen for scalar signed SAT_SUB [PR117688] - - - - --- 2025-01-20 Li, Pan2 New
tree, c++: Consider TARGET_EXPR invariant like SAVE_EXPR [PR118509] tree, c++: Consider TARGET_EXPR invariant like SAVE_EXPR [PR118509] - - - - --- 2025-01-20 Jakub Jelinek New
tree-ssa-dce: Fix calloc handling [PR118224] tree-ssa-dce: Fix calloc handling [PR118224] - - - - --- 2025-01-20 Jakub Jelinek New
[committed] RISC-V: Add sifive_vector.h [committed] RISC-V: Add sifive_vector.h - - - - --- 2025-01-20 Kito Cheng New
[v2] RISC-V: Correct the mode that is causing the program to fail for XTheadCondMov [v2] RISC-V: Correct the mode that is causing the program to fail for XTheadCondMov - - - - --- 2025-01-20 Jin Ma New
inline: Purge the abnormal edges as needed in fold_marked_statements [PR118077] inline: Purge the abnormal edges as needed in fold_marked_statements [PR118077] - - - - --- 2025-01-20 Andrew Pinski New
match.pd: Fix indefinite recursion during exp-log transformations [PR118490] match.pd: Fix indefinite recursion during exp-log transformations [PR118490] - - - - --- 2025-01-20 Soumya AR New
LoongArch: Correct the mode for mask{eq,ne}z LoongArch: Correct the mode for mask{eq,ne}z - - - - --- 2025-01-20 Xi Ruoyao New
[RFC] Fortran: do not copy back for parameter actual arguments [PR81978] [RFC] Fortran: do not copy back for parameter actual arguments [PR81978] - - - - --- 2025-01-19 Harald Anlauf New
testsuite: Only run test if alarm is available testsuite: Only run test if alarm is available - - - - --- 2025-01-19 Torbjorn SVENSSON New
[COMMITTED] Regenerate sparc.opt.urls [COMMITTED] Regenerate sparc.opt.urls - 1 - - --- 2025-01-19 Mark Wielaard New
testsuite: arm: Use -std=c17 for gcc.target/arm/thumb-bitfld1.c testsuite: arm: Use -std=c17 for gcc.target/arm/thumb-bitfld1.c - - - - --- 2025-01-19 Torbjorn SVENSSON New
libstdc++: perfectly forward std::ranges::clamp arguments libstdc++: perfectly forward std::ranges::clamp arguments - - - - --- 2025-01-19 Giuseppe D'Angelo New
RISC-V: Fix a typo in zce to zcf implication RISC-V: Fix a typo in zce to zcf implication - - - - --- 2025-01-19 Yuriy Kolerov New
RISC-V: Fix ICE when prefetching addresses less than 12 bits for zicbop RISC-V: Fix ICE when prefetching addresses less than 12 bits for zicbop - - - - --- 2025-01-19 Jin Ma New
RISC-V: Correct the mode that is causing the program to fail for XTheadCondMov RISC-V: Correct the mode that is causing the program to fail for XTheadCondMov - - - - --- 2025-01-19 Jin Ma New
[v4] RISC-V: Add a new constraint to ensure that the vl of XTheadVector does not produce a non-zero… [v4] RISC-V: Add a new constraint to ensure that the vl of XTheadVector does not produce a non-zero… - - - - --- 2025-01-19 Jin Ma New
c++/modules: Check linkage of structured binding decls c++/modules: Check linkage of structured binding decls - - - - --- 2025-01-19 Nathaniel Shead New
Describe inline assembler parsing Describe inline assembler parsing - - - - --- 2025-01-19 Andi Kleen New
[pushed] doc: Move modula2.org link to https [pushed] doc: Move modula2.org link to https - - - - --- 2025-01-19 Gerald Pfeifer New
[pushed] doc: Adjust link to OpenMP specifications [pushed] doc: Adjust link to OpenMP specifications - - - - --- 2025-01-19 Gerald Pfeifer New
[committed] d: Merge upstream dmd, druntime d115713410, phobos 1b242048c. [committed] d: Merge upstream dmd, druntime d115713410, phobos 1b242048c. - - - - --- 2025-01-18 Iain Buclaw New
[wwwdocs] Fix typo in gcc-15/changes [wwwdocs] Fix typo in gcc-15/changes - - - - --- 2025-01-18 Georg-Johann Lay New
testsuite: Fixes for test case pr117546.c testsuite: Fixes for test case pr117546.c - - - - --- 2025-01-18 Dimitar Dimitrov New
[wwwdocs,applied] More v15 avr news [wwwdocs,applied] More v15 avr news - - - - --- 2025-01-18 Georg-Johann Lay New
[to-be-committed,RISC-V,PR,target/116308] Fix generation of initial RTL for atomics [to-be-committed,RISC-V,PR,target/116308] Fix generation of initial RTL for atomics - - - - --- 2025-01-18 Jeff Law New
[v2,2/2] LoongArch: Improve reassociation for bitwise operation and left shift [PR 115921] [v2,1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and - - - - --- 2025-01-18 Xi Ruoyao New
[v2,1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and [v2,1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and - - - - --- 2025-01-18 Xi Ruoyao New
c++, v2: Handle RAW_DATA_CST in add_list_candidates [PR118532] c++, v2: Handle RAW_DATA_CST in add_list_candidates [PR118532] - - - - --- 2025-01-18 Jakub Jelinek New
c++, v2: Handle RAW_DATA_CST in make_tree_vector_from_ctor [PR118528] c++, v2: Handle RAW_DATA_CST in make_tree_vector_from_ctor [PR118528] - - - - --- 2025-01-18 Jakub Jelinek New
[ifcombine] avoid dropping tree_could_trap_p [PR118514] [ifcombine] avoid dropping tree_could_trap_p [PR118514] - - - - --- 2025-01-18 Alexandre Oliva New
[pushed] PR118067][LRA]: Check secondary memory mode for the reg class [pushed] PR118067][LRA]: Check secondary memory mode for the reg class - - - - --- 2025-01-17 Vladimir Makarov New
c, c++: Return 1 for __has_builtin(__builtin_va_arg) and __has_builtin(__builtin_c23_va_start) c, c++: Return 1 for __has_builtin(__builtin_va_arg) and __has_builtin(__builtin_c23_va_start) - - - - --- 2025-01-17 Jakub Jelinek New
libfortran: G formatting for UNSIGNED [PR118536] libfortran: G formatting for UNSIGNED [PR118536] - - - - --- 2025-01-17 Harald Anlauf New
c++: Fix up find_array_ctor_elt RAW_DATA_CST handling [PR118534] c++: Fix up find_array_ctor_elt RAW_DATA_CST handling [PR118534] - - - - --- 2025-01-17 Jakub Jelinek New
c++: Handle RAW_DATA_CST in add_list_candidates [PR118532] c++: Handle RAW_DATA_CST in add_list_candidates [PR118532] - - - - --- 2025-01-17 Jakub Jelinek New
c++: Handle RAW_DATA_CST in make_tree_vector_from_ctor [PR118528] c++: Handle RAW_DATA_CST in make_tree_vector_from_ctor [PR118528] - - - - --- 2025-01-17 Jakub Jelinek New
[committed] testsuite: Make embed-10.c test more robust [committed] testsuite: Make embed-10.c test more robust - - - - --- 2025-01-17 Jakub Jelinek New
[WIP] Testing hack for better RAW_DATA_CST coverage [WIP] Testing hack for better RAW_DATA_CST coverage - - - - --- 2025-01-17 Jakub Jelinek New
[v5,1/1] Add warning for non-spec compliant FMV in Aarch64 FMV AArch64 warning - - - - --- 2025-01-17 Alfie Richards New
[v4,1/1] Add warning for non-spec compliant FMV in Aarch64 FMV AArch64 warning - - - - --- 2025-01-17 Alfie Richards New
[GCC-14,committed] d: Fix ICE in expand_d_format when diagnosing empty enum [PR117115] [GCC-14,committed] d: Fix ICE in expand_d_format when diagnosing empty enum [PR117115] - - - - --- 2025-01-17 Iain Buclaw New
[committed] d: Add testcase for fixed PR117115 [committed] d: Add testcase for fixed PR117115 - - - - --- 2025-01-17 Iain Buclaw New
[v2] c++: fix wrong-code with constexpr prvalue opt [PR118396] [v2] c++: fix wrong-code with constexpr prvalue opt [PR118396] - - - - --- 2025-01-17 Marek Polacek New
aarch64: Add missing simd requirements for INS [PR118531] aarch64: Add missing simd requirements for INS [PR118531] - - - - --- 2025-01-17 Richard Sandiford New
tree-optimization/118529 - ICE with condition vectorization tree-optimization/118529 - ICE with condition vectorization - - - - --- 2025-01-17 Richard Biener New
[v9] c++: Fix overeager Woverloaded-virtual with conversion operators [PR109918] [v9] c++: Fix overeager Woverloaded-virtual with conversion operators [PR109918] - - - - --- 2025-01-17 Simon Martin New
[v3,1/1] Add warning for non-spec compliant FMV in Aarch64 FMV AArch64 warning - - - - --- 2025-01-17 Alfie Richards New
AArch64: Drop ILP32 from default elf multilibs after deprecation AArch64: Drop ILP32 from default elf multilibs after deprecation - - - - --- 2025-01-17 Tamar Christina New
testsuite/117958 - ifcombine differences on aarch64 vs rest testsuite/117958 - ifcombine differences on aarch64 vs rest - - - - --- 2025-01-17 Richard Biener New
[avr] Add const attribute to built-in functions if possible. [avr] Add const attribute to built-in functions if possible. - - - - --- 2025-01-17 Georg-Johann Lay New
c++/modules: Propagate FNDECL_USED_AUTO alongside deduced return types [PR118049] c++/modules: Propagate FNDECL_USED_AUTO alongside deduced return types [PR118049] - - - - --- 2025-01-17 Nathaniel Shead New
OpenMP/C++: Fix declare_variant's 'adjust_args' if there is a 'this' pointer [PR118321] OpenMP/C++: Fix declare_variant's 'adjust_args' if there is a 'this' pointer [PR118321] - - - - --- 2025-01-17 Tobias Burnus New
RISC-V: Disable fusing vsetvl instructions by VSETVL_VTYPE_CHANGE_ONLY for XTheadVector. RISC-V: Disable fusing vsetvl instructions by VSETVL_VTYPE_CHANGE_ONLY for XTheadVector. - - - - --- 2025-01-17 Jin Ma New
s390: Replace some checking assertions with output_operand_lossage [PR118511] s390: Replace some checking assertions with output_operand_lossage [PR118511] - - - - --- 2025-01-17 Jakub Jelinek New
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