Show patches with: Submitter = Jeff Law       |    State = Action Required       |    Archived = No       |   282 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[to-be-committed,RISC-V] Avoid propagating constant AVL for theadvector [to-be-committed,RISC-V] Avoid propagating constant AVL for theadvector - - - - --- 2025-07-08 Jeff Law New
[committed] Minor fix to gcc.dg/torture/pr120654.c [committed] Minor fix to gcc.dg/torture/pr120654.c - - - - --- 2025-07-08 Jeff Law New
[committed,RISC-V] Fix testsuite fallout from check-function-bodies change [committed,RISC-V] Fix testsuite fallout from check-function-bodies change - - - - --- 2025-07-08 Jeff Law New
[PR,sanitizer/119356] Cherry pick bugfix from LLVM sanitizer runtime [PR,sanitizer/119356] Cherry pick bugfix from LLVM sanitizer runtime - - - - --- 2025-06-27 Jeff Law New
[to-be-committed,RISC-V,PR,target/118734] Make using zero-strided loads a uarch tunable [to-be-committed,RISC-V,PR,target/118734] Make using zero-strided loads a uarch tunable - - - - --- 2025-06-24 Jeff Law New
[committed,PR,rtl-optimization/120550] Drop REG_EQUAL note after ext-dce transformation [committed,PR,rtl-optimization/120550] Drop REG_EQUAL note after ext-dce transformation - - - - --- 2025-06-22 Jeff Law New
[to-be-committed,RISC-V,PR,target/119830] Fix RISC-V codegen on 32bit hosts [to-be-committed,RISC-V,PR,target/119830] Fix RISC-V codegen on 32bit hosts - - - - --- 2025-06-22 Jeff Law New
[to-be-committed,RISC-V,PR,target/118241] Fix data prefetch predicate/constraint for RISC-V [to-be-committed,RISC-V,PR,target/118241] Fix data prefetch predicate/constraint for RISC-V - - - - --- 2025-06-21 Jeff Law New
[to-be-committed,RISC-V] Force several tests to use rocket tuning [to-be-committed,RISC-V] Force several tests to use rocket tuning - - - - --- 2025-06-19 Jeff Law New
[to-be-committed,RISC-V] Fix ICE due to splitter emitting constant loads directly [to-be-committed,RISC-V] Fix ICE due to splitter emitting constant loads directly - - - - --- 2025-06-09 Jeff Law New
[to-be-committed,RISC-V] Add support for 32bit conditional move source/destinations on rv64 [to-be-committed,RISC-V] Add support for 32bit conditional move source/destinations on rv64 - - - - --- 2025-06-08 Jeff Law New
[to-be-committed,RISC-V] Handle 32bit operands in condition for conditional moves [to-be-committed,RISC-V] Handle 32bit operands in condition for conditional moves - - - - --- 2025-06-06 Jeff Law New
[committed] Fix compromised ARC test [committed] Fix compromised ARC test - - - - --- 2025-06-06 Jeff Law New
[to-be-committed,RISC-V] Improve signed division by 2^n [to-be-committed,RISC-V] Improve signed division by 2^n - - - - --- 2025-06-05 Jeff Law New
[to-be-committed,RISC-V] Add andi+bclr synthesis [to-be-committed,RISC-V] Add andi+bclr synthesis - - - - --- 2025-05-24 Jeff Law New
[to-be-committed,RISC-V] Clear both upper and lower bits using 3 shifts [to-be-committed,RISC-V] Clear both upper and lower bits using 3 shifts - - - - --- 2025-05-22 Jeff Law New
[to-be-committed,RISC-V] Improve (x << C1) + C2 split code [to-be-committed,RISC-V] Improve (x << C1) + C2 split code - - - - --- 2025-05-21 Jeff Law New
[committed,RISC-V,PR,target/120333] Remove bogus bext pattern [committed,RISC-V,PR,target/120333] Remove bogus bext pattern - - - - --- 2025-05-19 Jeff Law New
[committed,RISC-V] Fix false positive from Wuninitialized [committed,RISC-V] Fix false positive from Wuninitialized - - - - --- 2025-05-19 Jeff Law New
[to-be-committed,RISC-V] Avoid multiple assignments to output object [to-be-committed,RISC-V] Avoid multiple assignments to output object - - - - --- 2025-05-18 Jeff Law New
[to-be-committed,RISC-V] Fix ICE due to bogus use of gen_rtvec [to-be-committed,RISC-V] Fix ICE due to bogus use of gen_rtvec - - - - --- 2025-05-17 Jeff Law New
[to-be-committed,RISC-V] Avoid setting output object more than once in IOR/XOR synthesis [to-be-committed,RISC-V] Avoid setting output object more than once in IOR/XOR synthesis - - - - --- 2025-05-16 Jeff Law New
[to-be-committed,RISC-V,PR,target/120223] Don't use bset/binv for XTHEADBS [to-be-committed,RISC-V,PR,target/120223] Don't use bset/binv for XTHEADBS - - - - --- 2025-05-13 Jeff Law New
[to-be-committed,V2,RISC-V] Synthesize more efficient IOR/XOR sequences [to-be-committed,V2,RISC-V] Synthesize more efficient IOR/XOR sequences - - - - --- 2025-05-08 Jeff Law New
[to-be-committed,RISC-V] Synthesize more efficient IOR/XOR sequences [to-be-committed,RISC-V] Synthesize more efficient IOR/XOR sequences - - - - --- 2025-05-08 Jeff Law New
[to-be-committed,RISC-V,PR,target/120137] Don't create out-of-range permutation constants [to-be-committed,RISC-V,PR,target/120137] Don't create out-of-range permutation constants - - - - --- 2025-05-07 Jeff Law New
[to-be-committed,RISC-V] Avoid unnecessary andi with -1 argument [to-be-committed,RISC-V] Avoid unnecessary andi with -1 argument - - - - --- 2025-05-06 Jeff Law New
[RISC-V,PR,target/119971] Avoid losing shift count masking [RISC-V,PR,target/119971] Avoid losing shift count masking - - - - --- 2025-05-05 Jeff Law New
[to-be-committed,RISC-V,PR,target/119971] Avoid losing shift count masking [to-be-committed,RISC-V,PR,target/119971] Avoid losing shift count masking - - - - --- 2025-05-05 Jeff Law New
[V2,to-be-committed,RISC-V] Trivial permutation constant derivation [V2,to-be-committed,RISC-V] Trivial permutation constant derivation - - - - --- 2025-05-04 Jeff Law New
[to-be-committed,RISC-V] Adjust rvv tests after recent jump threading change [to-be-committed,RISC-V] Adjust rvv tests after recent jump threading change - - - - --- 2025-05-04 Jeff Law New
[to-be-committed] Adjust rvv tests after recent jump threading change [to-be-committed] Adjust rvv tests after recent jump threading change - - - - --- 2025-05-04 Jeff Law New
[to-be-committed,RISC-V] Adjust testcases and finish register move costing fix [to-be-committed,RISC-V] Adjust testcases and finish register move costing fix - - - - --- 2025-05-03 Jeff Law New
[RISC-V] Fix missed bext discovery [RISC-V] Fix missed bext discovery - - - - --- 2025-04-18 Jeff Law New
[committed,RISC-V] Fix more fallout from combine.c changes -- correct patch attached this time [committed,RISC-V] Fix more fallout from combine.c changes -- correct patch attached this time - - - - --- 2025-04-09 Jeff Law New
[committed,RISC-V] Fix more fallout from combine.c changes [committed,RISC-V] Fix more fallout from combine.c changes - - - - --- 2025-04-09 Jeff Law New
[RISC-V] Fix unreported code quality regression with single bit manipulations [RISC-V] Fix unreported code quality regression with single bit manipulations - - - - --- 2025-03-17 Jeff Law New
[to-be-committed,RISC-V,PR,target/116256,V4] Fix minor code quality regression in reassociated arit… [to-be-committed,RISC-V,PR,target/116256,V4] Fix minor code quality regression in reassociated arit… - - - - --- 2025-03-16 Jeff Law New
[to-be-committed,RISC-V,PR,target/116256,V3] Fix minor code quality regression in reassociated arit… [to-be-committed,RISC-V,PR,target/116256,V3] Fix minor code quality regression in reassociated arit… - - - - --- 2025-03-16 Jeff Law New
[to-be-committed,RISC-V,PR,target/116256,V2] Fix minor code quality regression in reassociated arit… [to-be-committed,RISC-V,PR,target/116256,V2] Fix minor code quality regression in reassociated arit… - - - - --- 2025-03-16 Jeff Law New
[rtl-optimization/117467] Mark FP destinations as dead [rtl-optimization/117467] Mark FP destinations as dead - - - - --- 2025-03-09 Jeff Law New
[rtl-optimization/117467] Avoid unnecessarily marking things live in ext-dce [rtl-optimization/117467] Avoid unnecessarily marking things live in ext-dce - - - - --- 2025-03-09 Jeff Law New
[to-be-committed,RISC-V,PR,rtl-optimization/119099] Avoid infinite loop in ext-dce. [to-be-committed,RISC-V,PR,rtl-optimization/119099] Avoid infinite loop in ext-dce. - - - - --- 2025-03-06 Jeff Law New
[to-be-committed,RISC-V,PR,target/116256] Fix minor code quality regression in reassociated arithme… [to-be-committed,RISC-V,PR,target/116256] Fix minor code quality regression in reassociated arithme… - - - - --- 2025-03-02 Jeff Law New
[RFC,PR,tree-optimization/117829] Bogus Warray-bounds warning [RFC,PR,tree-optimization/117829] Bogus Warray-bounds warning - - - - --- 2025-02-19 Jeff Law New
[committed,PR,middle-end/113525] Drop obsolete options from documentation [committed,PR,middle-end/113525] Drop obsolete options from documentation - - - - --- 2025-02-19 Jeff Law New
[to-be-committed,RISC-V,PR,target/118248] Avoid bogus alloca call in RISC-V backend [to-be-committed,RISC-V,PR,target/118248] Avoid bogus alloca call in RISC-V backend - - - - --- 2025-02-16 Jeff Law New
[RFA,PR,tree-optimization/98028] Use relationship between operands to simplify SUB_OVERFLOW [RFA,PR,tree-optimization/98028] Use relationship between operands to simplify SUB_OVERFLOW - - - - --- 2025-02-12 Jeff Law New
[RFA,PR,target/115478] Accept ADD, IOR or XOR when combining objects with no bits in common [RFA,PR,target/115478] Accept ADD, IOR or XOR when combining objects with no bits in common - - - - --- 2025-02-10 Jeff Law New
[committed,RISC-V,PR,target/115123] Fix testsuite fallout from sinking heuristic change [committed,RISC-V,PR,target/115123] Fix testsuite fallout from sinking heuristic change - - - - --- 2025-02-09 Jeff Law New
[committed,PR,middle-end/117263] Avoid unused-but-set warning in genautomata [committed,PR,middle-end/117263] Avoid unused-but-set warning in genautomata - - - - --- 2025-02-09 Jeff Law New
[committed,RISC-V] Fix risc-v expected test output after recent iv changes [committed,RISC-V] Fix risc-v expected test output after recent iv changes - - - - --- 2025-02-06 Jeff Law New
[committed,PR,tree-optimization/114277] Fix missed optimization for multiplication against boolean … [committed,PR,tree-optimization/114277] Fix missed optimization for multiplication against boolean … - - - - --- 2025-02-01 Jeff Law New
[committed,PR,target/114085] Fix H8 constraint issue which led to ICE [committed,PR,target/114085] Fix H8 constraint issue which led to ICE - - - - --- 2025-01-28 Jeff Law New
[to-be-committed,RISC-V,PR,target/116256] Improve handling of single bit constants [to-be-committed,RISC-V,PR,target/116256] Improve handling of single bit constants - - - - --- 2025-01-25 Jeff Law New
[to-be-committed,RISC-V,PR,target/116256] Fix incorrect return value for predicate [to-be-committed,RISC-V,PR,target/116256] Fix incorrect return value for predicate - - - - --- 2025-01-21 Jeff Law New
[committed,PR,target/116256] Adjust expected output in a couple testcases [committed,PR,target/116256] Adjust expected output in a couple testcases - - - - --- 2025-01-20 Jeff Law New
[to-be-committed,PR,target/114442] Add reservations for all insn types to xiangshan-nanhu model [to-be-committed,PR,target/114442] Add reservations for all insn types to xiangshan-nanhu model - - - - --- 2025-01-20 Jeff Law New
[committed,PR,rtl-optimization/107455] Eliminate unnecessary constant load - v3 [committed,PR,rtl-optimization/107455] Eliminate unnecessary constant load - v3 - - - - --- 2025-01-13 Jeff Law New
[committed] Fix regression in ft32 port after recent switch table adjustments [committed] Fix regression in ft32 port after recent switch table adjustments - - - - --- 2025-01-07 Jeff Law New
[committed,PR,testsuite/118055] Trivial testsuite adjustment for m68k target [committed,PR,testsuite/118055] Trivial testsuite adjustment for m68k target - - - - --- 2025-01-07 Jeff Law New
[RFC/RFA,PR,tree-optimization/92539] Improve code and avoid Warray-bounds false positive [RFC/RFA,PR,tree-optimization/92539] Improve code and avoid Warray-bounds false positive - - - - --- 2025-01-03 Jeff Law New
[RFA,PR,rtl-optimization/107455] Eliminate unnecessary constant load [RFA,PR,rtl-optimization/107455] Eliminate unnecessary constant load - - - - --- 2025-01-02 Jeff Law New
[committed,RISC-V,PR,target/115375] Fix expected dump output [committed,RISC-V,PR,target/115375] Fix expected dump output - - - - --- 2024-12-31 Jeff Law New
[PR,testsuite/114182] Fix minor testsuite issue when double == float [PR,testsuite/114182] Fix minor testsuite issue when double == float - - - - --- 2024-12-30 Jeff Law New
[RFA,PR,rtl-optimization/109592] Improve fwprop's handling of nested shifts/extensions [RFA,PR,rtl-optimization/109592] Improve fwprop's handling of nested shifts/extensions - - - - --- 2024-12-30 Jeff Law New
[to-be-committed,RISC-V,PR,target/106544] Avoid ICEs due to bogus asms [to-be-committed,RISC-V,PR,target/106544] Avoid ICEs due to bogus asms - - - - --- 2024-12-30 Jeff Law New
[to-be-committed,RISC-V,PR,target/118122] Fix modes in recently added risc-v pattern [to-be-committed,RISC-V,PR,target/118122] Fix modes in recently added risc-v pattern - - - - --- 2024-12-30 Jeff Law New
[to-be-committed,RISC-V,V2,PR,target/116715] Remove bogus bitmanip pattern [to-be-committed,RISC-V,V2,PR,target/116715] Remove bogus bitmanip pattern - - - - --- 2024-12-29 Jeff Law New
[to-be-committed,RISC-V,PR,target/116686] Remove bogus bitmanip pattern [to-be-committed,RISC-V,PR,target/116686] Remove bogus bitmanip pattern - - - - --- 2024-12-29 Jeff Law New
[RISC-V,PR,middle-end/118084] Fix brev based reflection code [RISC-V,PR,middle-end/118084] Fix brev based reflection code - - - - --- 2024-12-18 Jeff Law New
[committed] RISC-V testsuite changes to test clmul expansion of CRCs [committed] RISC-V testsuite changes to test clmul expansion of CRCs - - - - --- 2024-12-09 Jeff Law New
[committed] Move some CRC tests into the gcc.dg/torture directory [committed] Move some CRC tests into the gcc.dg/torture directory - - - - --- 2024-12-03 Jeff Law New
[committed] Add sym-exec subdirectory to configure.in rather than generated configure [committed] Add sym-exec subdirectory to configure.in rather than generated configure - - - - --- 2024-12-02 Jeff Law New
[committed] Patches 8-12 of Mariam & Matevos's CRC optimization work [committed] Patches 8-12 of Mariam & Matevos's CRC optimization work - - - - --- 2024-12-01 Jeff Law New
[v7,03/12] RISC-V: Add CRC expander to generate faster CRC. Untitled series #434705 - - - - --- 2024-11-29 Jeff Law New
[committed] First two patches from Mariam's CRC work [committed] First two patches from Mariam's CRC work - - - - --- 2024-11-28 Jeff Law New
[to-be-committed,RISC-V,PR,target/109s79] Improve RISC-V constant synthesis [to-be-committed,RISC-V,PR,target/109s79] Improve RISC-V constant synthesis - - - - --- 2024-11-22 Jeff Law New
[committed,RISC-V,PR,target/117595] Fix bogus use of simplify_gen_subreg [committed,RISC-V,PR,target/117595] Fix bogus use of simplify_gen_subreg - - - - --- 2024-11-18 Jeff Law New
[committed] Fix more c23 bool fallout [committed] Fix more c23 bool fallout - - - - --- 2024-11-18 Jeff Law New
[RFA] Fix csky and c6x build failures [RFA] Fix csky and c6x build failures - - - - --- 2024-11-17 Jeff Law New
[committed] RISC-V testsuite adjustments for c23 [committed] RISC-V testsuite adjustments for c23 - - - - --- 2024-11-16 Jeff Law New
[committed] Adjust ARC tests after c23 changes [committed] Adjust ARC tests after c23 changes - - - - --- 2024-11-16 Jeff Law New
[committed] Fix various sh tests to work with c23 [committed] Fix various sh tests to work with c23 - - - - --- 2024-11-16 Jeff Law New
[committed] Fix compilation of testglue wrapper after c23 changes [committed] Fix compilation of testglue wrapper after c23 changes - - - - --- 2024-11-16 Jeff Law New
[to-be-committed,RISC-V,V2] Fix type on vector move patterns [to-be-committed,RISC-V,V2] Fix type on vector move patterns - - - - --- 2024-11-14 Jeff Law New
contrib: Add 2 further ignored commits contrib: Add 2 further ignored commits - - - - --- 2024-11-14 Jeff Law New
[to-be-committed,RISC-V] Fix costing of LO_SUM expressions [to-be-committed,RISC-V] Fix costing of LO_SUM expressions - - - - --- 2024-11-12 Jeff Law New
[committed] Fix minor c6x backend bug exposed by CRC patches [committed] Fix minor c6x backend bug exposed by CRC patches - - - - --- 2024-11-12 Jeff Law New
[committed] ft32 doesn't support trampolines. [committed] ft32 doesn't support trampolines. - - - - --- 2024-11-02 Jeff Law New
[committed] Make LRA default for ft32 and remove -mlra option [committed] Make LRA default for ft32 and remove -mlra option - - - - --- 2024-11-02 Jeff Law New
[RISC-V] Reorder the ready queue to avoid extraneous vsetvls [RISC-V] Reorder the ready queue to avoid extraneous vsetvls - - - - --- 2024-10-31 Jeff Law New
[committed,target/117316] Fix initializer for riscv code alignment handling [committed,target/117316] Fix initializer for riscv code alignment handling - - - - --- 2024-10-28 Jeff Law New
[committed,PR,rtl-optimization/116488] Fix SIGN_EXTEND source handling in ext-dce [committed,PR,rtl-optimization/116488] Fix SIGN_EXTEND source handling in ext-dce - - - - --- 2024-10-21 Jeff Law New
[to-be-committed,RISC-V,PR,target/116615] RISC-V: Use default LOGICAL_OP_NON_SHORT_CIRCUIT [to-be-committed,RISC-V,PR,target/116615] RISC-V: Use default LOGICAL_OP_NON_SHORT_CIRCUIT - - - - --- 2024-10-08 Jeff Law New
[to-be-committed,V2,RISC-V] Add splitters to restore condops generation after recent phiopt changes [to-be-committed,V2,RISC-V] Add splitters to restore condops generation after recent phiopt changes - - - - --- 2024-10-06 Jeff Law New
[to-be-committed,V2,RISC-V] Avoid unnecessary extensions after sCC insns [to-be-committed,V2,RISC-V] Avoid unnecessary extensions after sCC insns - - - - --- 2024-09-05 Jeff Law New
[to-be-committed,RISC-V] Avoid unnecessary extensions after sCC insns [to-be-committed,RISC-V] Avoid unnecessary extensions after sCC insns 1 - 1 - --- 2024-09-04 Jeff Law New
[to-be-committed,RISC-V,PR,target/115921] Improve reassociation for rv64 [to-be-committed,RISC-V,PR,target/115921] Improve reassociation for rv64 - - - - --- 2024-09-02 Jeff Law New
[to-be-committed,PR,target/115921] Improve reassociation for rv64 [to-be-committed,PR,target/115921] Improve reassociation for rv64 - - - - --- 2024-09-02 Jeff Law New
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