| Message ID | f9a665e922393c39ba77ebb50d26d34803602004.1710098033.git.tejas.arvind.bhumkar@amd.com |
|---|---|
| State | New |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show
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Mon, 11 Mar 2024 12:23:36 -0500 From: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com> To: <u-boot@lists.denx.de> CC: <jagan@amarulasolutions.com>, <n-francis@ti.com>, <michal.simek@amd.com>, <venkatesh.abbarapu@amd.com>, <git@amd.com>, T Karthik Reddy <t.karthik.reddy@xilinx.com> Subject: [PATCH 16/19] arm64: versal: Enable soft reset support for xspi flashes Date: Mon, 11 Mar 2024 22:52:46 +0530 Message-ID: <f9a665e922393c39ba77ebb50d26d34803602004.1710098033.git.tejas.arvind.bhumkar@amd.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <cover.1710098033.git.tejas.arvind.bhumkar@amd.com> References: <cover.1710098033.git.tejas.arvind.bhumkar@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain Received-SPF: None (SATLEXMB03.amd.com: tejas.arvind.bhumkar@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF00003439:EE_|PH0PR12MB7958:EE_ X-MS-Office365-Filtering-Correlation-Id: 232b9e09-660b-48a7-f031-08dc41effdf3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Add support for DDR PHY mode
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expand
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diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 78141bd45f..92c95e6b5d 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -93,6 +93,8 @@ CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000 CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y