| Message ID | 1bb288f1901318b6cfc200bef148293a501ab343.1710098033.git.tejas.arvind.bhumkar@amd.com |
|---|---|
| State | New |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show
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| Series |
Add support for DDR PHY mode
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expand
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diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index c9b8a6de01..78141bd45f 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -98,6 +98,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MT35XU=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
The Micron MT35 series octal flashes can be activated through the configuration option CONFIG_SPI_FLASH_MT35XU. To ensure their detection, enable this option in the default defconfig for octal flashes. Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com> --- configs/xilinx_versal_virt_defconfig | 1 + 1 file changed, 1 insertion(+)