diff mbox series

[U-Boot,v3,24/25] riscv: bootm: Change to use boot_hart from global data

Message ID 1544520901-31558-25-git-send-email-bmeng.cn@gmail.com
State Superseded
Delegated to: Andes
Headers show
Series riscv: Adding RISC-V CPU and timer driver | expand

Commit Message

Bin Meng Dec. 11, 2018, 9:35 a.m. UTC 
Avoid reading mhartid CSR directly, instead use the one we saved
in the global data structure before.

With this patch, BBL no longer needs to be hacked to provide the
mhartid CSR emulation for S-mode U-Boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v3:
- new patch to change to use boot_hart from global data

Changes in v2: None

 arch/riscv/lib/bootm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Lukas Auer Dec. 11, 2018, 11:23 p.m. UTC | #1 
On Tue, 2018-12-11 at 01:35 -0800, Bin Meng wrote:
> Avoid reading mhartid CSR directly, instead use the one we saved
> in the global data structure before.
> 
> With this patch, BBL no longer needs to be hacked to provide the
> mhartid CSR emulation for S-mode U-Boot.
> 
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> 
> ---
> 
> Changes in v3:
> - new patch to change to use boot_hart from global data
> 
> Changes in v2: None
> 
>  arch/riscv/lib/bootm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
diff mbox series

Patch

diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 124aeef..60b32cc 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -93,7 +93,7 @@  static void boot_jump_linux(bootm_headers_t *images, int flag)
 
 	if (!fake) {
 		if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len)
-			kernel(csr_read(mhartid), images->ft_addr);
+			kernel(gd->arch.boot_hart, images->ft_addr);
 	}
 }