Message ID | 1544192072-28764-13-git-send-email-bmeng.cn@gmail.com |
---|---|
State | Superseded |
Delegated to: | Andes |
Headers | show |
Series | riscv: Adding RISC-V CPU and timer driver | expand |
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index d9f820c..3858e51 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -4,6 +4,8 @@ */ #include <common.h> +#include <cpu.h> +#include <log.h> #include <asm/csr.h> /* @@ -53,3 +55,15 @@ int print_cpuinfo(void) return 0; } + +int arch_early_init_r(void) +{ + int ret; + + /* probe cpus so that RISC-V timer can be bound */ + ret = cpu_probe_all(); + if (ret) + return log_msg_ret("RISC-V cpus probe failed\n", ret); + + return 0; +} diff --git a/arch/riscv/cpu/qemu/Kconfig b/arch/riscv/cpu/qemu/Kconfig index 2e953e1..f48751e 100644 --- a/arch/riscv/cpu/qemu/Kconfig +++ b/arch/riscv/cpu/qemu/Kconfig @@ -4,6 +4,7 @@ config QEMU_RISCV bool + select ARCH_EARLY_INIT_R imply CPU imply CPU_RISCV imply RISCV_TIMER