diff mbox series

[U-Boot,7/9] x86: braswell: cherryhill: Update dts for SPI lock down

Message ID 1508376060-29425-7-git-send-email-bmeng.cn@gmail.com
State Accepted
Commit 4c9f4c5ee4ac15a285f3ceb25752432990084dc1
Delegated to: Bin Meng
Headers show
Series [U-Boot,1/9] x86: galileo: Fix boot failure | expand

Commit Message

Bin Meng Oct. 19, 2017, 1:20 a.m. UTC
Intel Braswell FSP requires SPI controller settings to be locked down,
let's do this in the chrryhill.dts and remove previous Kconfig option.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 arch/x86/cpu/braswell/Kconfig | 4 ----
 arch/x86/dts/cherryhill.dts   | 1 +
 2 files changed, 1 insertion(+), 4 deletions(-)

Comments

Simon Glass Oct. 22, 2017, 2:36 p.m. UTC | #1
On 19 October 2017 at 03:20, Bin Meng <bmeng.cn@gmail.com> wrote:
> Intel Braswell FSP requires SPI controller settings to be locked down,
> let's do this in the chrryhill.dts and remove previous Kconfig option.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>
>  arch/x86/cpu/braswell/Kconfig | 4 ----
>  arch/x86/dts/cherryhill.dts   | 1 +
>  2 files changed, 1 insertion(+), 4 deletions(-)

Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng Oct. 27, 2017, 7:12 a.m. UTC | #2
On Sun, Oct 22, 2017 at 10:36 PM, Simon Glass <sjg@chromium.org> wrote:
> On 19 October 2017 at 03:20, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Intel Braswell FSP requires SPI controller settings to be locked down,
>> let's do this in the chrryhill.dts and remove previous Kconfig option.
>>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> ---
>>
>>  arch/x86/cpu/braswell/Kconfig | 4 ----
>>  arch/x86/dts/cherryhill.dts   | 1 +
>>  2 files changed, 1 insertion(+), 4 deletions(-)
>
> Reviewed-by: Simon Glass <sjg@chromium.org>

applied to u-boot-x86, thanks!
diff mbox series

Patch

diff --git a/arch/x86/cpu/braswell/Kconfig b/arch/x86/cpu/braswell/Kconfig
index 616f228..31ac279 100644
--- a/arch/x86/cpu/braswell/Kconfig
+++ b/arch/x86/cpu/braswell/Kconfig
@@ -31,8 +31,4 @@  config FSP_ADDR
 	hex
 	default 0xfff20000
 
-config FSP_LOCKDOWN_SPI
-	bool
-	default y
-
 endif
diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts
index 840a669..41e72f3 100644
--- a/arch/x86/dts/cherryhill.dts
+++ b/arch/x86/dts/cherryhill.dts
@@ -143,6 +143,7 @@ 
 				#address-cells = <1>;
 				#size-cells = <0>;
 				compatible = "intel,ich9-spi";
+				intel,spi-lock-down;
 
 				spi-flash@0 {
 					#address-cells = <1>;