| Message ID | 1537970122-26443-1-git-send-email-bmeng.cn@gmail.com |
|---|---|
| Headers | show |
| Series | riscv: Add QEMU virt board support | expand |
Hi Rick, On Wed, Sep 26, 2018 at 9:50 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > This series adds QEMU RISC-V 'virt' board target support, with the > hope of helping people easily test U-Boot on RISC-V. > > Some existing RISC-V codes have been changed to make it easily to > support new targets. Some spotted coding style issues are fixed. > > This series is available at u-boot-x86/riscv-working for testing. > > Changes in v3: > - net patch to print the relocation address in cmd 'bdinfo' > - new patch to imply DM support for some common drivers > - reword the reset message a little, and call hang() in the end > > Changes in v2: > - Change Linux kernel entry parameters' type to support 32/64 bit > - new patch to remove CSR read/write defines in encoding.h > - new patch to pass mhartid CSR value to kernel > - new patch to move do_reset() to a common place > Any comments for v3? Regards, Bin
On Fri, Sep 28, 2018 at 10:10 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > Hi Rick, > > On Wed, Sep 26, 2018 at 9:50 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > This series adds QEMU RISC-V 'virt' board target support, with the > > hope of helping people easily test U-Boot on RISC-V. > > > > Some existing RISC-V codes have been changed to make it easily to > > support new targets. Some spotted coding style issues are fixed. > > > > This series is available at u-boot-x86/riscv-working for testing. > > > > Changes in v3: > > - net patch to print the relocation address in cmd 'bdinfo' > > - new patch to imply DM support for some common drivers > > - reword the reset message a little, and call hang() in the end > > > > Changes in v2: > > - Change Linux kernel entry parameters' type to support 32/64 bit > > - new patch to remove CSR read/write defines in encoding.h > > - new patch to pass mhartid CSR value to kernel > > - new patch to move do_reset() to a common place > > > > Any comments for v3? Ping?
> > > Hi Rick, > > > > > > On Wed, Sep 26, 2018 at 9:50 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > > > > > This series adds QEMU RISC-V 'virt' board target support, with the > > > > hope of helping people easily test U-Boot on RISC-V. > > > > > > > > Some existing RISC-V codes have been changed to make it easily to > > > > support new targets. Some spotted coding style issues are fixed. > > > > > > > > This series is available at u-boot-x86/riscv-working for testing. > > > > > > > > Changes in v3: > > > > - net patch to print the relocation address in cmd 'bdinfo' > > > > - new patch to imply DM support for some common drivers > > > > - reword the reset message a little, and call hang() in the end > > > > > > > > Changes in v2: > > > > - Change Linux kernel entry parameters' type to support 32/64 bit > > > > - new patch to remove CSR read/write defines in encoding.h > > > > - new patch to pass mhartid CSR value to kernel > > > > - new patch to move do_reset() to a common place > > > > > > > > > > Any comments for v3? > > > > Ping? Hi Bin Sorry! I was busy last week. Yes. The V3 patch-sets looks fine. But the merge window is closed. I miss it. I will sync u-boot-riscv.git to u-boot.git and merge the v3 patch-sets to u-boot-riscv.git this week. I am not sure if I can send pull request to Tom about those merges after the merge window was closed? Or I shall wait for next time merge window opening ? Rick
Hi Rick, On Wed, Oct 3, 2018 at 9:00 AM Rick Chen <rickchen36@gmail.com> wrote: > > > > > Hi Rick, > > > > > > > > On Wed, Sep 26, 2018 at 9:50 PM Bin Meng <bmeng.cn@gmail.com> wrote: > > > > > > > > > > This series adds QEMU RISC-V 'virt' board target support, with the > > > > > hope of helping people easily test U-Boot on RISC-V. > > > > > > > > > > Some existing RISC-V codes have been changed to make it easily to > > > > > support new targets. Some spotted coding style issues are fixed. > > > > > > > > > > This series is available at u-boot-x86/riscv-working for testing. > > > > > > > > > > Changes in v3: > > > > > - net patch to print the relocation address in cmd 'bdinfo' > > > > > - new patch to imply DM support for some common drivers > > > > > - reword the reset message a little, and call hang() in the end > > > > > > > > > > Changes in v2: > > > > > - Change Linux kernel entry parameters' type to support 32/64 bit > > > > > - new patch to remove CSR read/write defines in encoding.h > > > > > - new patch to pass mhartid CSR value to kernel > > > > > - new patch to move do_reset() to a common place > > > > > > > > > > > > > Any comments for v3? > > > > > > Ping? > > Hi Bin > > Sorry! I was busy last week. > Yes. The V3 patch-sets looks fine. > > But the merge window is closed. I miss it. > I will sync u-boot-riscv.git to u-boot.git and merge the v3 patch-sets > to u-boot-riscv.git this week. > > I am not sure if I can send pull request to Tom about those merges > after the merge window was closed? > Or I shall wait for next time merge window opening ? Per my experience, this PR can be accepted even after PR. After all, the changes are purely limited in the risc-v domain, so its risk to breaks other stuff are low. Regards, Bin
Hi Bin, On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote: > This series adds QEMU RISC-V 'virt' board target support, with the > hope of helping people easily test U-Boot on RISC-V. > > Some existing RISC-V codes have been changed to make it easily to > support new targets. Some spotted coding style issues are fixed. > > This series is available at u-boot-x86/riscv-working for testing. > > Changes in v3: > - net patch to print the relocation address in cmd 'bdinfo' > - new patch to imply DM support for some common drivers > - reword the reset message a little, and call hang() in the end > > Changes in v2: > - Change Linux kernel entry parameters' type to support 32/64 bit > - new patch to remove CSR read/write defines in encoding.h > - new patch to pass mhartid CSR value to kernel > - new patch to move do_reset() to a common place > One more thing, I wanted to let you know about. I am already able to boot Linux in QEMU with this patch series, and u-boot master now. I had to make minor changes to the board config / environment to enable FIT images, though jumping directly to bbl + Linux with 'go' should work as well. I did modify QEMU slightly so that it also loads binaries instead of just ELF files. I am planning to start sending my patches to u-boot and QEMU next week. Thanks, Lukas
Hi Lukas, On Thu, Oct 4, 2018 at 12:45 AM Auer, Lukas <lukas.auer@aisec.fraunhofer.de> wrote: > > Hi Bin, > > On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote: > > This series adds QEMU RISC-V 'virt' board target support, with the > > hope of helping people easily test U-Boot on RISC-V. > > > > Some existing RISC-V codes have been changed to make it easily to > > support new targets. Some spotted coding style issues are fixed. > > > > This series is available at u-boot-x86/riscv-working for testing. > > > > Changes in v3: > > - net patch to print the relocation address in cmd 'bdinfo' > > - new patch to imply DM support for some common drivers > > - reword the reset message a little, and call hang() in the end > > > > Changes in v2: > > - Change Linux kernel entry parameters' type to support 32/64 bit > > - new patch to remove CSR read/write defines in encoding.h > > - new patch to pass mhartid CSR value to kernel > > - new patch to move do_reset() to a common place > > > > One more thing, I wanted to let you know about. I am already able to > boot Linux in QEMU with this patch series, and u-boot master now. I had > to make minor changes to the board config / environment to enable FIT > images, though jumping directly to bbl + Linux with 'go' should work as > well. Good to know. > I did modify QEMU slightly so that it also loads binaries instead of > just ELF files. I am planning to start sending my patches to u-boot and > QEMU next week. Do you mean QEMU's -kernel parameter? Regards, Bin
Hi Bin, On Thu, 2018-10-04 at 15:01 +0800, Bin Meng wrote: > Hi Lukas, > > On Thu, Oct 4, 2018 at 12:45 AM Auer, Lukas > <lukas.auer@aisec.fraunhofer.de> wrote: > > > > Hi Bin, > > > > On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote: > > > This series adds QEMU RISC-V 'virt' board target support, with > > > the > > > hope of helping people easily test U-Boot on RISC-V. > > > > > > Some existing RISC-V codes have been changed to make it easily to > > > support new targets. Some spotted coding style issues are fixed. > > > > > > This series is available at u-boot-x86/riscv-working for testing. > > > > > > Changes in v3: > > > - net patch to print the relocation address in cmd 'bdinfo' > > > - new patch to imply DM support for some common drivers > > > - reword the reset message a little, and call hang() in the end > > > > > > Changes in v2: > > > - Change Linux kernel entry parameters' type to support 32/64 bit > > > - new patch to remove CSR read/write defines in encoding.h > > > - new patch to pass mhartid CSR value to kernel > > > - new patch to move do_reset() to a common place > > > > > > > One more thing, I wanted to let you know about. I am already able > > to > > boot Linux in QEMU with this patch series, and u-boot master now. I > > had > > to make minor changes to the board config / environment to enable > > FIT > > images, though jumping directly to bbl + Linux with 'go' should > > work as > > well. > > Good to know. > > > I did modify QEMU slightly so that it also loads binaries instead > > of > > just ELF files. I am planning to start sending my patches to u-boot > > and > > QEMU next week. > > Do you mean QEMU's -kernel parameter? > > Regards, > Bin Yes. I also modified the -bios parameter, though that's not strictly needed. Thanks, Lukas
This series adds QEMU RISC-V 'virt' board target support, with the hope of helping people easily test U-Boot on RISC-V. Some existing RISC-V codes have been changed to make it easily to support new targets. Some spotted coding style issues are fixed. This series is available at u-boot-x86/riscv-working for testing. Changes in v3: - net patch to print the relocation address in cmd 'bdinfo' - new patch to imply DM support for some common drivers - reword the reset message a little, and call hang() in the end Changes in v2: - Change Linux kernel entry parameters' type to support 32/64 bit - new patch to remove CSR read/write defines in encoding.h - new patch to pass mhartid CSR value to kernel - new patch to move do_reset() to a common place Bin Meng (17): riscv: kconfig: Normalize architecture name spelling riscv: Remove setup.h riscv: bootm: Correct the 1st kernel argument to hart id riscv: Remove mach type riscv: cmd: bdinfo: Print the relocation address riscv: Move the linker script to the CPU root directory riscv: Fix coding style issues in the linker script riscv: Explicitly pass -march and -mabi to the compiler riscv: Add a helper routine to print CPU information riscv: Remove CSR read/write defines in encoding.h riscv: bootm: Pass mhartid CSR value to kernel riscv: Make start.S available for all targets riscv: ae350: Clean up mixed tabs and spaces in the dts riscv: kconfig: Select DM and OF_CONTROL riscv: kconfig: Imply DM support for some common drivers riscv: Add QEMU virt board support riscv: Move do_reset() to a common place arch/Kconfig | 14 ++- arch/riscv/Kconfig | 10 +- arch/riscv/Makefile | 3 +- arch/riscv/config.mk | 8 +- arch/riscv/cpu/Makefile | 7 ++ arch/riscv/cpu/ax25/Makefile | 2 - arch/riscv/cpu/ax25/cpu.c | 9 -- arch/riscv/cpu/cpu.c | 49 ++++++++ arch/riscv/cpu/qemu/Makefile | 6 + arch/riscv/cpu/qemu/cpu.c | 21 ++++ arch/riscv/cpu/qemu/dram.c | 17 +++ arch/riscv/cpu/{ax25 => }/start.S | 0 arch/riscv/cpu/{ax25 => }/u-boot.lds | 60 +++++----- arch/riscv/dts/ae350.dts | 177 +++++++++++++++-------------- arch/riscv/include/asm/bootm.h | 13 --- arch/riscv/include/asm/csr.h | 124 ++++++++++++++++++++ arch/riscv/include/asm/encoding.h | 50 +------- arch/riscv/include/asm/mach-types.h | 29 ----- arch/riscv/include/asm/setup.h | 194 -------------------------------- arch/riscv/include/asm/u-boot.h | 1 - arch/riscv/lib/Makefile | 1 + arch/riscv/lib/bootm.c | 20 +--- arch/riscv/lib/reset.c | 17 +++ board/AndesTech/ax25-ae350/ax25-ae350.c | 2 - board/emulation/qemu-riscv/Kconfig | 22 ++++ board/emulation/qemu-riscv/MAINTAINERS | 7 ++ board/emulation/qemu-riscv/Makefile | 5 + board/emulation/qemu-riscv/qemu-riscv.c | 23 ++++ cmd/bdinfo.c | 3 +- configs/ax25-ae350_defconfig | 10 -- configs/qemu-riscv32_defconfig | 6 + configs/qemu-riscv64_defconfig | 7 ++ doc/README.qemu-riscv | 46 ++++++++ include/configs/qemu-riscv.h | 21 ++++ 34 files changed, 538 insertions(+), 446 deletions(-) create mode 100644 arch/riscv/cpu/Makefile create mode 100644 arch/riscv/cpu/cpu.c create mode 100644 arch/riscv/cpu/qemu/Makefile create mode 100644 arch/riscv/cpu/qemu/cpu.c create mode 100644 arch/riscv/cpu/qemu/dram.c rename arch/riscv/cpu/{ax25 => }/start.S (100%) rename arch/riscv/cpu/{ax25 => }/u-boot.lds (54%) delete mode 100644 arch/riscv/include/asm/bootm.h create mode 100644 arch/riscv/include/asm/csr.h delete mode 100644 arch/riscv/include/asm/mach-types.h delete mode 100644 arch/riscv/include/asm/setup.h create mode 100644 arch/riscv/lib/reset.c create mode 100644 board/emulation/qemu-riscv/Kconfig create mode 100644 board/emulation/qemu-riscv/MAINTAINERS create mode 100644 board/emulation/qemu-riscv/Makefile create mode 100644 board/emulation/qemu-riscv/qemu-riscv.c create mode 100644 configs/qemu-riscv32_defconfig create mode 100644 configs/qemu-riscv64_defconfig create mode 100644 doc/README.qemu-riscv create mode 100644 include/configs/qemu-riscv.h