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[07/18] target/riscv: Simplify {read, write}_pmpcfg() a little bit

Message ID 20230213180215.1524938-8-bmeng@tinylab.org
State New
Headers show
Series target/riscv: Various fixes to gdbstub and CSR access | expand

Commit Message

Bin Meng Feb. 13, 2023, 6:02 p.m. UTC 
Use the register index that has already been calculated in the
pmpcfg_csr_{read,write} call.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
---

 target/riscv/csr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Weiwei Li Feb. 14, 2023, 8:50 a.m. UTC | #1 
On 2023/2/14 02:02, Bin Meng wrote:
> Use the register index that has already been calculated in the
> pmpcfg_csr_{read,write} call.
>
> Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>

Regards,
Weiwei Li
> ---
>
>   target/riscv/csr.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 8bbc75cbfa..da3b770894 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -3363,7 +3363,7 @@ static RISCVException read_pmpcfg(CPURISCVState *env, int csrno,
>       if (!check_pmp_reg_index(env, reg_index)) {
>           return RISCV_EXCP_ILLEGAL_INST;
>       }
> -    *val = pmpcfg_csr_read(env, csrno - CSR_PMPCFG0);
> +    *val = pmpcfg_csr_read(env, reg_index);
>       return RISCV_EXCP_NONE;
>   }
>   
> @@ -3375,7 +3375,7 @@ static RISCVException write_pmpcfg(CPURISCVState *env, int csrno,
>       if (!check_pmp_reg_index(env, reg_index)) {
>           return RISCV_EXCP_ILLEGAL_INST;
>       }
> -    pmpcfg_csr_write(env, csrno - CSR_PMPCFG0, val);
> +    pmpcfg_csr_write(env, reg_index, val);
>       return RISCV_EXCP_NONE;
>   }
>
LIU Zhiwei Feb. 17, 2023, 2:26 a.m. UTC | #2 
On 2023/2/14 2:02, Bin Meng wrote:
> Use the register index that has already been calculated in the
> pmpcfg_csr_{read,write} call.
>
> Signed-off-by: Bin Meng <bmeng@tinylab.org>
> ---
>
>   target/riscv/csr.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 8bbc75cbfa..da3b770894 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -3363,7 +3363,7 @@ static RISCVException read_pmpcfg(CPURISCVState *env, int csrno,
>       if (!check_pmp_reg_index(env, reg_index)) {
>           return RISCV_EXCP_ILLEGAL_INST;
>       }
> -    *val = pmpcfg_csr_read(env, csrno - CSR_PMPCFG0);
> +    *val = pmpcfg_csr_read(env, reg_index);
>       return RISCV_EXCP_NONE;
>   }
>   
> @@ -3375,7 +3375,7 @@ static RISCVException write_pmpcfg(CPURISCVState *env, int csrno,
>       if (!check_pmp_reg_index(env, reg_index)) {
>           return RISCV_EXCP_ILLEGAL_INST;
>       }
> -    pmpcfg_csr_write(env, csrno - CSR_PMPCFG0, val);
> +    pmpcfg_csr_write(env, reg_index, val);

Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>

Zhiwei

>       return RISCV_EXCP_NONE;
>   }
>
diff mbox series

Patch

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 8bbc75cbfa..da3b770894 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -3363,7 +3363,7 @@  static RISCVException read_pmpcfg(CPURISCVState *env, int csrno,
     if (!check_pmp_reg_index(env, reg_index)) {
         return RISCV_EXCP_ILLEGAL_INST;
     }
-    *val = pmpcfg_csr_read(env, csrno - CSR_PMPCFG0);
+    *val = pmpcfg_csr_read(env, reg_index);
     return RISCV_EXCP_NONE;
 }
 
@@ -3375,7 +3375,7 @@  static RISCVException write_pmpcfg(CPURISCVState *env, int csrno,
     if (!check_pmp_reg_index(env, reg_index)) {
         return RISCV_EXCP_ILLEGAL_INST;
     }
-    pmpcfg_csr_write(env, csrno - CSR_PMPCFG0, val);
+    pmpcfg_csr_write(env, reg_index, val);
     return RISCV_EXCP_NONE;
 }