Show patches with: Archived = No       |   431060 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[2/4] target-tricore: calculate av bits before saturation - - - - --- 2015-01-21 Bastian Koppelmann New
[2/4] target-tricore: typo in BOL format - - - - --- 2014-12-12 Alex Zuepke New
[2/4] target-xtensa: drop usage of prev_debug_excp_handler 1 - - - --- 2012-06-25 Igor Mammedov New
[2/4] target-xtensa: fix tb invalidation for IBREAK and LOOP - - - - --- 2012-04-09 Max Filippov New
[2/4] target-xtensa: improve unit tests debugging - - - - --- 2012-04-05 Max Filippov New
[2/4] target/alpha: Use dest_sink for HW_RET temporary target/alpha: Use tcg_constant_* - - 1 - --- 2021-07-08 Richard Henderson New
[2/4] target/arm/kvm64: Ensure sve vls map is completely clear target/arm/cpu: Introduce sve_vq_supported bitmap - - 1 - --- 2021-08-19 Andrew Jones New
[2/4] target/arm: Abstract the generic timer frequency Expose GT CNTFRQ as a CPU property to support AST2600 - - - - --- 2019-11-28 Andrew Jeffery New
[2/4] target/arm: Allow M-profile CPUs todisable the DSP extension via CPU property Disable FPU/DSP for CPU0 on musca-a andmps2-an521 - - 2 - --- 2019-05-17 Peter Maydell New
[2/4] target/arm: Clean TBI for data operations in the translator target/arm: Implement TBI for user-only - - 1 - --- 2019-01-10 Richard Henderson New
[2/4] target/arm: Convert PMUL.8 to gvec target/arm vector improvements - - 1 1 --- 2019-10-17 Richard Henderson New
[2/4] target/arm: Dump ZA[] when active target/arm: Fix SME full tile indexing - - 1 - --- 2023-06-22 Richard Henderson New
[2/4] target/arm: Factor out FWB=0 specific part of combine_cacheattrs() target/arm: Implement S2FWB - - 1 - --- 2022-05-05 Peter Maydell New
[2/4] target/arm: Fix typo in do_sat_addsub_64 target/arm sve fixes - - 1 1 --- 2018-08-01 Richard Henderson New
[2/4] target/arm: Fixup contiguous first-fault and no-fault loads target/arm bug fix - - - - --- 2020-12-07 LIU Zhiwei New
[2/4] target/arm: Flush high bits of sve register after AdvSIMD TBL/TBX target/arm: fix some simd writes vs sve - - - - --- 2020-02-14 Richard Henderson New
[2/4] target/arm: Implement FMLAL and FMLSL for aarch64 target/arm: Implement ARMv8.2-FHM - - - - --- 2019-02-14 Richard Henderson New
[2/4] target/arm: Implement SVE2 RADDHNB, RADDHNT target/arm: Implement last SVE2 narrowing section - - - - --- 2020-04-17 Stephen Long New
[2/4] target/arm: Initialize exc_secure correctly in do_v7m_exception_exit() target/arm: Implement tailchaining for M profile cores - - 2 - --- 2018-07-20 Peter Maydell New
[2/4] target/arm: Install ASIDs for long-form from EL1 target/arm: Minimize TLB flushing for ASID changes - - - - --- 2018-10-29 Richard Henderson New
[2/4] target/arm: Make A32/T32 use new fpstatus_ptr() API Refactor get_fpstatus_ptr() ready for AArch32 fp16 - - 1 - --- 2020-08-06 Peter Maydell New
[2/4] target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn target/arm: Fix insn exception priorities - - 1 - --- 2021-08-18 Richard Henderson New
[2/4] target/arm: Move cortex-m related functions to new file v7m.c Make it possible to compile with CONFIG_ARM_V7M=n - - - - --- 2019-09-21 Thomas Huth New
[2/4] target/arm: Optimize MVE logic ops target/arm: Use TCG vector ops for MVE - - 2 - --- 2021-09-02 Peter Maydell New
[2/4] target/arm: Rebuild hflags at el changes and MSR writes target/arm: Reduce overhead of cpu_get_tb_cpu_state - - 1 - --- 2019-02-14 Richard Henderson New
[2/4] target/arm: Restrict R and M profiles to TCG Support disabling TCG on ARM (part 2) - - - - --- 2019-08-23 Philippe Mathieu-Daudé New
[2/4] target/arm: Store tbi for both insns and data in ARMVAParameters target/arm: Cache ARMVAParameters - - 1 - --- 2023-02-02 Richard Henderson New
[2/4] target/arm: Tidy sve_exception_el for CPACR_EL1 access target/arm: SVE fixes versus VHE - - 1 - --- 2022-01-27 Richard Henderson New
[2/4] target/arm: Update MSR access to UAO target/arm: Implement ARMv8.2-UAO - - - - --- 2019-12-03 Richard Henderson New
[2/4] target/arm: Update hflags in trans_CPS_v7m() target/arm: Fix hflags mismatches for M-profile - - 1 - --- 2020-03-03 Peter Maydell New
[2/4] target/arm: Use enum constant in get_phys_addr_lpae() call arm: Implement ARMv8.2-TTS2UXN - - 1 - --- 2020-03-30 Peter Maydell New
[2/4] target/arm: Use tcg_constant_i64() in do_sat_addsub_64() target/alpha,arm,ppc: More uses of tcg_constant() - - 1 - --- 2021-10-24 Philippe Mathieu-Daudé New
[2/4] target/arm: simplify and optimize aarch64 rev16 - - 2 - --- 2017-05-16 Aurelien Jarno New
[2/4] target/avr: implement small RAM/large RAM feature AVR target fixes - - - - --- 2022-11-19 Pavel Dovgalyuk New
[2/4] target/i386: Add CET MSRs access interfaces Enable VMM userspace support for CET virtualization - - - - --- 2023-04-21 Yang, Weijiang New
[2/4] target/i386: Added DR6 and DR7 consistency checks target/i386: Continuing fixing kvm-unit-tests for svm - - - - --- 2021-07-05 Lara Lazier New
[2/4] target/i386: Added VGIF V_IRQ masking capability target/i386: V_IRQ masking and V_TPR fixes - - - - --- 2021-08-20 Lara Lazier New
[2/4] target/i386: Added VGIF V_IRQ masking capability target/i386: V_IRQ masking and V_TPR fixes - - - - --- 2021-08-18 Lara Lazier New
[2/4] target/i386: Fix query-cpu-model-expansion to reject props target: Improve error reporting for CpuModelInfo member @props - - - - --- 2024-03-05 Markus Armbruster New
[2/4] target/i386: Remove monitor from some CPU models [1/4] target/i386: Add Denverton-v2 (no MPX) CPU model - - - - --- 2019-12-02 Tao Xu New
[2/4] target/i386: Translate feature_word_info to xml Generate x86 cpu features - - - - --- 2023-08-11 Tim Wiederhake New
[2/4] target/i386: Use host_vendor_fms() in max_x86_cpu_initfn() - - 1 - --- 2017-07-12 Eduardo Habkost New
[2/4] target/i386: fix fxam handling of invalid encodings target/i386: miscellaneous x87 fixes - - - - --- 2020-05-13 Joseph Myers New
[2/4] target/i386: introduce function to set rounding mode from FPCW or MXCSR bits target/i386: support x86_64-v3 for user mode applications - - 2 - --- 2022-10-19 Paolo Bonzini New
[2/4] target/i386: kvm: Init nested-state for vCPU exposed with SVM target/i386: kvm: Various nested-state fixes - - 2 - --- 2019-07-05 Liran Alon New
[2/4] target/i386: mark CR4.FRED not reserved target/i386: add support for FRED - - - 1 --- 2023-09-01 Li, Xin3 New
[2/4] target/i386: remove useless enable_compat_apic_id_mode() prototype hw/i386: pass "MachineState.smp.max_cpus" to OVMF - - 1 - --- 2019-10-08 Laszlo Ersek New
[2/4] target/i386: use TSTEQ/TSTNE to check flags target/i386: use TSTEQ/TSTNE in x86 frontend - - 1 - --- 2024-02-28 Paolo Bonzini New
[2/4] target/loongarch: Remove duplicated disas_set_info assignment target/loongarch: Cleanups in preparation of loongarch32 support - - 1 - --- 2023-08-18 Philippe Mathieu-Daudé New
[2/4] target/loongarch: Restrict 'qapi-commands-machine.h' to system emulation target: Restrict 'qapi-commands-machine.h' to system emulation - - 1 - --- 2022-12-19 Philippe Mathieu-Daudé New
[2/4] target/m68k: add FPU trigonometric instructions - - - - --- 2017-07-03 Laurent Vivier New
[2/4] target/m68k: call gen_raise_exception() directly if single-stepping in gen_jmp_tb() target/m68k: implement m68k "any instruction" trace mode - - 1 - --- 2021-05-19 Mark Cave-Ayland New
[2/4] target/m68k: increase size of m68k CPU features from uint32_t to uint64_t target/m68k: MacOS supervisor/user mode switch fixes - - - - --- 2022-09-17 Mark Cave-Ayland New
[2/4] target/m68k: pass sign directly into make_quotient() target/m68k: fix FPSR quotient byte for fmod and frem - - 1 - --- 2023-01-01 Mark Cave-Ayland New
[2/4] target/mips: Add assembler mnemonics list for MXU ASE target/mips: Add Ingenic's MXU ASE opcodes - - 1 - --- 2018-10-16 Aleksandar Markovic New
[2/4] target/mips: Add availability control for DSP R3 ASE Misc MIPS fixes and improvements for October 2018 - - - - --- 2018-10-04 Aleksandar Markovic New
[2/4] target/mips: Add comments for vendor-specific ASEs Basic TCG Loongson-3A1000 Support - - 1 - --- 2020-06-14 Jiaxun Yang New
[2/4] target/mips: Demacro helpers for M<ADD|SUB>F.<D|S> target/mips: Misc patches - - - - --- 2020-09-08 Aleksandar Markovic New
[2/4] target/mips: Don't use clock_get_ns() in clock period calculation clock: Get rid of clock_get_ns() - - 2 - --- 2020-12-08 Peter Maydell New
[2/4] target/mips: Extract Code Compaction ASE translation routines target/mips: Extract microMIPS ISA and Code Compaction ASE apart - - 1 - --- 2021-06-17 Philippe Mathieu-Daudé New
[2/4] target/mips: Fix copy_s.<b|h|w> for MIPS big endian host target/mips: Add support for MSA instructions on a big endian host - - - - --- 2019-03-22 Mateja Marjanovic New
[2/4] target/mips: Fix df_extract_val() and df_extract_df() dfe lookup [1/4] target/mips: Fix SAT_S trans helper - - 1 - --- 2022-05-03 nihui New
[2/4] target/mips: Fix emulation of ILVOD.<B|H|W> on big endian host target/mips: Fix some issues of MSA emulation on big endian hosts - - - - --- 2019-06-20 Aleksandar Markovic New
[2/4] target/mips: Optimize support for MSA instructions ILVOD.<B|H|W|D> target/mips: Optimize support for certain MSA instructions - - - - --- 2019-02-27 Mateja Marjanovic New
[2/4] target/mips: Rename UHI err -> host_errno target/mips: Rewrite UHI errno_mips() to allow building on Haiku OS - - - - --- 2021-07-04 Philippe Mathieu-Daudé New
[2/4] target/openrisc: Fix LGPL version number Clarify the LGPL version in some files 1 - - - --- 2019-01-23 Thomas Huth New
[2/4] target/openrisc: Use tcg_constant_tl for dc->R0 target/openrisc: Use tcg_constant_* - - 1 - --- 2021-07-08 Richard Henderson New
[2/4] target/ppc: Add POWER9/10 invalid-real machine check codes target/ppc: Catch invalid real address accesses - - - - --- 2023-06-23 Nicholas Piggin New
[2/4] target/ppc: Add recording of taken branches to BHRB Add BHRB Facility Support - - - - --- 2023-09-12 Glenn Miles New
[2/4] target/ppc: Add recording of taken branches to BHRB Add BHRB Facility Support - - - - --- 2023-09-11 Glenn Miles New
[2/4] target/ppc: Add support for SMT CTRL register target/ppc: TCG SMT support for spapr - - - - --- 2023-06-05 Nicholas Piggin New
[2/4] target/ppc: Allow virtual hypervisor on CPU without HV ppc/Pegasos2: Firmware replacement using VOF - - - - --- 2021-06-27 BALATON Zoltan New
[2/4] target/ppc: Change partition-scope translate interface target/ppc: Fixes for instruction-related - - - - --- 2023-06-20 Nicholas Piggin New
[2/4] target/ppc: Ensure stcx size matches larx [1/4] target/ppc: Fix lqarx to set cpu_reserve - - 1 - --- 2023-06-04 Nicholas Piggin New
[2/4] target/ppc: Fix XER access in gdbstub Fix incorrect accesses to XER - 1 1 - --- 2021-10-14 Matheus K. Ferst New
[2/4] target/ppc: Move xs{max,min}[cj]dp to decodetree target/ppc: Fix VSX instructions register access - - 1 - --- 2021-12-10 Víctor Colombo New
[2/4] target/ppc: Restrict KVM objects to system emulation target/ppc: Prohibit target specific KVM prototypes on user emulation - - 1 - --- 2023-09-12 Philippe Mathieu-Daudé New
[2/4] target/ppc: SMT support for the HID SPR ppc/pnv: SMT support for powernv - - 1 1 --- 2023-07-03 Nicholas Piggin New
[2/4] target/ppc: Tidy POWER book4 SPR registration ppc/pnv: Add chiptod and core timebase state machine models - - 1 - --- 2023-06-03 Nicholas Piggin New
[2/4] target/ppc: Use probe_access for LMW, STMW target/ppc: Use probe_access - - - - --- 2020-01-29 Richard Henderson New
[2/4] target/ppc: added solutions for building with disable-tcg target/ppc: add disable-tcg option - - - - --- 2021-04-09 Bruno Larsen (billionai) New
[2/4] target/ppc: init 'lpcr' in kvmppc_enable_cap_large_decr() ppc: valgrind "uninitialized values" fixes - - - - --- 2022-03-30 Daniel Henrique Barboza New
[2/4] target/ppc: powerpc_excp: Move common code to the caller function target/ppc: powerpc_excp improvements (9/9) - - 1 - --- 2022-02-07 Fabiano Rosas New
[2/4] target/riscv/csr.c: simplify mctr() RISCVCPUConfig related cleanups - - 1 - --- 2023-02-24 Daniel Henrique Barboza New
[2/4] target/riscv: Add CPU feature for AIA CSRs AIA local interrupt CSR support - - - - --- 2021-05-14 Anup Patel New
[2/4] target/riscv: Add CSR name in the CSR function table target/riscv: Generate the GDB XML file for CSR registers dynamically - - 1 - --- 2021-01-12 Bin Meng New
[2/4] target/riscv: Add a general status enum for extensions Fix tb flags use - - - - --- 2023-03-24 LIU Zhiwei New
[2/4] target/riscv: Add right functions to set agnostic elements target/riscv: Fix the element agnostic function problem - - - - --- 2024-03-06 Huang Tao New
[2/4] target/riscv: Fix hstatus.GVA bit setting for traps taken from HS-mode QEMU RISC-V nested virtualization fixes - 1 - - --- 2022-04-29 Anup Patel New
[2/4] target/riscv: Move misa_mxl_max to class [1/4] target/riscv: Remove misa_mxl validation - - - - --- 2023-10-12 Akihiko Odaki New
[2/4] target/riscv: Remove check on mode for MPRV target/riscv: Fix mstatus related problems - - 1 - --- 2023-05-29 Weiwei Li New
[2/4] target/riscv: Simplify getting RISCVCPU pointer from env target/riscv: Some CPURISCVState related cleanup and simplification - - 3 - --- 2023-03-09 Weiwei Li New
[2/4] target/riscv: add query-cpy-definitions support target/riscv: implement query-cpu-definitions - - - - --- 2023-04-10 Daniel Henrique Barboza New
[2/4] target/riscv: cpu: Fixup local variables shadowing RISC-V: Work towards enabling -Wshadow=local - - 1 - --- 2023-09-25 Alistair Francis New
[2/4] target/riscv: rename ext_icsr to ext_zicsr target/riscv: rename ext_i* to ext_zi* - - 1 - --- 2023-10-12 Daniel Henrique Barboza New
[2/4] target/rx: Store PSW.U in tb->flags target/rx: Track PSW.U in tb->flags - - - - --- 2022-04-17 Richard Henderson New
[2/4] target/s390x/dump: Remove unneeded dump info function pointer init [1/4] dump: Set dump info function pointers to NULL - - 1 - --- 2023-11-07 Janosch Frank New
[2/4] target/s390x: End the TB after EXECUTE - - 1 - --- 2017-05-24 Richard Henderson New
[2/4] target/s390x: Improve ADD LOGICAL WITH CARRY target/s390x: Improve carry computation - - 1 - --- 2020-10-17 Richard Henderson New
[2/4] target/s390x: Use ILEN_UNWIND in trivial cases - - 1 - --- 2017-07-25 Richard Henderson New
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