Show patches with: Submitter = LIU Zhiwei       |    State = Action Required       |    Archived = No       |   292 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v6,61/61] target/riscv: configure and turn on vector extension from command line target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,60/61] target/riscv: vector compress instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,59/61] target/riscv: vector register gather instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,58/61] target/riscv: vector slide instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,57/61] target/riscv: floating-point scalar move instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,56/61] target/riscv: integer scalar move instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,55/61] target/riscv: integer extract instruction target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,54/61] target/riscv: vector element index instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,53/61] target/riscv: vector iota instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,52/61] target/riscv: set-X-first mask bit target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,51/61] target/riscv: vmfirst find-first-set mask bit target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,50/61] target/riscv: vector mask population count vmpopc target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,49/61] target/riscv: vector mask-register logical instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,48/61] target/riscv: vector widening floating-point reduction instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,47/61] target/riscv: vector single-width floating-point reduction instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,46/61] target/riscv: vector wideing integer reduction instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,45/61] target/riscv: vector single-width integer reduction instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,44/61] target/riscv: narrowing floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,43/61] target/riscv: widening floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,42/61] target/riscv: vector floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,41/61] target/riscv: vector floating-point merge instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,40/61] target/riscv: vector floating-point classify instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,39/61] target/riscv: vector floating-point compare instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,38/61] target/riscv: vector floating-point sign-injection instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,37/61] target/riscv: vector floating-point min/max instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,36/61] target/riscv: vector floating-point square-root instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,35/61] target/riscv: vector widening floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,34/61] target/riscv: vector single-width floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,33/61] target/riscv: vector widening floating-point multiply target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,32/61] target/riscv: vector single-width floating-point multiply/divide instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,31/61] target/riscv: vector widening floating-point add/subtract instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,30/61] target/riscv: vector single-width floating-point add/subtract instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,29/61] target/riscv: vector narrowing fixed-point clip instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,28/61] target/riscv: vector single-width scaling shift instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,27/61] target/riscv: vector widening saturating scaled multiply-add target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,26/61] target/riscv: vector single-width fractional multiply with rounding and saturation target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,25/61] target/riscv: vector single-width averaging add and subtract target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,24/61] target/riscv: vector single-width saturating add and subtract target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,23/61] target/riscv: vector integer merge and move instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,22/61] target/riscv: vector widening integer multiply-add instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,21/61] target/riscv: vector single-width integer multiply-add instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,20/61] target/riscv: vector widening integer multiply instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,19/61] target/riscv: vector integer divide instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,18/61] target/riscv: vector single-width integer multiply instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,17/61] target/riscv: vector integer min/max instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,16/61] target/riscv: vector integer comparison instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,15/61] target/riscv: vector narrowing integer right shift instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,14/61] target/riscv: vector single-width bit shift instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,13/61] target/riscv: vector bitwise logical instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,12/61] target/riscv: vector integer add-with-carry / subtract-with-borrow instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,11/61] target/riscv: vector widening integer add and subtract target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,10/61] target/riscv: vector single-width integer add and subtract target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,09/61] target/riscv: add vector amo operations target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,08/61] target/riscv: add fault-only-first unit stride load target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,07/61] target/riscv: add vector index load and store instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,06/61] target/riscv: add vector stride load and store instructions target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,05/61] target/riscv: add an internals.h header target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,04/61] target/riscv: add vector configure instruction target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,03/61] target/riscv: support vector extension csr target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,02/61] target/riscv: implementation-defined constant parameters target/riscv: support vector extension v0.7.1 - - 2 - 0 0 0 2020-03-17 LIU Zhiwei New
[v6,01/61] target/riscv: add vector extension field in CPURISCVState target/riscv: support vector extension v0.7.1 1 - 1 - 0 0 0 2020-03-17 LIU Zhiwei New
[v5,60/60] target/riscv: configure and turn on vector extension from command line target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,59/60] target/riscv: vector compress instruction target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,58/60] target/riscv: vector register gather instruction target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,57/60] target/riscv: vector slide instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,56/60] target/riscv: floating-point scalar move instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,55/60] target/riscv: integer scalar move instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,54/60] target/riscv: integer extract instruction target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,53/60] target/riscv: vector element index instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,52/60] target/riscv: vector iota instruction target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,51/60] target/riscv: set-X-first mask bit target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,50/60] target/riscv: vmfirst find-first-set mask bit target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,49/60] target/riscv: vector mask population count vmpopc target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,48/60] target/riscv: vector mask-register logical instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,47/60] target/riscv: vector widening floating-point reduction instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,46/60] target/riscv: vector single-width floating-point reduction instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,45/60] target/riscv: vector wideing integer reduction instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,44/60] target/riscv: vector single-width integer reduction instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,43/60] target/riscv: narrowing floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,42/60] target/riscv: widening floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,41/60] target/riscv: vector floating-point/integer type-convert instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,40/60] target/riscv: vector floating-point merge instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,39/60] target/riscv: vector floating-point classify instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,38/60] target/riscv: vector floating-point compare instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,37/60] target/riscv: vector floating-point sign-injection instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,36/60] target/riscv: vector floating-point min/max instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,35/60] target/riscv: vector floating-point square-root instruction target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,34/60] target/riscv: vector widening floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,33/60] target/riscv: vector single-width floating-point fused multiply-add instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,32/60] target/riscv: vector widening floating-point multiply target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,31/60] target/riscv: vector single-width floating-point multiply/divide instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,30/60] target/riscv: vector widening floating-point add/subtract instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,29/60] target/riscv: vector single-width floating-point add/subtract instructions target/riscv: support vector extension v0.7.1 - - 1 - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,28/60] target/riscv: vector narrowing fixed-point clip instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,27/60] target/riscv: vector single-width scaling shift instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,26/60] target/riscv: vector widening saturating scaled multiply-add target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,25/60] target/riscv: vector single-width fractional multiply with rounding and saturation target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,24/60] target/riscv: vector single-width averaging add and subtract target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,23/60] target/riscv: vector single-width saturating add and subtract target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
[v5,22/60] target/riscv: vector integer merge and move instructions target/riscv: support vector extension v0.7.1 - - - - 0 0 0 2020-03-12 LIU Zhiwei New
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