Show patches with: Submitter = Peter Maydell       |    State = Action Required       |    Archived = No       |   6983 patches
« 1 2 3 469 70 »
Patch Series A/R/T S/W/F Date Submitter Delegate State
translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD translate.c: Fix usermode big-endian AArch32 LDREXD and STREXD - - - 0 0 0 2017-10-20 Peter Maydell New
[PULL,13/13] nvic: Fix miscalculation of offsets into ITNS array [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,12/13] nvic: Add missing 'break' [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 2 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,11/13] target/arm: Implement SG instruction corner cases [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,10/13] target/arm: Support some Thumb insns being always unconditional [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,09/13] target-arm: Simplify insn_crosses_page() [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,08/13] target/arm: Pull Thumb insn word loads up to top level [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,07/13] target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1 [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,06/13] target/arm: Implement secure function return [PULL,01/13] watchdog/aspeed: fix variable type to store reload value 1 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,05/13] target/arm: Implement BLXNS [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,04/13] target/arm: Implement SG instruction [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,03/13] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,02/13] arm: fix armv7m_init() declaration to match definition [PULL,01/13] watchdog/aspeed: fix variable type to store reload value - 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,01/13] watchdog/aspeed: fix variable type to store reload value [PULL,01/13] watchdog/aspeed: fix variable type to store reload value 1 1 - 0 0 0 2017-10-12 Peter Maydell New
[PULL,00/13] target-arm queue - - - 0 0 0 2017-10-12 Peter Maydell New
[2/2] linux-user: Fix TARGET_MTIOCTOP/MTIOCGET/MTIOCPOS values fix incorrect target ioctl numbers - - - 0 0 0 2017-10-12 Peter Maydell New
[1/2] linux-user: Fix target FS_IOC_GETFLAGS and FS_IOC_SETFLAGS numbers fix incorrect target ioctl numbers - 1 - 0 0 0 2017-10-12 Peter Maydell New
include/hw/or-irq.h: Drop unused in_irqs field include/hw/or-irq.h: Drop unused in_irqs field - 1 - 0 0 0 2017-10-12 Peter Maydell New
[v4] docs/devel/loads-stores.rst: Document our various load and store APIs [v4] docs/devel/loads-stores.rst: Document our various load and store APIs - 1 - 0 0 0 2017-10-12 Peter Maydell New
nvic: Add missing 'break' nvic: Add missing 'break' - 2 - 0 0 0 2017-10-11 Peter Maydell New
[v3] docs/devel/loads-stores.rst: Document our various load and store APIs [v3] docs/devel/loads-stores.rst: Document our various load and store APIs - 2 - 0 0 0 2017-10-10 Peter Maydell New
nvic: Fix miscalculation of offsets into ITNS array nvic: Fix miscalculation of offsets into ITNS array - 1 - 0 0 0 2017-10-10 Peter Maydell New
[9/9] target/arm: Implement SG instruction corner cases v8M: BLXNS, SG, secure function return - 1 - 0 0 0 2017-10-09 Peter Maydell New
[8/9] target/arm: Support some Thumb insns being always unconditional v8M: BLXNS, SG, secure function return - 1 - 0 0 0 2017-10-09 Peter Maydell New
[7/9] target-arm: Simplify insn_crosses_page() v8M: BLXNS, SG, secure function return - 1 - 0 0 0 2017-10-09 Peter Maydell New
[6/9] target/arm: Pull Thumb insn word loads up to top level v8M: BLXNS, SG, secure function return - 1 - 0 0 0 2017-10-09 Peter Maydell New
[5/9] target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1 v8M: BLXNS, SG, secure function return - 1 - 0 0 0 2017-10-09 Peter Maydell New
[4/9] target/arm: Implement secure function return v8M: BLXNS, SG, secure function return 1 1 - 0 0 0 2017-10-09 Peter Maydell New
[3/9] target/arm: Implement BLXNS v8M: BLXNS, SG, secure function return - 1 - 0 0 0 2017-10-09 Peter Maydell New
[2/9] target/arm: Implement SG instruction v8M: BLXNS, SG, secure function return - 1 - 0 0 0 2017-10-09 Peter Maydell New
[1/9] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() v8M: BLXNS, SG, secure function return - 1 - 0 0 0 2017-10-09 Peter Maydell New
[PULL,20/20] nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 2 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,19/20] target/arm: Factor out "get mmuidx for specified security state" [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 2 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,18/20] target/arm: Fix calculation of secure mm_idx values [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 2 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,17/20] target/arm: Implement security attribute lookups for memory accesses [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,16/20] nvic: Implement Security Attribution Unit registers [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,15/20] target/arm: Add v8M support to exception entry code [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,14/20] target/arm: Add support for restoring v8M additional state context [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,13/20] target/arm: Update excret sanity checks for v8M [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,12/20] target/arm: Add new-in-v8M SFSR and SFAR [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,11/20] target/arm: Don't warn about exception return with PC low bit set for v8M [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 2 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,10/20] target/arm: Warn about restoring to unaligned stack [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 2 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,09/20] target/arm: Check for xPSR mismatch usage faults earlier for v8M [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,08/20] target/arm: Restore SPSEL to correct CONTROL register on exception return [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,07/20] target/arm: Restore security state on exception return [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,06/20] target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 2 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,05/20] target/arm: Don't switch to target stack early in v7M exception return [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 2 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,04/20] nvic: Clear the vector arrays and prigroup on reset [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 2 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,03/20] hw/arm/xlnx-zynqmp: Mark the "xlnx, zynqmp" device with user_creatable = false [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,02/20] hw/sd: fix out-of-bounds check for multi block reads [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI [PULL,01/20] arm: Fix SMC reporting to EL2 when QEMU provides PSCI - 1 - 0 0 0 2017-10-06 Peter Maydell New
[PULL,00/20] target-arm queue - - - 0 0 0 2017-10-06 Peter Maydell New
linux-user: Allow -R values up to 0xffff0000 for 32-bit ARM guests linux-user: Allow -R values up to 0xffff0000 for 32-bit ARM guests - 1 - 0 0 0 2017-10-03 Peter Maydell New
[20/20] nvic: Add missing code for writing SHCSR.HARDFAULTPENDED bit ARM v8M: exception entry, exit and security - 2 - 0 0 0 2017-09-22 Peter Maydell New
[19/20] target/arm: Implement secure function return ARM v8M: exception entry, exit and security 1 1 - 0 0 0 2017-09-22 Peter Maydell New
[18/20] target/arm: Implement BLXNS ARM v8M: exception entry, exit and security 1 1 - 0 0 0 2017-09-22 Peter Maydell New
[17/20] target/arm: Implement SG instruction ARM v8M: exception entry, exit and security - - - 0 0 0 2017-09-22 Peter Maydell New
[16/20] target/arm: Factor out "get mmuidx for specified security state" ARM v8M: exception entry, exit and security - 2 - 0 0 0 2017-09-22 Peter Maydell New
[15/20] target/arm: Fix calculation of secure mm_idx values ARM v8M: exception entry, exit and security - 2 - 0 0 0 2017-09-22 Peter Maydell New
[14/20] target/arm: Implement security attribute lookups for memory accesses ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[13/20] nvic: Implement Security Attribution Unit registers ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[12/20] target/arm: Add v8M support to exception entry code ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[11/20] target/arm: Add support for restoring v8M additional state context ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[10/20] target/arm: Update excret sanity checks for v8M ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[09/20] target/arm: Add new-in-v8M SFSR and SFAR ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[08/20] target/arm: Don't warn about exception return with PC low bit set for v8M ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[07/20] target/arm: Warn about restoring to unaligned stack ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[06/20] target/arm: Check for xPSR mismatch usage faults earlier for v8M ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[05/20] target/arm: Restore SPSEL to correct CONTROL register on exception return ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[04/20] target/arm: Restore security state on exception return ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[03/20] target/arm: Prepare for CONTROL.SPSEL being nonzero in Handler mode ARM v8M: exception entry, exit and security - 2 - 0 0 0 2017-09-22 Peter Maydell New
[02/20] target/arm: Don't switch to target stack early in v7M exception return ARM v8M: exception entry, exit and security - 2 - 0 0 0 2017-09-22 Peter Maydell New
[01/20] nvic: Clear the vector arrays and prigroup on reset ARM v8M: exception entry, exit and security - 1 - 0 0 0 2017-09-22 Peter Maydell New
[v2] docs/devel/loads-stores.rst: Document our various load and store APIs [v2] docs/devel/loads-stores.rst: Document our various load and store APIs - - - 0 0 0 2017-09-21 Peter Maydell New
[PULL,31/31] msf2: Add Emcraft's Smartfusion2 SOM kit [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - - - 0 0 0 2017-09-21 Peter Maydell New
[PULL,30/31] msf2: Add Smartfusion2 SoC [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,29/31] msf2: Add Smartfusion2 SPI controller [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 1 0 0 0 2017-09-21 Peter Maydell New
[PULL,28/31] msf2: Microsemi Smartfusion2 System Register block [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers 1 1 1 0 0 0 2017-09-21 Peter Maydell New
[PULL,27/31] msf2: Add Smartfusion2 System timer [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers 1 1 1 0 0 0 2017-09-21 Peter Maydell New
[PULL,26/31] hw/arm/omap2.c: Don't use old_mmio [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,25/31] hw/i2c/omap_i2c.c: Don't use old_mmio [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,24/31] hw/timer/omap_gptimer: Don't use old_mmio [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,23/31] hw/timer/omap_synctimer.c: Don't use old_mmio [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,22/31] hw/gpio/omap_gpio.c: Don't use old_mmio [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,21/31] hw/arm/palm.c: Don't use old_mmio for static_ops [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,20/31] target/arm: Remove out of date ARM ARM section references in A64 decoder [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,19/31] nvic: Support banked exceptions in acknowledge and complete [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,18/31] nvic: Make SHCSR banked for v8M [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,17/31] nvic: Make ICSR banked for v8M [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,16/31] target/arm: Handle banking in negative-execution-priority check in cpu_mmu_index() [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,15/31] nvic: Handle v8M changes in nvic_exec_prio() [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,14/31] nvic: Disable the non-secure HardFault if AIRCR.BFHFNMINS is clear [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,13/31] nvic: Implement v8M changes to fixed priority exceptions [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,12/31] nvic: In escalation to HardFault, support HF not being priority -1 [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,11/31] nvic: Compare group priority for escalation to HF [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,10/31] nvic: Make SHPR registers banked [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,09/31] nvic: Make set_pending and clear_pending take a secure parameter [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,08/31] nvic: Handle banked exceptions in nvic_recompute_state() [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,07/31] nvic: Implement NVIC_ITNS<n> registers [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
[PULL,06/31] nvic: Make ICSR.RETTOBASE handle banked exceptions [PULL,01/31] target/arm: Implement MSR/MRS access to NS banked registers - 1 - 0 0 0 2017-09-21 Peter Maydell New
« 1 2 3 469 70 »