Show patches with: Archived = No       |   430957 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v3,03/16] target/riscv: cpu: Set reset vector based on the configured property value hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 2 - --- 2020-09-01 Bin Meng New
[v3,02/16] hw/riscv: hart: Add a new 'resetvec' property hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 2 - --- 2020-09-01 Bin Meng New
[v3,01/16] target/riscv: cpu: Add a new 'resetvec' property hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 2 - --- 2020-09-01 Bin Meng New
[v2,16/16] hw/riscv: sifive_u: Connect a DMA controller hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-29 Bin Meng Superseded
[v2,15/16] hw/riscv: clint: Avoid using hard-coded timebase frequency hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-29 Bin Meng Superseded
[v2,14/16] hw/riscv: microchip_pfsoc: Hook GPIO controllers hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-29 Bin Meng Superseded
[v2,13/16] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-29 Bin Meng Superseded
[v2,12/16] hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23 hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-29 Bin Meng Superseded
[v2,11/16] hw/net: cadence_gem: Add a new 'phy-addr' property hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-29 Bin Meng Superseded
[v2,10/16] hw/riscv: microchip_pfsoc: Connect a DMA controller hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-29 Bin Meng Superseded
[v2,09/16] hw/dma: Add SiFive platform DMA controller emulation hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-29 Bin Meng Superseded
[v2,08/16] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-29 Bin Meng Superseded
[v2,07/16] hw/sd: Add Cadence SDHCI emulation hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support 1 - - - --- 2020-08-29 Bin Meng Superseded
[v2,06/16] hw/riscv: microchip_pfsoc: Connect 5 MMUARTs hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-29 Bin Meng Superseded
[v2,05/16] hw/char: Add Microchip PolarFire SoC MMUART emulation hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-29 Bin Meng Superseded
[v2,04/16] hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-29 Bin Meng Superseded
[v2,03/16] target/riscv: cpu: Set reset vector based on the configured property value hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-29 Bin Meng Superseded
[v2,02/16] hw/riscv: hart: Add a new 'resetvec' property hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-29 Bin Meng Superseded
[v2,01/16] target/riscv: cpu: Add a new 'resetvec' property hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-29 Bin Meng Superseded
[v3,2/2] hw/sd: sd: Correct the maximum size of a Standard Capacity SD Memory Card [v3,1/2] hw/sd: sd: Fix incorrect populated function switch status data structure - 1 1 1 --- 2020-08-21 Bin Meng New
[v3,1/2] hw/sd: sd: Fix incorrect populated function switch status data structure [v3,1/2] hw/sd: sd: Fix incorrect populated function switch status data structure - 1 1 1 --- 2020-08-21 Bin Meng New
[v2,3/3] hw/sd: Add Cadence SDHCI emulation hw/sd: Add Cadence SDHCI emulation 1 - - - --- 2020-08-17 Bin Meng New
[v2,2/3] hw/sd: sd: Correct the maximum size of a Standard Capacity SD Memory Card hw/sd: Add Cadence SDHCI emulation - 1 - - --- 2020-08-17 Bin Meng Superseded
[v2,1/3] hw/sd: sd: Fix incorrect populated function switch status data structure hw/sd: Add Cadence SDHCI emulation - 1 1 - --- 2020-08-17 Bin Meng Superseded
[v2,2/3] hw/sd: sd: Correct the maximum size of a Standard Capacity SD Memory Card hw/sd: Add Cadence SDHCI emulation - 1 1 - --- 2020-08-17 Bin Meng Superseded
[v2,1/3] hw/sd: sd: Fix incorrect populated function switch status data structure hw/sd: Add Cadence SDHCI emulation - 1 1 - --- 2020-08-17 Bin Meng Superseded
[18/18] hw/riscv: microchip_pfsoc: Document the software used for testing hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-14 Bin Meng Superseded
[17/18] hw/riscv: clint: Avoid using hard-coded timebase frequency hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-14 Bin Meng Superseded
[16/18] hw/riscv: microchip_pfsoc: Hook GPIO controllers hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-14 Bin Meng Superseded
[15/18] hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-14 Bin Meng Superseded
[14/18] hw/net: cadence_gem: Add a new 'phy-addr' property hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-14 Bin Meng Superseded
[13/18] hw/riscv: microchip_pfsoc: Connect a DMA controller hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-14 Bin Meng Superseded
[12/18] hw/dma: Add Microchip PolarFire Soc DMA controller emulation hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-14 Bin Meng Superseded
[11/18] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-14 Bin Meng Superseded
[10/18] hw/sd: Add Cadence SDHCI emulation hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-14 Bin Meng Superseded
[09/18] hw/sd: sdhci: Make sdhci_poweron_reset() internal visible hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-14 Bin Meng Superseded
[08/18] hw/sd: sd: Correctly set the high capacity bit hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - 1 - - --- 2020-08-14 Bin Meng Superseded
[07/18] hw/sd: sd: Fix incorrect populated function switch status data structure hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - 1 1 - --- 2020-08-14 Bin Meng Superseded
[06/18] hw/riscv: microchip_pfsoc: Connect 5 MMUARTs hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-14 Bin Meng Superseded
[05/18] hw/char: Add Microchip PolarFire SoC MMUART emulation hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - - - --- 2020-08-14 Bin Meng Superseded
[04/18] hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-14 Bin Meng Superseded
[03/18] target/riscv: cpu: Set reset vector based on the configured property value hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-14 Bin Meng Superseded
[02/18] hw/riscv: hart: Add a new 'resetvec' property hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-14 Bin Meng Superseded
[01/18] target/riscv: cpu: Add a new 'resetvec' property hw/riscv: Add Microchip PolarFire SoC Icicle Kit board support - - 1 - --- 2020-08-14 Bin Meng Superseded
[v6,6/6] gitlab-ci/opensbi: Update GitLab CI to build generic platform riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-08-03 Bin Meng New
[v6,5/6] hw/riscv: spike: Change the default bios to use generic platform image riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-08-03 Bin Meng New
[v6,4/6] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-08-03 Bin Meng New
[v6,3/6] roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-08-03 Bin Meng New
[v6,2/6] roms/opensbi: Upgrade from v0.7 to v0.8 riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-08-03 Bin Meng New
[v6,1/6] configure: Create symbolic links for pc-bios/*.elf files riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 1 - --- 2020-08-03 Bin Meng New
hw/riscv: sifive_u: Add a dummy L2 cache controller device hw/riscv: sifive_u: Add a dummy L2 cache controller device - - 1 - --- 2020-07-20 Bin Meng New
hw/riscv: sifive_e: Correct debug block size hw/riscv: sifive_e: Correct debug block size - - 1 - --- 2020-07-16 Bin Meng New
[v5,7/7] Makefile: Ship the generic platform bios ELF images for RISC-V riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - - - --- 2020-07-16 Bin Meng Superseded
[v5,6/7] gitlab-ci/opensbi: Update GitLab CI to build generic platform riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-16 Bin Meng Superseded
[v5,5/7] hw/riscv: spike: Change the default bios to use generic platform image riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-16 Bin Meng Superseded
[v5,4/7] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-16 Bin Meng Superseded
[v5,3/7] roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-16 Bin Meng Superseded
[v5,2/7] roms/opensbi: Upgrade from v0.7 to v0.8 riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-16 Bin Meng Superseded
[v5,1/7] configure: Create symbolic links for pc-bios/*.elf files riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 1 - --- 2020-07-16 Bin Meng Superseded
[v4,7/7] Makefile: Ship the generic platform bios images for RISC-V riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 1 - --- 2020-07-10 Bin Meng Superseded
[v4,6/7] gitlab-ci/opensbi: Update GitLab CI to build generic platform riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-10 Bin Meng Superseded
[v4,5/7] hw/riscv: spike: Change the default bios to use generic platform image riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-10 Bin Meng Superseded
[v4,4/7] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-10 Bin Meng Superseded
[v4,3/7] roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-10 Bin Meng Superseded
[v4,2/7] roms/opensbi: Upgrade from v0.7 to v0.8 riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-10 Bin Meng Superseded
[v4,1/7] configure: Create symbolic links for pc-bios/*.elf files riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 1 - --- 2020-07-10 Bin Meng Superseded
[v2,2/2] hw/riscv: sifive_u: Provide a reliable way for bootloader to detect whether it is running … [v2,1/2] hw/riscv: Modify MROM size to end at 0x10000 - - - - --- 2020-07-09 Bin Meng New
[v2,1/2] hw/riscv: Modify MROM size to end at 0x10000 [v2,1/2] hw/riscv: Modify MROM size to end at 0x10000 - - 1 - --- 2020-07-09 Bin Meng New
[2/2] hw/riscv: sifive_u: Provide a reliable way for bootloader to detect whether it is running in … [1/2] hw/riscv: Modify MROM size to end at 0x10000 - - - - --- 2020-07-09 Bin Meng Superseded
[1/2] hw/riscv: Modify MROM size to end at 0x10000 [1/2] hw/riscv: Modify MROM size to end at 0x10000 - - 1 - --- 2020-07-09 Bin Meng Superseded
hw/riscv: virt: Sort the SoC memmap table entries hw/riscv: virt: Sort the SoC memmap table entries - - 1 - --- 2020-07-03 Bin Meng New
[v3,7/7] Makefile: Ship the generic platform bios images for RISC-V riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - - - --- 2020-07-03 Bin Meng Superseded
[v3,6/7] gitlab-ci/opensbi: Update GitLab CI to build generic platform riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-03 Bin Meng Superseded
[v3,5/7] hw/riscv: spike: Change the default bios to use generic platform image riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-03 Bin Meng Superseded
[v3,4/7] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-03 Bin Meng Superseded
[v3,3/7] roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-03 Bin Meng Superseded
[v3,2/7] roms/opensbi: Upgrade from v0.7 to v0.8 riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 2 - --- 2020-07-03 Bin Meng Superseded
[v3,1/7] configure: Create symbolic links for pc-bios/*.elf files riscv: Switch to use generic platform fw_dynamic type opensbi bios images - - 1 - --- 2020-07-03 Bin Meng Superseded
MAINTAINERS: Add an entry for OpenSBI firmware MAINTAINERS: Add an entry for OpenSBI firmware - - 1 - --- 2020-06-26 Bin Meng New
[v2,7/7] Makefile: Ship the generic platform bios images for RISC-V riscv: Switch to use generic platform of opensbi bios images - - - - --- 2020-06-22 Bin Meng Superseded
[v2,6/7] gitlab-ci/opensbi: Update GitLab CI to build generic platform riscv: Switch to use generic platform of opensbi bios images - - 1 - --- 2020-06-22 Bin Meng Superseded
[v2,5/7] hw/riscv: spike: Change the default bios to use generic platform image riscv: Switch to use generic platform of opensbi bios images - - 2 - --- 2020-06-22 Bin Meng Superseded
[v2,4/7] hw/riscv: Use pre-built bios image of generic platform for virt & sifive_u riscv: Switch to use generic platform of opensbi bios images - - 2 - --- 2020-06-22 Bin Meng Superseded
[v2,3/7] roms/Makefile: Build the generic platform for RISC-V OpenSBI firmware riscv: Switch to use generic platform of opensbi bios images - - 1 - --- 2020-06-22 Bin Meng Superseded
[v2,2/7] roms/opensbi: Upgrade from v0.7 to v0.8 riscv: Switch to use generic platform of opensbi bios images - - 2 - --- 2020-06-22 Bin Meng Superseded
[v2,1/7] configure: Create symbolic links for pc-bios/*.elf files riscv: Switch to use generic platform of opensbi bios images - - 1 - --- 2020-06-22 Bin Meng Superseded
[v2,5/5] hw/riscv: sifive_u: Add a dummy DDR memory controller device hw/riscv: sifive_u: Add Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-16 Bin Meng New
[v2,4/5] hw/riscv: sifive_u: Sort the SoC memmap table entries hw/riscv: sifive_u: Add Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-16 Bin Meng New
[v2,3/5] hw/riscv: sifive_u: Support different boot source per MSEL pin state hw/riscv: sifive_u: Add Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-16 Bin Meng New
[v2,2/5] hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004 hw/riscv: sifive_u: Add Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-16 Bin Meng New
[v2,1/5] target/riscv: Rename IBEX CPU init routine hw/riscv: sifive_u: Add Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-16 Bin Meng New
[v2,4/4] riscv: Keep the CPU init routine names consistent [v2,1/4] riscv: Generalize CPU init routine for the base CPU - - 1 - --- 2020-06-11 Bin Meng New
[v2,3/4] riscv: Generalize CPU init routine for the imacu CPU [v2,1/4] riscv: Generalize CPU init routine for the base CPU - - 1 - --- 2020-06-11 Bin Meng New
[v2,2/4] riscv: Generalize CPU init routine for the gcsu CPU [v2,1/4] riscv: Generalize CPU init routine for the base CPU - - 1 - --- 2020-06-11 Bin Meng New
[v2,1/4] riscv: Generalize CPU init routine for the base CPU [v2,1/4] riscv: Generalize CPU init routine for the base CPU - - 1 - --- 2020-06-11 Bin Meng New
[15/15] hw/riscv: sifive_u: Add a dummy DDR memory controller device hw/riscv: sifive_u: Add GPIO and Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-08 Bin Meng New
[14/15] hw/riscv: sifive_u: Sort the SoC memmap table entries hw/riscv: sifive_u: Add GPIO and Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-08 Bin Meng New
[13/15] hw/riscv: sifive_u: Support different boot source per MSEL pin state hw/riscv: sifive_u: Add GPIO and Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-08 Bin Meng New
[12/15] hw/riscv: sifive: Change SiFive E/U CPU reset vector to 0x1004 hw/riscv: sifive_u: Add GPIO and Mode Select (MSEL[3:0]) support - - - - --- 2020-06-08 Bin Meng New
[11/15] hw/riscv: sifive_u: Add a new property msel for MSEL pin state hw/riscv: sifive_u: Add GPIO and Mode Select (MSEL[3:0]) support - - 1 - --- 2020-06-08 Bin Meng New
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