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: Submitter =
Christoph Müllner
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| 122 patches
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Apply
«
1
2
»
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
RISC-V: Add ABI requirement for XTheadFMemIdx tests
RISC-V: Add ABI requirement for XTheadFMemIdx tests
- - - -
-
-
-
2023-11-06
Christoph Müllner
New
RISC-V: Add Zawrs ISA extension support
RISC-V: Add Zawrs ISA extension support
- - - -
-
-
-
2022-10-27
Christoph Müllner
New
RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)
RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)
- - - -
-
-
-
2022-11-18
Christoph Müllner
New
RISC-V: Add zero_extract support for rv64gc
RISC-V: Add zero_extract support for rv64gc
- - - -
-
-
-
2024-05-06
Christoph Müllner
New
RISC-V: Document optimization parameter riscv-strcmp-inline-limit
RISC-V: Document optimization parameter riscv-strcmp-inline-limit
- - - -
-
-
-
2023-12-02
Christoph Müllner
New
RISC-V: Don't add fractional LMUL types to V_VLS for XTheadVector
RISC-V: Don't add fractional LMUL types to V_VLS for XTheadVector
- - - -
-
-
-
2024-03-21
Christoph Müllner
New
RISC-V: Fix cbo.zero expansion for rv32
RISC-V: Fix cbo.zero expansion for rv32
- - - -
-
-
-
2024-05-15
Christoph Müllner
New
RISC-V: Fix parsing of Zic* extensions
RISC-V: Fix parsing of Zic* extensions
- - - -
-
-
-
2024-04-28
Christoph Müllner
New
RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering
RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering
- 1 - -
-
-
-
2023-10-09
Christoph Müllner
New
RISC-V: Test cbo.zero expansion for rv32
RISC-V: Test cbo.zero expansion for rv32
- - - -
-
-
-
2024-05-15
Christoph Müllner
New
RISC-V: Use stdint-gcc.h in rvv testsuite
RISC-V: Use stdint-gcc.h in rvv testsuite
- - 1 -
-
-
-
2023-11-07
Christoph Müllner
New
RISC-V: testsuite: Drop march-string in cmpmemsi/cpymemsi tests
RISC-V: testsuite: Drop march-string in cmpmemsi/cpymemsi tests
- - - -
-
-
-
2024-05-16
Christoph Müllner
New
RISC-V: testsuite: Drop march-string in cpymemsi-1.c
RISC-V: testsuite: Drop march-string in cpymemsi-1.c
- - - -
-
-
-
2024-05-16
Christoph Müllner
New
RISC-V: xtheadfmemidx: Disable if xtheadmemidx is not available
RISC-V: xtheadfmemidx: Disable if xtheadmemidx is not available
- - - -
-
-
-
2023-12-05
Christoph Müllner
New
RISC-V: xtheadmemidx: Document inline asm issue with memory constraint
RISC-V: xtheadmemidx: Document inline asm issue with memory constraint
- - - -
-
-
-
2023-12-05
Christoph Müllner
New
[01/11] riscv: xtheadbb: Add sign/zero extension support for th.ext and th.extu
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[02/11] riscv: xtheadmempair: Fix CFA reg notes
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[03/11] riscv: xtheadmempair: Fix doc for th_mempair_order_operands()
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[04/11] riscv: thead: Adjust constraints of th_addsl INSN
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[05/11] riscv: Simplify output of MEM addresses
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[06/11] riscv: Define Xmode macro
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[07/11] riscv: Move address classification info types to riscv-protos.h
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[08/11] riscv: Prepare backend for index registers
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[09/11] riscv: thead: Factor out XThead*-specific peepholes
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[1/2] RISC-V: Add tests for cpymemsi expansion
[1/2] RISC-V: Add tests for cpymemsi expansion
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[1/2] riscv-cores.def: Fix description of RISCV_CORE() macro
[1/2] riscv-cores.def: Fix description of RISCV_CORE() macro
- - - -
-
-
-
2022-06-13
Christoph Müllner
New
[1/3] expr: Export clear_by_pieces()
RISC-V: Add memset-zero expansion with Zicboz+Zic64b
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[1/4] RISC-V: Add test cases for cpymem expansion
RISC-V: Enhance unaligned/overlapping codegen
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[1/7] riscv: Add basic XThead* vendor extension support
Add XThead* support
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[1/7] riscv: bitmanip: add orc.b as an unspec
riscv: Improve builtins expansion
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[11/11] riscv: thead: Add support for the XTheadFMemIdx ISA extension
Improvements for XThead* support
- - - -
-
-
-
2023-04-28
Christoph Müllner
New
[2/2] RISC-V: Add cmpmemsi expansion
[1/2] RISC-V: Add tests for cpymemsi expansion
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[2/2] riscv-cores.def: Add Allwinner D1 core
[1/2] riscv-cores.def: Fix description of RISCV_CORE() macro
- - - -
-
-
-
2022-06-13
Christoph Müllner
New
[2/3] RISC-V: testsuite: Make cmo tests LTO safe
RISC-V: Add memset-zero expansion with Zicboz+Zic64b
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[2/4] RISC-V: Allow unaligned accesses in cpymemsi expansion
RISC-V: Enhance unaligned/overlapping codegen
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[2/7] riscv: bitmanip/zbb: Add prefix/postfix and enable visiblity
riscv: Improve builtins expansion
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[2/7] riscv: riscv-cores.def: Add T-Head XuanTie C906
Add XThead* support
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[3/3] RISC-V: Add memset-zero expansion to cbo.zero
RISC-V: Add memset-zero expansion with Zicboz+Zic64b
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[3/4] RISC-V: tune: Add setting for overlapping mem ops to tuning struct
RISC-V: Enhance unaligned/overlapping codegen
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[3/7] riscv: Enable overlap-by-pieces via tune param
riscv: Improve builtins expansion
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[3/7] riscv: thead: Add support for XTheadBa and XTheadBs ISA extensions
Add XThead* support
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[4/4] RISC-V: Allow by-pieces to do overlapping accesses in block_move_straight
RISC-V: Enhance unaligned/overlapping codegen
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[4/7] riscv: Move riscv_block_move_loop to separate file
riscv: Improve builtins expansion
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[4/7] riscv: thead: Add support for XTheadCondMov ISA extensions
Add XThead* support
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[5/7] riscv: Use by-pieces to do overlapping accesses in block_move_straight
riscv: Improve builtins expansion
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[5/7] riscv: thead: Add support for XTheadBb ISA extension
Add XThead* support
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[6/7] riscv: Add support for strlen inline expansion
riscv: Improve builtins expansion
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[6/7] riscv: thead: Add support for XTheadMac ISA extension
Add XThead* support
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[7/7] riscv: Add basic extension support for XTheadFmv and XTheadInt
Add XThead* support
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[7/7] riscv: Add support for str(n)cmp inline expansion
riscv: Improve builtins expansion
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[COMMITTED] MAINTAINERS: Add myself to write after approval
[COMMITTED] MAINTAINERS: Add myself to write after approval
- - - -
-
-
-
2023-10-10
Christoph Müllner
New
[RFC] RISC-V: Add support for vector crypto extensions
[RFC] RISC-V: Add support for vector crypto extensions
- - - -
-
-
-
2022-12-21
Christoph Müllner
New
[RFC] RISC-V: Remove f{r,s}flags builtins
[RFC] RISC-V: Remove f{r,s}flags builtins
- - - -
-
-
-
2023-11-29
Christoph Müllner
New
[RFC] ipa-cp: Speculatively call specialized functions
[RFC] ipa-cp: Speculatively call specialized functions
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[RFC] ipa-guarded-deref: Add new pass to dereference function pointers
[RFC] ipa-guarded-deref: Add new pass to dereference function pointers
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[RFC] riscv: thead: Add support for XTheadMemPair ISA extension
[RFC] riscv: thead: Add support for XTheadMemPair ISA extension
- - - -
-
-
-
2022-11-13
Christoph Müllner
New
[committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension
[committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension
- - - -
-
-
-
2023-10-31
Christoph Müllner
New
[committed,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension
[committed,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension
- - - -
-
-
-
2023-10-31
Christoph Müllner
New
[v2,01/11] riscv: attr: Synchronize comments with code
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,02/11] riscv: Restructure callee-saved register save/restore code
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,03/11] riscv: Add basic XThead* vendor extension support
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,04/11] riscv: riscv-cores.def: Add T-Head XuanTie C906
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,05/11] riscv: thead: Add support for the XTheadBa ISA extension
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,06/11] riscv: thead: Add support for the XTheadBs ISA extension
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,07/11] riscv: thead: Add support for th XTheadBb ISA extension
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,08/11] riscv: thead: Add support for XTheadCondMov ISA extensions
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,09/11] riscv: thead: Add support for XTheadMac ISA extension
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,1/2] RISC-V: Add cmpmemsi expansion
[v2,1/2] RISC-V: Add cmpmemsi expansion
- - - -
-
-
-
2024-05-15
Christoph Müllner
New
[v2,1/2] riscv-cores.def: Fix description of RISCV_CORE() macro
[v2,1/2] riscv-cores.def: Fix description of RISCV_CORE() macro
- - - -
-
-
-
2022-06-15
Christoph Müllner
New
[v2,1/2] riscv: Add support for strlen inline expansion
riscv: Introduce strlen/strcmp/strncmp inline expansion
- - - -
-
-
-
2023-09-06
Christoph Müllner
New
[v2,1/2] riscv: thead: Add support for the XTheadMemIdx ISA extension
riscv: Adding support for XTHead(F)MemIdx
- - - -
-
-
-
2023-10-20
Christoph Müllner
New
[v2,1/4] RISC-V: Add test for sraiw-31 special case
[v2,1/4] RISC-V: Add test for sraiw-31 special case
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[v2,10/11] riscv: thead: Add support for XTheadFmv ISA extension
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,11/11] riscv: thead: Add support for XTheadMemPair ISA extension
RISC-V: Add XThead* extension support
- - - -
-
-
-
2022-12-19
Christoph Müllner
New
[v2,2/2] RISC-V: strcmp expansion: Use adjust_address() for address calculation
Untitled series #406844
- - - -
-
-
-
2024-05-15
Christoph Müllner
New
[v2,2/2] riscv-cores.def: Add T-Head XuanTie C906
[v2,1/2] riscv-cores.def: Fix description of RISCV_CORE() macro
- - - -
-
-
-
2022-06-15
Christoph Müllner
New
[v2,2/2] riscv: Add support for str(n)cmp inline expansion
riscv: Introduce strlen/strcmp/strncmp inline expansion
- - - -
-
-
-
2023-09-06
Christoph Müllner
New
[v2,2/2] riscv: thead: Add support for the XTheadFMemIdx ISA extension
riscv: Adding support for XTHead(F)MemIdx
- - - -
-
-
-
2023-10-20
Christoph Müllner
New
[v2,2/4] RISC-V: Cover sign-extensions in lshrsi3_zero_extend_2
[v2,1/4] RISC-V: Add test for sraiw-31 special case
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[v2,3/4] RISC-V: Add zero_extract support for rv64gc
[v2,1/4] RISC-V: Add test for sraiw-31 special case
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[v2,4/4] RISC-V: Cover sign-extensions in lshr<GPR:mode>3_zero_extend_4
[v2,1/4] RISC-V: Add test for sraiw-31 special case
- - - -
-
-
-
2024-05-08
Christoph Müllner
New
[v2] RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)
[v2] RISC-V: Add support for AIA ISA extensions (Ssaia and Smaia)
- - - -
-
-
-
2022-11-27
Christoph Müllner
New
[v2] RISC-V: Add support for vector crypto extensions
[v2] RISC-V: Add support for vector crypto extensions
- - - -
-
-
-
2023-07-03
Christoph Müllner
New
[v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit
[v2] RISC-V: Document optimization parameter riscv-strcmp-inline-limit
- - - -
-
-
-
2023-12-04
Christoph Müllner
New
[v2] RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering
[v2] RISC-V: Make xtheadcondmov-indirect tests robust against instruction reordering
- 1 - -
-
-
-
2023-10-12
Christoph Müllner
New
[v3,01/11] riscv: Add basic XThead* vendor extension support
RISC-V: Add XThead* extension support
- - - -
-
-
-
2023-02-24
Christoph Müllner
New
[v3,02/11] riscv: riscv-cores.def: Add T-Head XuanTie C906
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,03/11] riscv: thead: Add support for the XTheadBa ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,04/11] riscv: thead: Add support for the XTheadBs ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,05/11] riscv: thead: Add support for the XTheadBb ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,06/11] riscv: thead: Add support for the XTheadCondMov ISA extensions
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,07/11] riscv: thead: Add support for the XTheadMac ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,08/11] riscv: thead: Add support for the XTheadFmv ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,09/11] riscv: thead: Add support for the XTheadMemPair ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,10/11] riscv: thead: Add support for the XTheadMemIdx ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v3,11/11] riscv: thead: Add support for the XTheadFMemIdx ISA extension
RISC-V: Add XThead* extension support
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2023-02-24
Christoph Müllner
New
[v4,1/9] riscv: Add basic XThead* vendor extension support
RISC-V: Add XThead* extension support
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2023-03-02
Christoph Müllner
New
[v4,2/9] riscv: riscv-cores.def: Add T-Head XuanTie C906
RISC-V: Add XThead* extension support
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2023-03-02
Christoph Müllner
New
[v4,3/9] riscv: thead: Add support for the XTheadBa ISA extension
RISC-V: Add XThead* extension support
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2023-03-02
Christoph Müllner
New
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