Message ID | 20221113230521.712693-2-christoph.muellner@vrull.eu |
---|---|
State | New |
Headers | show |
Series | riscv: Improve builtins expansion | expand |
On 11/13/22 16:05, Christoph Muellner wrote: > From: Philipp Tomsich <philipp.tomsich@vrull.eu> > > As a basis for optimized string functions (e.g., the by-pieces > implementations), we need orc.b available. This adds orc.b as an > unspec, so we can expand to it. > > gcc/ChangeLog: > > * config/riscv/bitmanip.md (orcb<mode>2): Add orc.b as an > unspec. > * config/riscv/riscv.md: Add UNSPEC_ORC_B. In general, we should prefer to express things as "real" RTL rather than UNSPECS. In this particular case expressing the orc could be done with a handful of IOR expressions, though they'd probably need to reference byte SUBREGs of the input and I dislike explicit SUBREGs in the md file even more than UNSPECs. So.... OK. Jeff ps. We could consider this a reduc_ior_scal insn, but that may be actively harmful. Having vector ops on the general and vector registers is a wart I hope we can avoid.
On 11/14/22 09:51, Jeff Law wrote: > > On 11/13/22 16:05, Christoph Muellner wrote: >> From: Philipp Tomsich <philipp.tomsich@vrull.eu> >> >> As a basis for optimized string functions (e.g., the by-pieces >> implementations), we need orc.b available. This adds orc.b as an >> unspec, so we can expand to it. >> >> gcc/ChangeLog: >> >> * config/riscv/bitmanip.md (orcb<mode>2): Add orc.b as an >> unspec. >> * config/riscv/riscv.md: Add UNSPEC_ORC_B. > In general, we should prefer to express things as "real" RTL rather > than UNSPECS. In this particular case expressing the orc could be > done with a handful of IOR expressions, though they'd probably need to > reference byte SUBREGs of the input and I dislike explicit SUBREGs in > the md file even more than UNSPECs. Mis-read the specs on orc. So ignore the comment about expressing this as a handful of IORs and about it being reduc_ior_scal. jeff
On Mon, 14 Nov 2022 at 17:51, Jeff Law <jeffreyalaw@gmail.com> wrote: > > > On 11/13/22 16:05, Christoph Muellner wrote: > > From: Philipp Tomsich <philipp.tomsich@vrull.eu> > > > > As a basis for optimized string functions (e.g., the by-pieces > > implementations), we need orc.b available. This adds orc.b as an > > unspec, so we can expand to it. > > > > gcc/ChangeLog: > > > > * config/riscv/bitmanip.md (orcb<mode>2): Add orc.b as an > > unspec. > > * config/riscv/riscv.md: Add UNSPEC_ORC_B. > In general, we should prefer to express things as "real" RTL rather than > UNSPECS. In this particular case expressing the orc could be done with > a handful of IOR expressions, though they'd probably need to reference > byte SUBREGs of the input and I dislike explicit SUBREGs in the md file > even more than UNSPECs. So.... > > OK. Applied to master. Thanks! (After using emacs' whitespace-cleanup to fix the damage that Christoph's vim did to the ChangeLog...) Philipp. > > > Jeff > > > ps. We could consider this a reduc_ior_scal insn, but that may be > actively harmful. Having vector ops on the general and vector registers > is a wart I hope we can avoid. > >
diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index b44fb9517e7..3dbe6002974 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -242,6 +242,14 @@ (define_insn "rotlsi3_sext" "rolw\t%0,%1,%2" [(set_attr "type" "bitmanip")]) +;; orc.b (or-combine) is added as an unspec for the benefit of the support +;; for optimized string functions (such as strcmp). +(define_insn "orcb<mode>2" + [(set (match_operand:X 0 "register_operand" "=r") + (unspec:X [(match_operand:X 1 "register_operand" "r")] UNSPEC_ORC_B))] + "TARGET_ZBB" + "orc.b\t%0,%1") + (define_insn "bswap<mode>2" [(set (match_operand:X 0 "register_operand" "=r") (bswap:X (match_operand:X 1 "register_operand" "r")))] diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 798f7370a08..532289dd178 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -62,6 +62,9 @@ (define_c_enum "unspec" [ ;; Stack tie UNSPEC_TIE + + ;; OR-COMBINE + UNSPEC_ORC_B ]) (define_c_enum "unspecv" [