| Message ID | 1592745008-17196-3-git-send-email-sagar.kadam@sifive.com |
|---|---|
| State | Superseded |
| Delegated to: | Andes |
| Headers | show |
| Series | update clock handler and proper cpu features | expand |
Hi Sagar, On Sun, Jun 21, 2020 at 9:10 PM Sagar Shrikant Kadam <sagar.kadam@sifive.com> wrote: > > Add cpu aliases to U-Boot specific dtsi for hifive-unleashed. > Without aliases we see that the CPU device sequence numbers are set > randomly and the cpu list/detail command will show it as follows: > => cpu list > 1: cpu@0 rv64imac > 0: cpu@1 rv64imafdc > 2: cpu@2 rv64imafdc > 3: cpu@3 rv64imafdc > 4: cpu@4 rv64imafdc Without this patch, my output does not show the cpu@0 node in the "cpu list" output. Could you please clarify? > > Seems like CPU probing with dm-model also relies on aliases as observed > in case spi. The fu540-c000-u-boot.dtsi has cpu0/1/2/3/4 nodes and so > adding corresponding aliases we can ensure that cpu devices are assigned > proper sequence as follows: > => cpu list > 0: cpu@0 rv64imac > 1: cpu@1 rv64imafdc > 2: cpu@2 rv64imafdc > 3: cpu@3 rv64imafdc > 4: cpu@4 rv64imafdc > > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> > Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> > --- Regards, Bin
Hi Bin, > -----Original Message----- > From: Bin Meng <bmeng.cn@gmail.com> > Sent: Wednesday, June 24, 2020 6:52 AM > To: Sagar Kadam <sagar.kadam@sifive.com> > Cc: U-Boot Mailing List <u-boot@lists.denx.de>; Rick Chen > <rick@andestech.com>; Lukasz Majewski <lukma@denx.de>; Jagan Teki > <jagan@amarulasolutions.com>; Pragnesh Patel > <pragnesh.patel@sifive.com>; Anup Patel <anup.patel@wdc.com>; Simon > Glass <sjg@chromium.org>; Sean Anderson <seanga2@gmail.com> > Subject: Re: [PATCH v4 2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases > > [External Email] Do not click links or attachments unless you recognize the > sender and know the content is safe > > Hi Sagar, > > On Sun, Jun 21, 2020 at 9:10 PM Sagar Shrikant Kadam > <sagar.kadam@sifive.com> wrote: > > > > Add cpu aliases to U-Boot specific dtsi for hifive-unleashed. > > Without aliases we see that the CPU device sequence numbers are set > > randomly and the cpu list/detail command will show it as follows: > > => cpu list > > 1: cpu@0 rv64imac > > 0: cpu@1 rv64imafdc > > 2: cpu@2 rv64imafdc > > 3: cpu@3 rv64imafdc > > 4: cpu@4 rv64imafdc > > Without this patch, my output does not show the cpu@0 node in the "cpu > list" output. > > Could you please clarify? I guess my explanation for your query in cover letter follow's here to. I will repost this based on spl. Thanks, Sagar > > > > > Seems like CPU probing with dm-model also relies on aliases as > > observed in case spi. The fu540-c000-u-boot.dtsi has cpu0/1/2/3/4 > > nodes and so adding corresponding aliases we can ensure that cpu > > devices are assigned proper sequence as follows: > > => cpu list > > 0: cpu@0 rv64imac > > 1: cpu@1 rv64imafdc > > 2: cpu@2 rv64imafdc > > 3: cpu@3 rv64imafdc > > 4: cpu@4 rv64imafdc > > > > Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> > > Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> > > --- > > Regards, > Bin
diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi index 3038064..69a3cd3 100644 --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -8,6 +8,11 @@ / { aliases { + cpu0 = &cpu0; + cpu1 = &cpu1; + cpu2 = &cpu2; + cpu3 = &cpu3; + cpu4 = &cpu4; spi0 = &qspi0; spi2 = &qspi2; };