| Message ID | 20190516004609.25304-3-andre.przywara@arm.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | sunxi: A64: enable first USB port on Pine64boards | expand |
On Thu, May 16, 2019 at 1:47 AM Andre Przywara <andre.przywara@arm.com> wrote: > > The first USB controller on the A64 SoC shares a PHY with the OTG > controller. Reportedly to avoid problems with the VBUS regulator under > Linux, we don't link OHCI0/EHCI0 to the USB PHY in the A64 .dtsi file. > > However on boards which can't use peripheral mode (because they have an > always-on VBUS supply on an USB-A socket) we don't need this trick, and > can properly connect host controller 0 to the PHY 0. > > Amend the Pine64 and SoPine/LTS .dts to reflect this. This enables the > upper USB port in U-Boot on those boards. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > arch/arm/dts/sun50i-a64-pine64.dts | 5 ++++- > arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 5 ++++- > 2 files changed, 8 insertions(+), 2 deletions(-) Are these changes going to go upstream to Linux too? If not it's probably best to add it to a u-boot.dtsi so the changes don't get lost when the DT files are re-synced from Linux. Same with the similar patches for the H6 boards. Peter > diff --git a/arch/arm/dts/sun50i-a64-pine64.dts b/arch/arm/dts/sun50i-a64-pine64.dts > index c077b6c1f4..523a4d5bff 100644 > --- a/arch/arm/dts/sun50i-a64-pine64.dts > +++ b/arch/arm/dts/sun50i-a64-pine64.dts > @@ -80,6 +80,8 @@ > }; > > &ehci0 { > + phys = <&usbphy 0>; > + phy-names = "usb"; > status = "okay"; > }; > > @@ -136,6 +138,8 @@ > }; > > &ohci0 { > + phys = <&usbphy 0>; > + phy-names = "usb"; > status = "okay"; > }; > > @@ -301,7 +305,6 @@ > > &usb_otg { > dr_mode = "host"; > - status = "okay"; > }; > > &usbphy { > diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts > index 53fcc9098d..1986897177 100644 > --- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts > +++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts > @@ -85,6 +85,8 @@ > }; > > &ehci0 { > + phys = <&usbphy 0>; > + phy-names = "usb"; > status = "okay"; > }; > > @@ -131,6 +133,8 @@ > }; > > &ohci0 { > + phys = <&usbphy 0>; > + phy-names = "usb"; > status = "okay"; > }; > > @@ -172,7 +176,6 @@ > > &usb_otg { > dr_mode = "host"; > - status = "okay"; > }; > > &usbphy { > -- > 2.14.5 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot
On Thu, 16 May 2019 08:15:23 +0100 Peter Robinson <pbrobinson@gmail.com> wrote: Hi Peter, > On Thu, May 16, 2019 at 1:47 AM Andre Przywara <andre.przywara@arm.com> wrote: > > > > The first USB controller on the A64 SoC shares a PHY with the OTG > > controller. Reportedly to avoid problems with the VBUS regulator under > > Linux, we don't link OHCI0/EHCI0 to the USB PHY in the A64 .dtsi file. > > > > However on boards which can't use peripheral mode (because they have an > > always-on VBUS supply on an USB-A socket) we don't need this trick, and > > can properly connect host controller 0 to the PHY 0. > > > > Amend the Pine64 and SoPine/LTS .dts to reflect this. This enables the > > upper USB port in U-Boot on those boards. > > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > > --- > > arch/arm/dts/sun50i-a64-pine64.dts | 5 ++++- > > arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 5 ++++- > > 2 files changed, 8 insertions(+), 2 deletions(-) > > Are these changes going to go upstream to Linux too? If not it's > probably best to add it to a u-boot.dtsi so the changes don't get lost > when the DT files are re-synced from Linux. Same with the similar > patches for the H6 boards. Yes, but I need to wait for the end of the merge window before I can post anything there. So I just posted this here to get some input on this. And we need to resync the DTs anyway, I will post something next week, probably syncing with 5.2-rc1. Actually I believe the changes belong into the .dtsi, as this is how the hardware is wired. But I need to do more tests, as Chen-Yu hinted that this might break USB-OTG on boards with a proper micro-B socket (like the Banana-Pi M64), due to the HCI driver always enabling VBUS. So far I failed to use host mode on that board, but I will keep digging. Cheers, Andre. > > diff --git a/arch/arm/dts/sun50i-a64-pine64.dts b/arch/arm/dts/sun50i-a64-pine64.dts > > index c077b6c1f4..523a4d5bff 100644 > > --- a/arch/arm/dts/sun50i-a64-pine64.dts > > +++ b/arch/arm/dts/sun50i-a64-pine64.dts > > @@ -80,6 +80,8 @@ > > }; > > > > &ehci0 { > > + phys = <&usbphy 0>; > > + phy-names = "usb"; > > status = "okay"; > > }; > > > > @@ -136,6 +138,8 @@ > > }; > > > > &ohci0 { > > + phys = <&usbphy 0>; > > + phy-names = "usb"; > > status = "okay"; > > }; > > > > @@ -301,7 +305,6 @@ > > > > &usb_otg { > > dr_mode = "host"; > > - status = "okay"; > > }; > > > > &usbphy { > > diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts > > index 53fcc9098d..1986897177 100644 > > --- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts > > +++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts > > @@ -85,6 +85,8 @@ > > }; > > > > &ehci0 { > > + phys = <&usbphy 0>; > > + phy-names = "usb"; > > status = "okay"; > > }; > > > > @@ -131,6 +133,8 @@ > > }; > > > > &ohci0 { > > + phys = <&usbphy 0>; > > + phy-names = "usb"; > > status = "okay"; > > }; > > > > @@ -172,7 +176,6 @@ > > > > &usb_otg { > > dr_mode = "host"; > > - status = "okay"; > > }; > > > > &usbphy { > > -- > > 2.14.5 > > > > _______________________________________________ > > U-Boot mailing list > > U-Boot@lists.denx.de > > https://lists.denx.de/listinfo/u-boot
diff --git a/arch/arm/dts/sun50i-a64-pine64.dts b/arch/arm/dts/sun50i-a64-pine64.dts index c077b6c1f4..523a4d5bff 100644 --- a/arch/arm/dts/sun50i-a64-pine64.dts +++ b/arch/arm/dts/sun50i-a64-pine64.dts @@ -80,6 +80,8 @@ }; &ehci0 { + phys = <&usbphy 0>; + phy-names = "usb"; status = "okay"; }; @@ -136,6 +138,8 @@ }; &ohci0 { + phys = <&usbphy 0>; + phy-names = "usb"; status = "okay"; }; @@ -301,7 +305,6 @@ &usb_otg { dr_mode = "host"; - status = "okay"; }; &usbphy { diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts index 53fcc9098d..1986897177 100644 --- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts +++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts @@ -85,6 +85,8 @@ }; &ehci0 { + phys = <&usbphy 0>; + phy-names = "usb"; status = "okay"; }; @@ -131,6 +133,8 @@ }; &ohci0 { + phys = <&usbphy 0>; + phy-names = "usb"; status = "okay"; }; @@ -172,7 +176,6 @@ &usb_otg { dr_mode = "host"; - status = "okay"; }; &usbphy {
The first USB controller on the A64 SoC shares a PHY with the OTG controller. Reportedly to avoid problems with the VBUS regulator under Linux, we don't link OHCI0/EHCI0 to the USB PHY in the A64 .dtsi file. However on boards which can't use peripheral mode (because they have an always-on VBUS supply on an USB-A socket) we don't need this trick, and can properly connect host controller 0 to the PHY 0. Amend the Pine64 and SoPine/LTS .dts to reflect this. This enables the upper USB port in U-Boot on those boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/dts/sun50i-a64-pine64.dts | 5 ++++- arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-)