From patchwork Thu May 16 00:46:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1100233 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454CSB6jjFz9s3Z for ; Thu, 16 May 2019 10:47:22 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 8D671C21DDC; Thu, 16 May 2019 00:46:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7E860C21E0D; Thu, 16 May 2019 00:46:46 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 26792C21BE5; Thu, 16 May 2019 00:46:43 +0000 (UTC) Received: from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id A648CC21C51 for ; Thu, 16 May 2019 00:46:42 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BAAB7A78; Wed, 15 May 2019 17:46:41 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5796F3F703; Wed, 15 May 2019 17:46:40 -0700 (PDT) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Thu, 16 May 2019 01:46:08 +0100 Message-Id: <20190516004609.25304-2-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190516004609.25304-1-andre.przywara@arm.com> References: <20190516004609.25304-1-andre.przywara@arm.com> Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Chen-Yu Tsai , Icenowy Zheng Subject: [U-Boot] [PATCH 1/2] sunxi: USB PHY: Support shared PHY 0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The Allwinner H3, H5, H6 and A64 SoCs share USB PHY 0 between the first HCI controller (OHCI0/EHCI0) and the MUSB OTG controller. Bit 0 in PHY register 0x20 selects with of the controllers is connected to the PHY. So far we were hardwiring this bit to 0, so that the OTG controller controls the pins. As the A64 has only two sets of USB pins, some boards like the Pine64 connect two USB-A sockets to them, to give more host ports. In this case we would like HCI0 to control the pins. For those boards we typically don't even enable the MUSB OTG controller in the config. Depending on whether the OTG controller is configured or not, switch PHY0 to either EHCI0/OHCI0 or the OTG controller. This enables the upper USB port on the Pine64 (and other) boards. This proves to be very useful when people want to connect both an USB keyboard and a flash drive, for instance to install a Linux distribution. Signed-off-by: Andre Przywara --- drivers/phy/allwinner/phy-sun4i-usb.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index f206fa3f5d..de1065fce6 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -240,6 +240,11 @@ static int sun4i_usb_phy_power_off(struct phy *phy) return 0; } +#ifdef CONFIG_USB_MUSB_SUNXI +#define REROUTE_TARGET true +#else +#define REROUTE_TARGET false +#endif static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, bool id_det) { u32 regval; @@ -304,7 +309,8 @@ static int sun4i_usb_phy_init(struct phy *phy) sun4i_usb_phy_passby(phy, true); - sun4i_usb_phy0_reroute(data, true); + if (data->cfg->phy0_dual_route) + sun4i_usb_phy0_reroute(data, REROUTE_TARGET); return 0; } From patchwork Thu May 16 00:46:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 1100234 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454CSf5RSgz9s3Z for ; Thu, 16 May 2019 10:47:46 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 7C676C21C51; Thu, 16 May 2019 00:47:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 22B3FC21E0B; Thu, 16 May 2019 00:47:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 9C658C21DFD; Thu, 16 May 2019 00:46:47 +0000 (UTC) Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by lists.denx.de (Postfix) with ESMTP id 36929C21C93 for ; Thu, 16 May 2019 00:46:44 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6C21815AB; Wed, 15 May 2019 17:46:43 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0610C3F703; Wed, 15 May 2019 17:46:41 -0700 (PDT) From: Andre Przywara To: Jagan Teki , Maxime Ripard Date: Thu, 16 May 2019 01:46:09 +0100 Message-Id: <20190516004609.25304-3-andre.przywara@arm.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190516004609.25304-1-andre.przywara@arm.com> References: <20190516004609.25304-1-andre.przywara@arm.com> Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Chen-Yu Tsai , Icenowy Zheng Subject: [U-Boot] [PATCH 2/2] sunxi: Pine64: DTS: enable USB PHY 0 for HCI0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The first USB controller on the A64 SoC shares a PHY with the OTG controller. Reportedly to avoid problems with the VBUS regulator under Linux, we don't link OHCI0/EHCI0 to the USB PHY in the A64 .dtsi file. However on boards which can't use peripheral mode (because they have an always-on VBUS supply on an USB-A socket) we don't need this trick, and can properly connect host controller 0 to the PHY 0. Amend the Pine64 and SoPine/LTS .dts to reflect this. This enables the upper USB port in U-Boot on those boards. Signed-off-by: Andre Przywara --- arch/arm/dts/sun50i-a64-pine64.dts | 5 ++++- arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/sun50i-a64-pine64.dts b/arch/arm/dts/sun50i-a64-pine64.dts index c077b6c1f4..523a4d5bff 100644 --- a/arch/arm/dts/sun50i-a64-pine64.dts +++ b/arch/arm/dts/sun50i-a64-pine64.dts @@ -80,6 +80,8 @@ }; &ehci0 { + phys = <&usbphy 0>; + phy-names = "usb"; status = "okay"; }; @@ -136,6 +138,8 @@ }; &ohci0 { + phys = <&usbphy 0>; + phy-names = "usb"; status = "okay"; }; @@ -301,7 +305,6 @@ &usb_otg { dr_mode = "host"; - status = "okay"; }; &usbphy { diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts index 53fcc9098d..1986897177 100644 --- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts +++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts @@ -85,6 +85,8 @@ }; &ehci0 { + phys = <&usbphy 0>; + phy-names = "usb"; status = "okay"; }; @@ -131,6 +133,8 @@ }; &ohci0 { + phys = <&usbphy 0>; + phy-names = "usb"; status = "okay"; }; @@ -172,7 +176,6 @@ &usb_otg { dr_mode = "host"; - status = "okay"; }; &usbphy {