[04/16] rockchip: rk3328: Remove redundant device tree files

Message ID	20240504194346.2462489-5-jonas@kwiboo.se
State	Accepted
Commit	2445bd0add63cdecefc9cfced813a8a49353f966
Delegated to:	Kever Yang
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1714851855; bh=qM059fhMdTiCO2SEFDJGmVBVxNg8YWbEqbKJHkrzHGE=; b=OKPrwWtOLq+L5GAlBJ1GJf99y/R6jFjssMsUDAAQJ6zw0vnejCQydwq2havjVcCbhUqq8fF7p mjUuMALQau+8A3kt9bRKU9CiFwh7+p2DiVDUJCAh9kPCETrZtqC1JWJPUz3R7/S++3gV5EgCJ/W Dh5LBr+UIYSCLdo4a/nI3fH7hcvuOtev4kZNJaN+s8pu+lN8cuLRi819D5tc2slAYO/ARzCMjWJ 8mJeotAnv67aJKtmbgYubL1AdDpdgIx7pNdubHE5jjT8JwxeG2O+7mAC5ijjcjPUiPXn6qzMHWk q1OeWrDIm+/D6Iu4NT1ptEDpUYgBTGobFs6AHQcqid1Q== From: Jonas Karlman <jonas@kwiboo.se> To: Kever Yang <kever.yang@rock-chips.com>, Simon Glass <sjg@chromium.org>, Philipp Tomsich <philipp.tomsich@vrull.eu>, Tom Rini <trini@konsulko.com>, Tianling Shen <cnsztl@gmail.com>, David Bauer <mail@david-bauer.net>, Loic Devulder <ldevulder@suse.com>, "Chen-Yu Tsai" <wens@csie.org>, Jonas Karlman <jonas@kwiboo.se>, Banglang Huang <banglang.huang@foxmail.com>, "Matwey V. Kornilov" <matwey.kornilov@gmail.com> Cc: u-boot@lists.denx.de Subject: [PATCH 04/16] rockchip: rk3328: Remove redundant device tree files Date: Sat, 4 May 2024 19:42:56 +0000 Message-ID: <20240504194346.2462489-5-jonas@kwiboo.se> In-Reply-To: <20240504194346.2462489-1-jonas@kwiboo.se> References: <20240504194346.2462489-1-jonas@kwiboo.se> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Series	rockchip: Migrate RK3308, RK3328, RK356x and RK3588 to OF_UPSTREAM \| expand [00/16] rockchip: Migrate RK3308, RK3328, RK356x and RK3588 to OF_UPSTREAM [01/16] rockchip: rk3308: Migrate to OF_UPSTREAM [02/16] rockchip: rk3308: Remove redundant device tree files [03/16] rockchip: rk3328: Migrate to OF_UPSTREAM [04/16] rockchip: rk3328: Remove redundant device tree files [05/16] rockchip: rk3399: Migrate to OF_UPSTREAM [06/16] rockchip: rk3399: Remove redundant device tree files [07/16] rockchip: rk356x: Add rk3568-u-boot.dtsi [08/16] rockchip: rk356x: Migrate to OF_UPSTREAM [09/16] rockchip: rk356x: Remove redundant device tree files [10/16] phy: rockchip: usbdp: Find phy-id from the io address [11/16] phy: rockchip: usbdp: Drop rockchip_u3phy_uboot_init() [12/16] phy: rockchip: usbdp: Adopt driver to work with upstream DT [13/16] rockchip: rk3588-rock-5b: Drop usb-typec node from u-boot.dtsi [14/16] rockchip: rk3588: Update USB3 related nodes in u-boot.dtsi [15/16] rockchip: rk3588: Migrate to OF_UPSTREAM [16/16] rockchip: rk3588: Remove redundant device tree files

On 2024/5/5 03:42, Jonas Karlman wrote: > Remove redundant device tree files now that RK3328 boards have been > migrated to use OF_UPSTREAM. > > Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > arch/arm/dts/rk3328-evb.dts | 289 --- > arch/arm/dts/rk3328-nanopi-r2c-plus.dts | 33 - > arch/arm/dts/rk3328-nanopi-r2c.dts | 40 - > arch/arm/dts/rk3328-nanopi-r2s.dts | 410 ---- > arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts | 42 - > arch/arm/dts/rk3328-orangepi-r1-plus.dts | 374 ---- > arch/arm/dts/rk3328-roc-cc.dts | 384 ---- > arch/arm/dts/rk3328-rock-pi-e.dts | 445 ---- > arch/arm/dts/rk3328-rock64.dts | 394 ---- > arch/arm/dts/rk3328.dtsi | 1944 ------------------ > include/dt-bindings/clock/rk3328-cru.h | 393 ---- > include/dt-bindings/power/rk3328-power.h | 19 - > 12 files changed, 4767 deletions(-) > delete mode 100644 arch/arm/dts/rk3328-evb.dts > delete mode 100644 arch/arm/dts/rk3328-nanopi-r2c-plus.dts > delete mode 100644 arch/arm/dts/rk3328-nanopi-r2c.dts > delete mode 100644 arch/arm/dts/rk3328-nanopi-r2s.dts > delete mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts > delete mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus.dts > delete mode 100644 arch/arm/dts/rk3328-roc-cc.dts > delete mode 100644 arch/arm/dts/rk3328-rock-pi-e.dts > delete mode 100644 arch/arm/dts/rk3328-rock64.dts > delete mode 100644 arch/arm/dts/rk3328.dtsi > delete mode 100644 include/dt-bindings/clock/rk3328-cru.h > delete mode 100644 include/dt-bindings/power/rk3328-power.h > > diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts > deleted file mode 100644 > index 1eef5504445f..000000000000 > --- a/arch/arm/dts/rk3328-evb.dts > +++ /dev/null > @@ -1,289 +0,0 @@ > -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > -/* > - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd > - */ > - > -/dts-v1/; > -#include "rk3328.dtsi" > - > -/ { > - model = "Rockchip RK3328 EVB"; > - compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; > - > - aliases { > - ethernet0 = &gmac2phy; > - mmc0 = &sdmmc; > - mmc1 = &sdio; > - mmc2 = &emmc; > - }; > - > - chosen { > - stdout-path = "serial2:1500000n8"; > - }; > - > - dc_12v: dc-12v { > - compatible = "regulator-fixed"; > - regulator-name = "dc_12v"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <12000000>; > - regulator-max-microvolt = <12000000>; > - }; > - > - sdio_pwrseq: sdio-pwrseq { > - compatible = "mmc-pwrseq-simple"; > - pinctrl-names = "default"; > - pinctrl-0 = <&wifi_enable_h>; > - > - /* > - * On the module itself this is one of these (depending > - * on the actual card populated): > - * - SDIO_RESET_L_WL_REG_ON > - * - PDN (power down when low) > - */ > - reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; > - }; > - > - vcc_sd: sdmmc-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc0m1_pin>; > - regulator-name = "vcc_sd"; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - vin-supply = <&vcc_io>; > - }; > - > - vcc_sys: vcc-sys { > - compatible = "regulator-fixed"; > - regulator-name = "vcc_sys"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <5000000>; > - regulator-max-microvolt = <5000000>; > - vin-supply = <&dc_12v>; > - }; > - > - vcc_phy: vcc-phy-regulator { > - compatible = "regulator-fixed"; > - regulator-name = "vcc_phy"; > - regulator-always-on; > - regulator-boot-on; > - }; > -}; > - > -&cpu0 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu1 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu2 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu3 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&emmc { > - bus-width = <8>; > - cap-mmc-highspeed; > - non-removable; > - pinctrl-names = "default"; > - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; > - status = "okay"; > -}; > - > -&gmac2phy { > - phy-supply = <&vcc_phy>; > - clock_in_out = "output"; > - assigned-clock-rate = <50000000>; > - assigned-clocks = <&cru SCLK_MAC2PHY>; > - assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; > - status = "okay"; > -}; > - > -&i2c1 { > - status = "okay"; > - > - rk805: pmic@18 { > - compatible = "rockchip,rk805"; > - reg = <0x18>; > - interrupt-parent = <&gpio2>; > - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; > - #clock-cells = <1>; > - clock-output-names = "xin32k", "rk805-clkout2"; > - gpio-controller; > - #gpio-cells = <2>; > - pinctrl-names = "default"; > - pinctrl-0 = <&pmic_int_l>; > - rockchip,system-power-controller; > - wakeup-source; > - > - vcc1-supply = <&vcc_sys>; > - vcc2-supply = <&vcc_sys>; > - vcc3-supply = <&vcc_sys>; > - vcc4-supply = <&vcc_sys>; > - vcc5-supply = <&vcc_io>; > - vcc6-supply = <&vcc_io>; > - > - regulators { > - vdd_logic: DCDC_REG1 { > - regulator-name = "vdd_logic"; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - > - vdd_arm: DCDC_REG2 { > - regulator-name = "vdd_arm"; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <950000>; > - }; > - }; > - > - vcc_ddr: DCDC_REG3 { > - regulator-name = "vcc_ddr"; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - }; > - }; > - > - vcc_io: DCDC_REG4 { > - regulator-name = "vcc_io"; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <3300000>; > - }; > - }; > - > - vcc_18: LDO_REG1 { > - regulator-name = "vcc_18"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vcc18_emmc: LDO_REG2 { > - regulator-name = "vcc18_emmc"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vdd_10: LDO_REG3 { > - regulator-name = "vdd_10"; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - }; > - }; > -}; > - > -&pinctrl { > - pmic { > - pmic_int_l: pmic-int-l { > - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; > - }; > - }; > - > - sdio-pwrseq { > - wifi_enable_h: wifi-enable-h { > - rockchip,pins = > - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > -}; > - > -&sdio { > - bus-width = <4>; > - cap-sd-highspeed; > - cap-sdio-irq; > - keep-power-in-suspend; > - max-frequency = <150000000>; > - mmc-pwrseq = <&sdio_pwrseq>; > - non-removable; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; > - status = "okay"; > -}; > - > -&sdmmc { > - bus-width = <4>; > - cap-mmc-highspeed; > - cap-sd-highspeed; > - disable-wp; > - max-frequency = <150000000>; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; > - vmmc-supply = <&vcc_sd>; > - status = "okay"; > -}; > - > -&tsadc { > - status = "okay"; > -}; > - > -&uart2 { > - status = "okay"; > -}; > - > -&u2phy { > - status = "okay"; > -}; > - > -&u2phy_host { > - status = "okay"; > -}; > - > -&u2phy_otg { > - status = "okay"; > -}; > - > -&usb20_otg { > - status = "okay"; > -}; > - > -&usb_host0_ehci { > - status = "okay"; > -}; > - > -&usb_host0_ohci { > - status = "okay"; > -}; > diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts b/arch/arm/dts/rk3328-nanopi-r2c-plus.dts > deleted file mode 100644 > index 16a1958e4572..000000000000 > --- a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts > +++ /dev/null > @@ -1,33 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > -/* > - * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. > - * (http://www.friendlyarm.com) > - * > - * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com> > - */ > - > -/dts-v1/; > -#include "rk3328-nanopi-r2c.dts" > - > -/ { > - model = "FriendlyElec NanoPi R2C Plus"; > - compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328"; > - > - aliases { > - mmc1 = &emmc; > - }; > -}; > - > -&emmc { > - bus-width = <8>; > - cap-mmc-highspeed; > - max-frequency = <150000000>; > - mmc-ddr-1_8v; > - mmc-hs200-1_8v; > - non-removable; > - pinctrl-names = "default"; > - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; > - vmmc-supply = <&vcc_io_33>; > - vqmmc-supply = <&vcc18_emmc>; > - status = "okay"; > -}; > diff --git a/arch/arm/dts/rk3328-nanopi-r2c.dts b/arch/arm/dts/rk3328-nanopi-r2c.dts > deleted file mode 100644 > index a07a26b944a0..000000000000 > --- a/arch/arm/dts/rk3328-nanopi-r2c.dts > +++ /dev/null > @@ -1,40 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > -/* > - * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. > - * (http://www.friendlyarm.com) > - * > - * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com> > - */ > - > -/dts-v1/; > -#include "rk3328-nanopi-r2s.dts" > - > -/ { > - model = "FriendlyElec NanoPi R2C"; > - compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; > -}; > - > -&gmac2io { > - phy-handle = <&yt8521s>; > - tx_delay = <0x22>; > - rx_delay = <0x12>; > - > - mdio { > - /delete-node/ ethernet-phy@1; > - > - yt8521s: ethernet-phy@3 { > - compatible = "ethernet-phy-ieee802.3-c22"; > - reg = <3>; > - > - motorcomm,clk-out-frequency-hz = <125000000>; > - motorcomm,keep-pll-enabled; > - motorcomm,auto-sleep-disabled; > - > - pinctrl-0 = <&eth_phy_reset_pin>; > - pinctrl-names = "default"; > - reset-assert-us = <10000>; > - reset-deassert-us = <50000>; > - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > - }; > - }; > -}; > diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts > deleted file mode 100644 > index a4399da7d8b1..000000000000 > --- a/arch/arm/dts/rk3328-nanopi-r2s.dts > +++ /dev/null > @@ -1,410 +0,0 @@ > -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > -/* > - * Copyright (c) 2020 David Bauer <mail@david-bauer.net> > - */ > - > -/dts-v1/; > - > -#include <dt-bindings/input/input.h> > -#include <dt-bindings/gpio/gpio.h> > -#include "rk3328.dtsi" > - > -/ { > - model = "FriendlyElec NanoPi R2S"; > - compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; > - > - aliases { > - ethernet0 = &gmac2io; > - ethernet1 = &rtl8153; > - mmc0 = &sdmmc; > - }; > - > - chosen { > - stdout-path = "serial2:1500000n8"; > - }; > - > - gmac_clk: gmac-clock { > - compatible = "fixed-clock"; > - clock-frequency = <125000000>; > - clock-output-names = "gmac_clkin"; > - #clock-cells = <0>; > - }; > - > - keys { > - compatible = "gpio-keys"; > - pinctrl-0 = <&reset_button_pin>; > - pinctrl-names = "default"; > - > - key-reset { > - label = "reset"; > - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; > - linux,code = <KEY_RESTART>; > - debounce-interval = <50>; > - }; > - }; > - > - leds { > - compatible = "gpio-leds"; > - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; > - pinctrl-names = "default"; > - > - lan_led: led-0 { > - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; > - label = "nanopi-r2s:green:lan"; > - }; > - > - sys_led: led-1 { > - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; > - label = "nanopi-r2s:red:sys"; > - default-state = "on"; > - }; > - > - wan_led: led-2 { > - gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; > - label = "nanopi-r2s:green:wan"; > - }; > - }; > - > - vcc_io_sdio: sdmmcio-regulator { > - compatible = "regulator-gpio"; > - enable-active-high; > - gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; > - pinctrl-0 = <&sdio_vcc_pin>; > - pinctrl-names = "default"; > - regulator-name = "vcc_io_sdio"; > - regulator-always-on; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <3300000>; > - regulator-settling-time-us = <5000>; > - regulator-type = "voltage"; > - startup-delay-us = <2000>; > - states = <1800000 0x1>, > - <3300000 0x0>; > - vin-supply = <&vcc_io_33>; > - }; > - > - vcc_sd: sdmmc-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; > - pinctrl-0 = <&sdmmc0m1_pin>; > - pinctrl-names = "default"; > - regulator-name = "vcc_sd"; > - regulator-boot-on; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - vin-supply = <&vcc_io_33>; > - }; > - > - vdd_5v: vdd-5v { > - compatible = "regulator-fixed"; > - regulator-name = "vdd_5v"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <5000000>; > - regulator-max-microvolt = <5000000>; > - }; > - > - vdd_5v_lan: vdd-5v-lan { > - compatible = "regulator-fixed"; > - enable-active-high; > - gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; > - pinctrl-0 = <&lan_vdd_pin>; > - pinctrl-names = "default"; > - regulator-name = "vdd_5v_lan"; > - regulator-always-on; > - regulator-boot-on; > - vin-supply = <&vdd_5v>; > - }; > -}; > - > -&cpu0 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu1 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu2 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu3 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&display_subsystem { > - status = "disabled"; > -}; > - > -&gmac2io { > - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; > - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; > - clock_in_out = "input"; > - phy-handle = <&rtl8211e>; > - phy-mode = "rgmii"; > - phy-supply = <&vcc_io_33>; > - pinctrl-0 = <&rgmiim1_pins>; > - pinctrl-names = "default"; > - rx_delay = <0x18>; > - snps,aal; > - tx_delay = <0x24>; > - status = "okay"; > - > - mdio { > - compatible = "snps,dwmac-mdio"; > - #address-cells = <1>; > - #size-cells = <0>; > - > - rtl8211e: ethernet-phy@1 { > - reg = <1>; > - pinctrl-0 = <&eth_phy_reset_pin>; > - pinctrl-names = "default"; > - reset-assert-us = <10000>; > - reset-deassert-us = <50000>; > - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > - }; > - }; > -}; > - > -&i2c1 { > - status = "okay"; > - > - rk805: pmic@18 { > - compatible = "rockchip,rk805"; > - reg = <0x18>; > - interrupt-parent = <&gpio1>; > - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; > - #clock-cells = <1>; > - clock-output-names = "xin32k", "rk805-clkout2"; > - gpio-controller; > - #gpio-cells = <2>; > - pinctrl-0 = <&pmic_int_l>; > - pinctrl-names = "default"; > - rockchip,system-power-controller; > - wakeup-source; > - > - vcc1-supply = <&vdd_5v>; > - vcc2-supply = <&vdd_5v>; > - vcc3-supply = <&vdd_5v>; > - vcc4-supply = <&vdd_5v>; > - vcc5-supply = <&vcc_io_33>; > - vcc6-supply = <&vdd_5v>; > - > - regulators { > - vdd_log: DCDC_REG1 { > - regulator-name = "vdd_log"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-ramp-delay = <12500>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - > - vdd_arm: DCDC_REG2 { > - regulator-name = "vdd_arm"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-ramp-delay = <12500>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <950000>; > - }; > - }; > - > - vcc_ddr: DCDC_REG3 { > - regulator-name = "vcc_ddr"; > - regulator-always-on; > - regulator-boot-on; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - }; > - }; > - > - vcc_io_33: DCDC_REG4 { > - regulator-name = "vcc_io_33"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <3300000>; > - }; > - }; > - > - vcc_18: LDO_REG1 { > - regulator-name = "vcc_18"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vcc18_emmc: LDO_REG2 { > - regulator-name = "vcc18_emmc"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vdd_10: LDO_REG3 { > - regulator-name = "vdd_10"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - }; > - }; > -}; > - > -&io_domains { > - pmuio-supply = <&vcc_io_33>; > - vccio1-supply = <&vcc_io_33>; > - vccio2-supply = <&vcc18_emmc>; > - vccio3-supply = <&vcc_io_sdio>; > - vccio4-supply = <&vcc_18>; > - vccio5-supply = <&vcc_io_33>; > - vccio6-supply = <&vcc_io_33>; > - status = "okay"; > -}; > - > -&pinctrl { > - button { > - reset_button_pin: reset-button-pin { > - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - gmac2io { > - eth_phy_reset_pin: eth-phy-reset-pin { > - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; > - }; > - }; > - > - leds { > - lan_led_pin: lan-led-pin { > - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - > - sys_led_pin: sys-led-pin { > - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - > - wan_led_pin: wan-led-pin { > - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - lan { > - lan_vdd_pin: lan-vdd-pin { > - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - pmic { > - pmic_int_l: pmic-int-l { > - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; > - }; > - }; > - > - sd { > - sdio_vcc_pin: sdio-vcc-pin { > - rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; > - }; > - }; > -}; > - > -&pwm2 { > - status = "okay"; > -}; > - > -&sdmmc { > - bus-width = <4>; > - cap-sd-highspeed; > - disable-wp; > - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; > - pinctrl-names = "default"; > - sd-uhs-sdr12; > - sd-uhs-sdr25; > - sd-uhs-sdr50; > - sd-uhs-sdr104; > - vmmc-supply = <&vcc_sd>; > - vqmmc-supply = <&vcc_io_sdio>; > - status = "okay"; > -}; > - > -&tsadc { > - rockchip,hw-tshut-mode = <0>; > - rockchip,hw-tshut-polarity = <0>; > - status = "okay"; > -}; > - > -&u2phy { > - status = "okay"; > -}; > - > -&u2phy_host { > - status = "okay"; > -}; > - > -&u2phy_otg { > - status = "okay"; > -}; > - > -&uart2 { > - status = "okay"; > -}; > - > -&usb20_otg { > - status = "okay"; > - dr_mode = "host"; > -}; > - > -&usbdrd3 { > - dr_mode = "host"; > - status = "okay"; > - #address-cells = <1>; > - #size-cells = <0>; > - > - /* Second port is for USB 3.0 */ > - rtl8153: device@2 { > - compatible = "usbbda,8153"; > - reg = <2>; > - }; > -}; > - > -&usb_host0_ehci { > - status = "okay"; > -}; > - > -&usb_host0_ohci { > - status = "okay"; > -}; > diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts > deleted file mode 100644 > index 4237f2ee8fee..000000000000 > --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts > +++ /dev/null > @@ -1,42 +0,0 @@ > -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT > -/* > - * Copyright (c) 2016 Xunlong Software. Co., Ltd. > - * (http://www.orangepi.org) > - * > - * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com> > - */ > - > -/dts-v1/; > -#include "rk3328-orangepi-r1-plus.dts" > - > -/ { > - model = "Xunlong Orange Pi R1 Plus LTS"; > - compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; > -}; > - > -&gmac2io { > - phy-handle = <&yt8531c>; > - tx_delay = <0x19>; > - rx_delay = <0x05>; > - > - mdio { > - /delete-node/ ethernet-phy@1; > - > - yt8531c: ethernet-phy@0 { > - compatible = "ethernet-phy-ieee802.3-c22"; > - reg = <0>; > - > - motorcomm,auto-sleep-disabled; > - motorcomm,clk-out-frequency-hz = <125000000>; > - motorcomm,keep-pll-enabled; > - motorcomm,rx-clk-drv-microamp = <5020>; > - motorcomm,rx-data-drv-microamp = <5020>; > - > - pinctrl-0 = <&eth_phy_reset_pin>; > - pinctrl-names = "default"; > - reset-assert-us = <15000>; > - reset-deassert-us = <50000>; > - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > - }; > - }; > -}; > diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts > deleted file mode 100644 > index f20662929c77..000000000000 > --- a/arch/arm/dts/rk3328-orangepi-r1-plus.dts > +++ /dev/null > @@ -1,374 +0,0 @@ > -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > -/* > - * Based on rk3328-nanopi-r2s.dts, which is: > - * Copyright (c) 2020 David Bauer <mail@david-bauer.net> > - */ > - > -/dts-v1/; > - > -#include <dt-bindings/gpio/gpio.h> > -#include <dt-bindings/leds/common.h> > -#include "rk3328.dtsi" > - > -/ { > - model = "Xunlong Orange Pi R1 Plus"; > - compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; > - > - aliases { > - ethernet0 = &gmac2io; > - ethernet1 = &rtl8153; > - mmc0 = &sdmmc; > - }; > - > - chosen { > - stdout-path = "serial2:1500000n8"; > - }; > - > - gmac_clk: gmac-clock { > - compatible = "fixed-clock"; > - clock-frequency = <125000000>; > - clock-output-names = "gmac_clkin"; > - #clock-cells = <0>; > - }; > - > - leds { > - compatible = "gpio-leds"; > - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; > - pinctrl-names = "default"; > - > - led-0 { > - function = LED_FUNCTION_LAN; > - color = <LED_COLOR_ID_GREEN>; > - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; > - }; > - > - led-1 { > - function = LED_FUNCTION_STATUS; > - color = <LED_COLOR_ID_RED>; > - gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; > - linux,default-trigger = "heartbeat"; > - }; > - > - led-2 { > - function = LED_FUNCTION_WAN; > - color = <LED_COLOR_ID_GREEN>; > - gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; > - }; > - }; > - > - vcc_sd: sdmmc-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; > - pinctrl-0 = <&sdmmc0m1_pin>; > - pinctrl-names = "default"; > - regulator-name = "vcc_sd"; > - regulator-boot-on; > - vin-supply = <&vcc_io>; > - }; > - > - vcc_sys: vcc-sys-regulator { > - compatible = "regulator-fixed"; > - regulator-name = "vcc_sys"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <5000000>; > - regulator-max-microvolt = <5000000>; > - }; > - > - vdd_5v_lan: vdd-5v-lan-regulator { > - compatible = "regulator-fixed"; > - enable-active-high; > - gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; > - pinctrl-0 = <&lan_vdd_pin>; > - pinctrl-names = "default"; > - regulator-name = "vdd_5v_lan"; > - regulator-always-on; > - regulator-boot-on; > - vin-supply = <&vcc_sys>; > - }; > -}; > - > -&cpu0 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu1 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu2 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu3 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&display_subsystem { > - status = "disabled"; > -}; > - > -&gmac2io { > - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; > - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; > - clock_in_out = "input"; > - phy-handle = <&rtl8211e>; > - phy-mode = "rgmii"; > - phy-supply = <&vcc_io>; > - pinctrl-0 = <&rgmiim1_pins>; > - pinctrl-names = "default"; > - snps,aal; > - rx_delay = <0x18>; > - tx_delay = <0x24>; > - status = "okay"; > - > - mdio { > - compatible = "snps,dwmac-mdio"; > - #address-cells = <1>; > - #size-cells = <0>; > - > - rtl8211e: ethernet-phy@1 { > - reg = <1>; > - pinctrl-0 = <&eth_phy_reset_pin>; > - pinctrl-names = "default"; > - reset-assert-us = <10000>; > - reset-deassert-us = <50000>; > - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > - }; > - }; > -}; > - > -&i2c1 { > - status = "okay"; > - > - rk805: pmic@18 { > - compatible = "rockchip,rk805"; > - reg = <0x18>; > - interrupt-parent = <&gpio1>; > - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; > - #clock-cells = <1>; > - clock-output-names = "xin32k", "rk805-clkout2"; > - gpio-controller; > - #gpio-cells = <2>; > - pinctrl-0 = <&pmic_int_l>; > - pinctrl-names = "default"; > - rockchip,system-power-controller; > - wakeup-source; > - > - vcc1-supply = <&vcc_sys>; > - vcc2-supply = <&vcc_sys>; > - vcc3-supply = <&vcc_sys>; > - vcc4-supply = <&vcc_sys>; > - vcc5-supply = <&vcc_io>; > - vcc6-supply = <&vcc_sys>; > - > - regulators { > - vdd_log: DCDC_REG1 { > - regulator-name = "vdd_log"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-ramp-delay = <12500>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - > - vdd_arm: DCDC_REG2 { > - regulator-name = "vdd_arm"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-ramp-delay = <12500>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <950000>; > - }; > - }; > - > - vcc_ddr: DCDC_REG3 { > - regulator-name = "vcc_ddr"; > - regulator-always-on; > - regulator-boot-on; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - }; > - }; > - > - vcc_io: DCDC_REG4 { > - regulator-name = "vcc_io"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <3300000>; > - }; > - }; > - > - vcc_18: LDO_REG1 { > - regulator-name = "vcc_18"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vcc18_emmc: LDO_REG2 { > - regulator-name = "vcc18_emmc"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vdd_10: LDO_REG3 { > - regulator-name = "vdd_10"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - }; > - }; > -}; > - > -&io_domains { > - pmuio-supply = <&vcc_io>; > - vccio1-supply = <&vcc_io>; > - vccio2-supply = <&vcc18_emmc>; > - vccio3-supply = <&vcc_io>; > - vccio4-supply = <&vcc_io>; > - vccio5-supply = <&vcc_io>; > - vccio6-supply = <&vcc_io>; > - status = "okay"; > -}; > - > -&pinctrl { > - gmac2io { > - eth_phy_reset_pin: eth-phy-reset-pin { > - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; > - }; > - }; > - > - leds { > - lan_led_pin: lan-led-pin { > - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - > - sys_led_pin: sys-led-pin { > - rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - > - wan_led_pin: wan-led-pin { > - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - lan { > - lan_vdd_pin: lan-vdd-pin { > - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - pmic { > - pmic_int_l: pmic-int-l { > - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; > - }; > - }; > -}; > - > -&pwm2 { > - status = "okay"; > -}; > - > -&sdmmc { > - bus-width = <4>; > - cap-sd-highspeed; > - disable-wp; > - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; > - pinctrl-names = "default"; > - vmmc-supply = <&vcc_sd>; > - status = "okay"; > -}; > - > -&spi0 { > - status = "okay"; > - > - flash@0 { > - compatible = "jedec,spi-nor"; > - reg = <0>; > - spi-max-frequency = <50000000>; > - }; > -}; > - > -&tsadc { > - rockchip,hw-tshut-mode = <0>; > - rockchip,hw-tshut-polarity = <0>; > - status = "okay"; > -}; > - > -&u2phy { > - status = "okay"; > -}; > - > -&u2phy_host { > - status = "okay"; > -}; > - > -&u2phy_otg { > - status = "okay"; > -}; > - > -&uart2 { > - status = "okay"; > -}; > - > -&usb20_otg { > - dr_mode = "host"; > - status = "okay"; > -}; > - > -&usbdrd3 { > - dr_mode = "host"; > - status = "okay"; > - #address-cells = <1>; > - #size-cells = <0>; > - > - /* Second port is for USB 3.0 */ > - rtl8153: device@2 { > - compatible = "usbbda,8153"; > - reg = <2>; > - }; > -}; > - > -&usb_host0_ehci { > - status = "okay"; > -}; > - > -&usb_host0_ohci { > - status = "okay"; > -}; > diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts > deleted file mode 100644 > index 414897a57e75..000000000000 > --- a/arch/arm/dts/rk3328-roc-cc.dts > +++ /dev/null > @@ -1,384 +0,0 @@ > -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > -/* > - * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd > - */ > - > -/dts-v1/; > -#include "rk3328.dtsi" > - > -/ { > - model = "Firefly roc-rk3328-cc"; > - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328"; > - > - aliases { > - ethernet0 = &gmac2io; > - mmc0 = &sdmmc; > - mmc1 = &emmc; > - }; > - > - chosen { > - stdout-path = "serial2:1500000n8"; > - }; > - > - gmac_clkin: external-gmac-clock { > - compatible = "fixed-clock"; > - clock-frequency = <125000000>; > - clock-output-names = "gmac_clkin"; > - #clock-cells = <0>; > - }; > - > - dc_12v: dc-12v { > - compatible = "regulator-fixed"; > - regulator-name = "dc_12v"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <12000000>; > - regulator-max-microvolt = <12000000>; > - }; > - > - vcc_sd: sdmmc-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc0m1_pin>; > - regulator-boot-on; > - regulator-name = "vcc_sd"; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - vin-supply = <&vcc_io>; > - }; > - > - vcc_sdio: sdmmcio-regulator { > - compatible = "regulator-gpio"; > - gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>; > - states = <1800000 0x1>, > - <3300000 0x0>; > - regulator-name = "vcc_sdio"; > - regulator-type = "voltage"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <3300000>; > - regulator-always-on; > - vin-supply = <&vcc_sys>; > - }; > - > - vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { > - compatible = "regulator-fixed"; > - enable-active-high; > - gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; > - pinctrl-names = "default"; > - pinctrl-0 = <&usb20_host_drv>; > - regulator-name = "vcc_host1_5v"; > - regulator-always-on; > - vin-supply = <&vcc_sys>; > - }; > - > - vcc_sys: vcc-sys { > - compatible = "regulator-fixed"; > - regulator-name = "vcc_sys"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <5000000>; > - regulator-max-microvolt = <5000000>; > - vin-supply = <&dc_12v>; > - }; > - > - vcc_phy: vcc-phy-regulator { > - compatible = "regulator-fixed"; > - regulator-name = "vcc_phy"; > - regulator-always-on; > - regulator-boot-on; > - }; > - > - leds { > - compatible = "gpio-leds"; > - > - power_led: led-0 { > - label = "firefly:blue:power"; > - linux,default-trigger = "heartbeat"; > - gpios = <&rk805 1 GPIO_ACTIVE_LOW>; > - default-state = "on"; > - }; > - > - user_led: led-1 { > - label = "firefly:yellow:user"; > - linux,default-trigger = "mmc1"; > - gpios = <&rk805 0 GPIO_ACTIVE_LOW>; > - default-state = "off"; > - }; > - }; > -}; > - > -&analog_sound { > - status = "okay"; > -}; > - > -&codec { > - status = "okay"; > -}; > - > -&cpu0 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu1 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu2 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu3 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&emmc { > - bus-width = <8>; > - cap-mmc-highspeed; > - max-frequency = <150000000>; > - mmc-ddr-1_8v; > - mmc-hs200-1_8v; > - non-removable; > - pinctrl-names = "default"; > - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; > - vmmc-supply = <&vcc_io>; > - vqmmc-supply = <&vcc18_emmc>; > - status = "okay"; > -}; > - > -&gmac2io { > - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; > - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; > - clock_in_out = "input"; > - phy-supply = <&vcc_phy>; > - phy-mode = "rgmii"; > - pinctrl-names = "default"; > - pinctrl-0 = <&rgmiim1_pins>; > - snps,aal; > - snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > - snps,reset-active-low; > - snps,reset-delays-us = <0 10000 50000>; > - snps,rxpbl = <0x4>; > - snps,txpbl = <0x4>; > - tx_delay = <0x24>; > - rx_delay = <0x18>; > - status = "okay"; > -}; > - > -&hdmi { > - status = "okay"; > -}; > - > -&hdmiphy { > - status = "okay"; > -}; > - > -&hdmi_sound { > - status = "okay"; > -}; > - > -&i2c1 { > - status = "okay"; > - > - rk805: pmic@18 { > - compatible = "rockchip,rk805"; > - reg = <0x18>; > - interrupt-parent = <&gpio1>; > - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; > - #clock-cells = <1>; > - clock-output-names = "xin32k", "rk805-clkout2"; > - gpio-controller; > - #gpio-cells = <2>; > - pinctrl-names = "default"; > - pinctrl-0 = <&pmic_int_l>; > - rockchip,system-power-controller; > - wakeup-source; > - > - vcc1-supply = <&vcc_sys>; > - vcc2-supply = <&vcc_sys>; > - vcc3-supply = <&vcc_sys>; > - vcc4-supply = <&vcc_sys>; > - vcc5-supply = <&vcc_io>; > - vcc6-supply = <&vcc_io>; > - > - regulators { > - vdd_logic: DCDC_REG1 { > - regulator-name = "vdd_logic"; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - > - vdd_arm: DCDC_REG2 { > - regulator-name = "vdd_arm"; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <950000>; > - }; > - }; > - > - vcc_ddr: DCDC_REG3 { > - regulator-name = "vcc_ddr"; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - }; > - }; > - > - vcc_io: DCDC_REG4 { > - regulator-name = "vcc_io"; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <3300000>; > - }; > - }; > - > - vcc_18: LDO_REG1 { > - regulator-name = "vcc_18"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vcc18_emmc: LDO_REG2 { > - regulator-name = "vcc18_emmc"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vdd_10: LDO_REG3 { > - regulator-name = "vdd_10"; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - }; > - }; > -}; > - > -&i2s0 { > - status = "okay"; > -}; > - > -&i2s1 { > - status = "okay"; > -}; > - > -&io_domains { > - status = "okay"; > - > - vccio1-supply = <&vcc_io>; > - vccio2-supply = <&vcc18_emmc>; > - vccio3-supply = <&vcc_sdio>; > - vccio4-supply = <&vcc_18>; > - vccio5-supply = <&vcc_io>; > - vccio6-supply = <&vcc_io>; > - pmuio-supply = <&vcc_io>; > -}; > - > -&pinctrl { > - pmic { > - pmic_int_l: pmic-int-l { > - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; > - }; > - }; > - > - usb2 { > - usb20_host_drv: usb20-host-drv { > - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > -}; > - > -&sdmmc { > - bus-width = <4>; > - cap-mmc-highspeed; > - cap-sd-highspeed; > - disable-wp; > - max-frequency = <150000000>; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; > - sd-uhs-sdr12; > - sd-uhs-sdr25; > - sd-uhs-sdr50; > - sd-uhs-sdr104; > - vmmc-supply = <&vcc_sd>; > - vqmmc-supply = <&vcc_sdio>; > - status = "okay"; > -}; > - > -&tsadc { > - status = "okay"; > -}; > - > -&u2phy { > - status = "okay"; > -}; > - > -&u2phy_host { > - status = "okay"; > -}; > - > -&u2phy_otg { > - status = "okay"; > -}; > - > -&uart2 { > - status = "okay"; > -}; > - > -&usb20_otg { > - dr_mode = "host"; > - status = "okay"; > -}; > - > -&usbdrd3 { > - dr_mode = "host"; > - status = "okay"; > -}; > - > -&usb_host0_ehci { > - status = "okay"; > -}; > - > -&usb_host0_ohci { > - status = "okay"; > -}; > - > -&vop { > - status = "okay"; > -}; > - > -&vop_mmu { > - status = "okay"; > -}; > diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts > deleted file mode 100644 > index 3cda6c627b68..000000000000 > --- a/arch/arm/dts/rk3328-rock-pi-e.dts > +++ /dev/null > @@ -1,445 +0,0 @@ > -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > -/* > - * (C) Copyright 2020 Chen-Yu Tsai <wens@csie.org> > - * > - * Based on ./rk3328-rock64.dts, which is > - * > - * Copyright (c) 2017 PINE64 > - */ > - > -/dts-v1/; > - > -#include <dt-bindings/gpio/gpio.h> > -#include <dt-bindings/input/input.h> > -#include <dt-bindings/leds/common.h> > -#include <dt-bindings/pinctrl/rockchip.h> > - > -#include "rk3328.dtsi" > - > -/ { > - model = "Radxa ROCK Pi E"; > - compatible = "radxa,rockpi-e", "rockchip,rk3328"; > - > - aliases { > - ethernet0 = &gmac2io; > - ethernet1 = &gmac2phy; > - mmc0 = &sdmmc; > - mmc1 = &emmc; > - }; > - > - chosen { > - stdout-path = "serial2:1500000n8"; > - }; > - > - adc-keys { > - compatible = "adc-keys"; > - io-channels = <&saradc 0>; > - io-channel-names = "buttons"; > - keyup-threshold-microvolt = <1750000>; > - > - /* This button is unpopulated out of the factory. */ > - button-recovery { > - label = "Recovery"; > - linux,code = <KEY_VENDOR>; > - press-threshold-microvolt = <10000>; > - }; > - }; > - > - gmac_clkin: external-gmac-clock { > - compatible = "fixed-clock"; > - clock-frequency = <125000000>; > - clock-output-names = "gmac_clkin"; > - #clock-cells = <0>; > - }; > - > - leds { > - compatible = "gpio-leds"; > - pinctrl-0 = <&led_pin>; > - pinctrl-names = "default"; > - > - led-0 { > - color = <LED_COLOR_ID_BLUE>; > - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; > - linux,default-trigger = "heartbeat"; > - }; > - }; > - > - vcc_sd: sdmmc-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc0m1_pin>; > - regulator-name = "vcc_sd"; > - regulator-boot-on; > - vin-supply = <&vcc_io>; > - }; > - > - vcc_host_5v: vcc-host-5v-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; > - pinctrl-names = "default"; > - pinctrl-0 = <&usb30_host_drv>; > - enable-active-high; > - regulator-name = "vcc_host_5v"; > - regulator-always-on; > - regulator-boot-on; > - vin-supply = <&vcc_sys>; > - }; > - > - vcc_sys: vcc-sys { > - compatible = "regulator-fixed"; > - regulator-name = "vcc_sys"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <5000000>; > - regulator-max-microvolt = <5000000>; > - }; > - > - vcc_wifi: vcc-wifi-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; > - pinctrl-names = "default"; > - pinctrl-0 = <&wifi_en>; > - regulator-name = "vcc_wifi"; > - regulator-always-on; > - regulator-boot-on; > - vin-supply = <&vcc_io>; > - }; > -}; > - > -&analog_sound { > - status = "okay"; > -}; > - > -&codec { > - status = "okay"; > -}; > - > -&cpu0 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu1 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu2 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu3 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&emmc { > - bus-width = <8>; > - cap-mmc-highspeed; > - mmc-ddr-1_8v; > - mmc-hs200-1_8v; > - non-removable; > - pinctrl-names = "default"; > - pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; > - vmmc-supply = <&vcc_io>; > - vqmmc-supply = <&vcc18_emmc>; > - status = "okay"; > -}; > - > -&gmac2io { > - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; > - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; > - clock_in_out = "input"; > - phy-handle = <&rtl8211e>; > - phy-mode = "rgmii"; > - phy-supply = <&vcc_io>; > - pinctrl-names = "default"; > - pinctrl-0 = <&rgmiim1_pins>; > - snps,aal; > - snps,rxpbl = <0x4>; > - snps,txpbl = <0x4>; > - tx_delay = <0x26>; > - rx_delay = <0x11>; > - status = "okay"; > - > - mdio { > - compatible = "snps,dwmac-mdio"; > - #address-cells = <1>; > - #size-cells = <0>; > - > - rtl8211e: ethernet-phy@1 { > - reg = <1>; > - pinctrl-0 = <&eth_phy_int_pin>, <&eth_phy_reset_pin>; > - pinctrl-names = "default"; > - interrupt-parent = <&gpio1>; > - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; > - reset-assert-us = <10000>; > - reset-deassert-us = <50000>; > - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > - }; > - }; > -}; > - > -&gmac2phy { > - status = "okay"; > -}; > - > -&gpio0 { > - gpio-line-names = > - /* GPIO0_A0 - A7 */ > - "", "", "", "", "", "", "", "", > - /* GPIO0_B0 - B7 */ > - "", "", "", "", "", "", "", "", > - /* GPIO0_C0 - C7 */ > - "", "", "", "", "", "", "", "", > - /* GPIO0_D0 - D7 */ > - "", "", "", "pin-15 [GPIO0_D3]", "", "", "", ""; > -}; > - > -&gpio1 { > - gpio-line-names = > - /* GPIO1_A0 - A7 */ > - "", "", "", "", "", "", "", "", > - /* GPIO1_B0 - B7 */ > - "", "", "", "", "", "", "", "", > - /* GPIO1_C0 - C7 */ > - "", "", "", "", "", "", "", "", > - /* GPIO1_D0 - D7 */ > - "", "", "", "", "pin-07 [GPIO1_D4]", "", "", ""; > -}; > - > -&gpio2 { > - gpio-line-names = > - /* GPIO2_A0 - A7 */ > - "pin-08 [GPIO2_A0]", "pin-10 [GPIO2_A1]", "pin-11 [GPIO2_A2]", > - "pin-13 [GPIO2-A3]", "pin-27 [GPIO2_A4]", "pin-28 [GPIO2_A5]", > - "pin-33 [GPIO2_A6]", "", > - /* GPIO2_B0 - B7 */ > - "", "", "", "", "pin-26 [GPIO2_B4]", "", "", "pin-36 [GPIO2_B7]", > - /* GPIO2_C0 - C7 */ > - "pin-32 [GPIO2_C0]", "pin-35 [GPIO2_C1]", "pin-12 [GPIO2_C2]", > - "pin-38 [GPIO2_C3]", "pin-29 [GPIO2_C4]", "pin-31 [GPIO2_C5]", > - "pin-37 [GPIO2_C6]", "pin-40 [GPIO2_C7]", > - /* GPIO2_D0 - D7 */ > - "", "", "", "", "", "", "", ""; > -}; > - > -&gpio3 { > - gpio-line-names = > - /* GPIO3_A0 - A7 */ > - "pin-23 [GPIO3_A0]", "pin-19 [GPIO3_A1]", "pin-21 [GPIO3_A2]", > - "", "pin-03 [GPIO3_A4]", "", "pin-05 [GPIO3_A6]", "", > - /* GPIO3_B0 - B7 */ > - "pin-24 [GPIO3_B0]", "", "", "", "", "", "", "", > - /* GPIO3_C0 - C7 */ > - "", "", "", "", "", "", "", "", > - /* GPIO3_D0 - D7 */ > - "", "", "", "", "", "", "", ""; > -}; > - > -&i2c1 { > - status = "okay"; > - > - rk805: pmic@18 { > - compatible = "rockchip,rk805"; > - reg = <0x18>; > - interrupt-parent = <&gpio2>; > - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; > - #clock-cells = <1>; > - clock-output-names = "xin32k", "rk805-clkout2"; > - gpio-controller; > - #gpio-cells = <2>; > - pinctrl-names = "default"; > - pinctrl-0 = <&pmic_int_l>; > - rockchip,system-power-controller; > - wakeup-source; > - > - vcc1-supply = <&vcc_sys>; > - vcc2-supply = <&vcc_sys>; > - vcc3-supply = <&vcc_sys>; > - vcc4-supply = <&vcc_sys>; > - vcc5-supply = <&vcc_io>; > - vcc6-supply = <&vcc_sys>; > - > - regulators { > - vdd_log: DCDC_REG1 { > - regulator-name = "vdd_log"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-ramp-delay = <12500>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - > - vdd_arm: DCDC_REG2 { > - regulator-name = "vdd_arm"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-ramp-delay = <12500>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <950000>; > - }; > - }; > - > - vcc_ddr: DCDC_REG3 { > - regulator-name = "vcc_ddr"; > - regulator-always-on; > - regulator-boot-on; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - }; > - }; > - > - vcc_io: DCDC_REG4 { > - regulator-name = "vcc_io"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <3300000>; > - }; > - }; > - > - vcc_18: LDO_REG1 { > - regulator-name = "vcc_18"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vcc18_emmc: LDO_REG2 { > - regulator-name = "vcc18_emmc"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vdd_10: LDO_REG3 { > - regulator-name = "vdd_10"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - }; > - }; > -}; > - > -&i2s1 { > - status = "okay"; > -}; > - > -&io_domains { > - pmuio-supply = <&vcc_io>; > - vccio1-supply = <&vcc_io>; > - vccio2-supply = <&vcc18_emmc>; > - vccio3-supply = <&vcc_io>; > - vccio4-supply = <&vcc_io>; > - vccio5-supply = <&vcc_io>; > - vccio6-supply = <&vcc_io>; > - status = "okay"; > -}; > - > -&pinctrl { > - ephy { > - eth_phy_int_pin: eth-phy-int-pin { > - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>; > - }; > - > - eth_phy_reset_pin: eth-phy-reset-pin { > - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; > - }; > - }; > - > - leds { > - led_pin: led-pin { > - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - pmic { > - pmic_int_l: pmic-int-l { > - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; > - }; > - }; > - > - usb3 { > - usb30_host_drv: usb30-host-drv { > - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - wifi { > - wifi_en: wifi-en { > - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > -}; > - > -&sdmmc { > - bus-width = <4>; > - cap-sd-highspeed; > - disable-wp; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; > - vmmc-supply = <&vcc_sd>; > - status = "okay"; > -}; > - > -&saradc { > - vref-supply = <&vcc_18>; > - status = "okay"; > -}; > - > -&tsadc { > - status = "okay"; > -}; > - > -&u2phy { > - status = "okay"; > -}; > - > -&u2phy_host { > - status = "okay"; > -}; > - > -&uart2 { > - status = "okay"; > -}; > - > -&usbdrd3 { > - dr_mode = "host"; > - status = "okay"; > -}; > - > -&usb_host0_ehci { > - status = "okay"; > -}; > diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts > deleted file mode 100644 > index 229fe9da9c2d..000000000000 > --- a/arch/arm/dts/rk3328-rock64.dts > +++ /dev/null > @@ -1,394 +0,0 @@ > -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > -/* > - * Copyright (c) 2017 PINE64 > - */ > - > -/dts-v1/; > -#include "rk3328.dtsi" > - > -/ { > - model = "Pine64 Rock64"; > - compatible = "pine64,rock64", "rockchip,rk3328"; > - > - aliases { > - ethernet0 = &gmac2io; > - mmc0 = &sdmmc; > - mmc1 = &emmc; > - }; > - > - chosen { > - stdout-path = "serial2:1500000n8"; > - }; > - > - gmac_clkin: external-gmac-clock { > - compatible = "fixed-clock"; > - clock-frequency = <125000000>; > - clock-output-names = "gmac_clkin"; > - #clock-cells = <0>; > - }; > - > - vcc_sd: sdmmc-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc0m1_pin>; > - regulator-name = "vcc_sd"; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - vin-supply = <&vcc_io>; > - }; > - > - /* Common enable line for all of the rails mentioned in the labels */ > - vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator { > - compatible = "regulator-fixed"; > - gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; > - pinctrl-names = "default"; > - pinctrl-0 = <&usb20_host_drv>; > - regulator-name = "vcc_host_5v"; > - regulator-always-on; > - regulator-boot-on; > - vin-supply = <&vcc_sys>; > - }; > - > - vcc_sys: vcc-sys { > - compatible = "regulator-fixed"; > - regulator-name = "vcc_sys"; > - regulator-always-on; > - regulator-boot-on; > - regulator-min-microvolt = <5000000>; > - regulator-max-microvolt = <5000000>; > - }; > - > - ir-receiver { > - compatible = "gpio-ir-receiver"; > - gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; > - pinctrl-0 = <&ir_int>; > - pinctrl-names = "default"; > - }; > - > - leds { > - compatible = "gpio-leds"; > - > - power_led: led-0 { > - gpios = <&rk805 1 GPIO_ACTIVE_LOW>; > - linux,default-trigger = "mmc0"; > - }; > - > - standby_led: led-1 { > - gpios = <&rk805 0 GPIO_ACTIVE_LOW>; > - linux,default-trigger = "heartbeat"; > - }; > - }; > - > - spdif_sound: spdif-sound { > - compatible = "simple-audio-card"; > - simple-audio-card,name = "SPDIF"; > - > - simple-audio-card,cpu { > - sound-dai = <&spdif>; > - }; > - > - simple-audio-card,codec { > - sound-dai = <&spdif_dit>; > - }; > - }; > - > - spdif_dit: spdif-dit { > - compatible = "linux,spdif-dit"; > - #sound-dai-cells = <0>; > - }; > -}; > - > -&analog_sound { > - status = "okay"; > -}; > - > -&codec { > - mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; > - status = "okay"; > -}; > - > -&cpu0 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu1 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu2 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&cpu3 { > - cpu-supply = <&vdd_arm>; > -}; > - > -&emmc { > - bus-width = <8>; > - cap-mmc-highspeed; > - mmc-hs200-1_8v; > - non-removable; > - pinctrl-names = "default"; > - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; > - vmmc-supply = <&vcc_io>; > - vqmmc-supply = <&vcc18_emmc>; > - status = "okay"; > -}; > - > -&gmac2io { > - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; > - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; > - clock_in_out = "input"; > - phy-supply = <&vcc_io>; > - phy-mode = "rgmii"; > - pinctrl-names = "default"; > - pinctrl-0 = <&rgmiim1_pins>; > - snps,force_thresh_dma_mode; > - snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; > - snps,reset-active-low; > - snps,reset-delays-us = <0 10000 50000>; > - tx_delay = <0x24>; > - rx_delay = <0x18>; > - status = "okay"; > -}; > - > -&hdmi { > - status = "okay"; > -}; > - > -&hdmi_sound { > - status = "okay"; > -}; > - > -&hdmiphy { > - status = "okay"; > -}; > - > -&i2c1 { > - status = "okay"; > - > - rk805: pmic@18 { > - compatible = "rockchip,rk805"; > - reg = <0x18>; > - interrupt-parent = <&gpio2>; > - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; > - #clock-cells = <1>; > - clock-output-names = "xin32k", "rk805-clkout2"; > - gpio-controller; > - #gpio-cells = <2>; > - pinctrl-names = "default"; > - pinctrl-0 = <&pmic_int_l>; > - rockchip,system-power-controller; > - wakeup-source; > - > - vcc1-supply = <&vcc_sys>; > - vcc2-supply = <&vcc_sys>; > - vcc3-supply = <&vcc_sys>; > - vcc4-supply = <&vcc_sys>; > - vcc5-supply = <&vcc_io>; > - vcc6-supply = <&vcc_sys>; > - > - regulators { > - vdd_logic: DCDC_REG1 { > - regulator-name = "vdd_logic"; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-ramp-delay = <12500>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - > - vdd_arm: DCDC_REG2 { > - regulator-name = "vdd_arm"; > - regulator-min-microvolt = <712500>; > - regulator-max-microvolt = <1450000>; > - regulator-ramp-delay = <12500>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <950000>; > - }; > - }; > - > - vcc_ddr: DCDC_REG3 { > - regulator-name = "vcc_ddr"; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - }; > - }; > - > - vcc_io: DCDC_REG4 { > - regulator-name = "vcc_io"; > - regulator-min-microvolt = <3300000>; > - regulator-max-microvolt = <3300000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <3300000>; > - }; > - }; > - > - vcc_18: LDO_REG1 { > - regulator-name = "vcc_18"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vcc18_emmc: LDO_REG2 { > - regulator-name = "vcc18_emmc"; > - regulator-min-microvolt = <1800000>; > - regulator-max-microvolt = <1800000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1800000>; > - }; > - }; > - > - vdd_10: LDO_REG3 { > - regulator-name = "vdd_10"; > - regulator-min-microvolt = <1000000>; > - regulator-max-microvolt = <1000000>; > - regulator-always-on; > - regulator-boot-on; > - regulator-state-mem { > - regulator-on-in-suspend; > - regulator-suspend-microvolt = <1000000>; > - }; > - }; > - }; > - }; > -}; > - > -&i2s0 { > - status = "okay"; > -}; > - > -&i2s1 { > - status = "okay"; > -}; > - > -&io_domains { > - status = "okay"; > - > - vccio1-supply = <&vcc_io>; > - vccio2-supply = <&vcc18_emmc>; > - vccio3-supply = <&vcc_io>; > - vccio4-supply = <&vcc_18>; > - vccio5-supply = <&vcc_io>; > - vccio6-supply = <&vcc_io>; > - pmuio-supply = <&vcc_io>; > -}; > - > -&pinctrl { > - ir { > - ir_int: ir-int { > - rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - pmic { > - pmic_int_l: pmic-int-l { > - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; > - }; > - }; > - > - usb2 { > - usb20_host_drv: usb20-host-drv { > - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > -}; > - > -&sdmmc { > - bus-width = <4>; > - cap-mmc-highspeed; > - cap-sd-highspeed; > - disable-wp; > - max-frequency = <150000000>; > - pinctrl-names = "default"; > - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; > - vmmc-supply = <&vcc_sd>; > - status = "okay"; > -}; > - > -&spdif { > - pinctrl-0 = <&spdifm0_tx>; > - status = "okay"; > -}; > - > -&spi0 { > - status = "okay"; > - > - flash@0 { > - compatible = "jedec,spi-nor"; > - reg = <0>; > - > - /* maximum speed for Rockchip SPI */ > - spi-max-frequency = <50000000>; > - }; > -}; > - > -&tsadc { > - rockchip,hw-tshut-mode = <0>; > - rockchip,hw-tshut-polarity = <0>; > - status = "okay"; > -}; > - > -&uart2 { > - status = "okay"; > -}; > - > -&u2phy { > - status = "okay"; > - > - u2phy_host: host-port { > - status = "okay"; > - }; > - > - u2phy_otg: otg-port { > - status = "okay"; > - }; > -}; > - > -&usb20_otg { > - dr_mode = "host"; > - status = "okay"; > -}; > - > -&usbdrd3 { > - dr_mode = "host"; > - status = "okay"; > -}; > - > -&usb_host0_ehci { > - status = "okay"; > -}; > - > -&usb_host0_ohci { > - status = "okay"; > -}; > - > -&vop { > - status = "okay"; > -}; > - > -&vop_mmu { > - status = "okay"; > -}; > diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi > deleted file mode 100644 > index fb5dcf6e9327..000000000000 > --- a/arch/arm/dts/rk3328.dtsi > +++ /dev/null > @@ -1,1944 +0,0 @@ > -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > -/* > - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd > - */ > - > -#include <dt-bindings/clock/rk3328-cru.h> > -#include <dt-bindings/gpio/gpio.h> > -#include <dt-bindings/interrupt-controller/arm-gic.h> > -#include <dt-bindings/interrupt-controller/irq.h> > -#include <dt-bindings/pinctrl/rockchip.h> > -#include <dt-bindings/power/rk3328-power.h> > -#include <dt-bindings/soc/rockchip,boot-mode.h> > -#include <dt-bindings/thermal/thermal.h> > - > -/ { > - compatible = "rockchip,rk3328"; > - > - interrupt-parent = <&gic>; > - #address-cells = <2>; > - #size-cells = <2>; > - > - aliases { > - gpio0 = &gpio0; > - gpio1 = &gpio1; > - gpio2 = &gpio2; > - gpio3 = &gpio3; > - serial0 = &uart0; > - serial1 = &uart1; > - serial2 = &uart2; > - i2c0 = &i2c0; > - i2c1 = &i2c1; > - i2c2 = &i2c2; > - i2c3 = &i2c3; > - }; > - > - cpus { > - #address-cells = <2>; > - #size-cells = <0>; > - > - cpu0: cpu@0 { > - device_type = "cpu"; > - compatible = "arm,cortex-a53"; > - reg = <0x0 0x0>; > - clocks = <&cru ARMCLK>; > - #cooling-cells = <2>; > - cpu-idle-states = <&CPU_SLEEP>; > - dynamic-power-coefficient = <120>; > - enable-method = "psci"; > - next-level-cache = <&l2>; > - operating-points-v2 = <&cpu0_opp_table>; > - }; > - > - cpu1: cpu@1 { > - device_type = "cpu"; > - compatible = "arm,cortex-a53"; > - reg = <0x0 0x1>; > - clocks = <&cru ARMCLK>; > - #cooling-cells = <2>; > - cpu-idle-states = <&CPU_SLEEP>; > - dynamic-power-coefficient = <120>; > - enable-method = "psci"; > - next-level-cache = <&l2>; > - operating-points-v2 = <&cpu0_opp_table>; > - }; > - > - cpu2: cpu@2 { > - device_type = "cpu"; > - compatible = "arm,cortex-a53"; > - reg = <0x0 0x2>; > - clocks = <&cru ARMCLK>; > - #cooling-cells = <2>; > - cpu-idle-states = <&CPU_SLEEP>; > - dynamic-power-coefficient = <120>; > - enable-method = "psci"; > - next-level-cache = <&l2>; > - operating-points-v2 = <&cpu0_opp_table>; > - }; > - > - cpu3: cpu@3 { > - device_type = "cpu"; > - compatible = "arm,cortex-a53"; > - reg = <0x0 0x3>; > - clocks = <&cru ARMCLK>; > - #cooling-cells = <2>; > - cpu-idle-states = <&CPU_SLEEP>; > - dynamic-power-coefficient = <120>; > - enable-method = "psci"; > - next-level-cache = <&l2>; > - operating-points-v2 = <&cpu0_opp_table>; > - }; > - > - idle-states { > - entry-method = "psci"; > - > - CPU_SLEEP: cpu-sleep { > - compatible = "arm,idle-state"; > - local-timer-stop; > - arm,psci-suspend-param = <0x0010000>; > - entry-latency-us = <120>; > - exit-latency-us = <250>; > - min-residency-us = <900>; > - }; > - }; > - > - l2: l2-cache0 { > - compatible = "cache"; > - cache-level = <2>; > - cache-unified; > - }; > - }; > - > - cpu0_opp_table: opp-table-0 { > - compatible = "operating-points-v2"; > - opp-shared; > - > - opp-408000000 { > - opp-hz = /bits/ 64 <408000000>; > - opp-microvolt = <950000>; > - clock-latency-ns = <40000>; > - opp-suspend; > - }; > - opp-600000000 { > - opp-hz = /bits/ 64 <600000000>; > - opp-microvolt = <950000>; > - clock-latency-ns = <40000>; > - }; > - opp-816000000 { > - opp-hz = /bits/ 64 <816000000>; > - opp-microvolt = <1000000>; > - clock-latency-ns = <40000>; > - }; > - opp-1008000000 { > - opp-hz = /bits/ 64 <1008000000>; > - opp-microvolt = <1100000>; > - clock-latency-ns = <40000>; > - }; > - opp-1200000000 { > - opp-hz = /bits/ 64 <1200000000>; > - opp-microvolt = <1225000>; > - clock-latency-ns = <40000>; > - }; > - opp-1296000000 { > - opp-hz = /bits/ 64 <1296000000>; > - opp-microvolt = <1300000>; > - clock-latency-ns = <40000>; > - }; > - }; > - > - analog_sound: analog-sound { > - compatible = "simple-audio-card"; > - simple-audio-card,format = "i2s"; > - simple-audio-card,mclk-fs = <256>; > - simple-audio-card,name = "Analog"; > - status = "disabled"; > - > - simple-audio-card,cpu { > - sound-dai = <&i2s1>; > - }; > - > - simple-audio-card,codec { > - sound-dai = <&codec>; > - }; > - }; > - > - arm-pmu { > - compatible = "arm,cortex-a53-pmu"; > - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; > - }; > - > - display_subsystem: display-subsystem { > - compatible = "rockchip,display-subsystem"; > - ports = <&vop_out>; > - }; > - > - hdmi_sound: hdmi-sound { > - compatible = "simple-audio-card"; > - simple-audio-card,format = "i2s"; > - simple-audio-card,mclk-fs = <128>; > - simple-audio-card,name = "HDMI"; > - status = "disabled"; > - > - simple-audio-card,cpu { > - sound-dai = <&i2s0>; > - }; > - > - simple-audio-card,codec { > - sound-dai = <&hdmi>; > - }; > - }; > - > - psci { > - compatible = "arm,psci-1.0", "arm,psci-0.2"; > - method = "smc"; > - }; > - > - timer { > - compatible = "arm,armv8-timer"; > - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, > - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > - }; > - > - xin24m: xin24m { > - compatible = "fixed-clock"; > - #clock-cells = <0>; > - clock-frequency = <24000000>; > - clock-output-names = "xin24m"; > - }; > - > - i2s0: i2s@ff000000 { > - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; > - reg = <0x0 0xff000000 0x0 0x1000>; > - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>; > - clock-names = "i2s_clk", "i2s_hclk"; > - dmas = <&dmac 11>, <&dmac 12>; > - dma-names = "tx", "rx"; > - #sound-dai-cells = <0>; > - status = "disabled"; > - }; > - > - i2s1: i2s@ff010000 { > - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; > - reg = <0x0 0xff010000 0x0 0x1000>; > - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>; > - clock-names = "i2s_clk", "i2s_hclk"; > - dmas = <&dmac 14>, <&dmac 15>; > - dma-names = "tx", "rx"; > - #sound-dai-cells = <0>; > - status = "disabled"; > - }; > - > - i2s2: i2s@ff020000 { > - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; > - reg = <0x0 0xff020000 0x0 0x1000>; > - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>; > - clock-names = "i2s_clk", "i2s_hclk"; > - dmas = <&dmac 0>, <&dmac 1>; > - dma-names = "tx", "rx"; > - #sound-dai-cells = <0>; > - status = "disabled"; > - }; > - > - spdif: spdif@ff030000 { > - compatible = "rockchip,rk3328-spdif"; > - reg = <0x0 0xff030000 0x0 0x1000>; > - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>; > - clock-names = "mclk", "hclk"; > - dmas = <&dmac 10>; > - dma-names = "tx"; > - pinctrl-names = "default"; > - pinctrl-0 = <&spdifm2_tx>; > - #sound-dai-cells = <0>; > - status = "disabled"; > - }; > - > - pdm: pdm@ff040000 { > - compatible = "rockchip,pdm"; > - reg = <0x0 0xff040000 0x0 0x1000>; > - clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>; > - clock-names = "pdm_clk", "pdm_hclk"; > - dmas = <&dmac 16>; > - dma-names = "rx"; > - pinctrl-names = "default", "sleep"; > - pinctrl-0 = <&pdmm0_clk > - &pdmm0_sdi0 > - &pdmm0_sdi1 > - &pdmm0_sdi2 > - &pdmm0_sdi3>; > - pinctrl-1 = <&pdmm0_clk_sleep > - &pdmm0_sdi0_sleep > - &pdmm0_sdi1_sleep > - &pdmm0_sdi2_sleep > - &pdmm0_sdi3_sleep>; > - status = "disabled"; > - }; > - > - grf: syscon@ff100000 { > - compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; > - reg = <0x0 0xff100000 0x0 0x1000>; > - > - io_domains: io-domains { > - compatible = "rockchip,rk3328-io-voltage-domain"; > - status = "disabled"; > - }; > - > - grf_gpio: gpio { > - compatible = "rockchip,rk3328-grf-gpio"; > - gpio-controller; > - #gpio-cells = <2>; > - }; > - > - power: power-controller { > - compatible = "rockchip,rk3328-power-controller"; > - #power-domain-cells = <1>; > - #address-cells = <1>; > - #size-cells = <0>; > - > - power-domain@RK3328_PD_HEVC { > - reg = <RK3328_PD_HEVC>; > - #power-domain-cells = <0>; > - }; > - power-domain@RK3328_PD_VIDEO { > - reg = <RK3328_PD_VIDEO>; > - clocks = <&cru ACLK_RKVDEC>, > - <&cru HCLK_RKVDEC>, > - <&cru SCLK_VDEC_CABAC>, > - <&cru SCLK_VDEC_CORE>; > - #power-domain-cells = <0>; > - }; > - power-domain@RK3328_PD_VPU { > - reg = <RK3328_PD_VPU>; > - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > - #power-domain-cells = <0>; > - }; > - }; > - > - reboot-mode { > - compatible = "syscon-reboot-mode"; > - offset = <0x5c8>; > - mode-normal = <BOOT_NORMAL>; > - mode-recovery = <BOOT_RECOVERY>; > - mode-bootloader = <BOOT_FASTBOOT>; > - mode-loader = <BOOT_BL_DOWNLOAD>; > - }; > - }; > - > - uart0: serial@ff110000 { > - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; > - reg = <0x0 0xff110000 0x0 0x100>; > - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; > - clock-names = "baudclk", "apb_pclk"; > - dmas = <&dmac 2>, <&dmac 3>; > - dma-names = "tx", "rx"; > - pinctrl-names = "default"; > - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; > - reg-io-width = <4>; > - reg-shift = <2>; > - status = "disabled"; > - }; > - > - uart1: serial@ff120000 { > - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; > - reg = <0x0 0xff120000 0x0 0x100>; > - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; > - clock-names = "baudclk", "apb_pclk"; > - dmas = <&dmac 4>, <&dmac 5>; > - dma-names = "tx", "rx"; > - pinctrl-names = "default"; > - pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>; > - reg-io-width = <4>; > - reg-shift = <2>; > - status = "disabled"; > - }; > - > - uart2: serial@ff130000 { > - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; > - reg = <0x0 0xff130000 0x0 0x100>; > - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; > - clock-names = "baudclk", "apb_pclk"; > - dmas = <&dmac 6>, <&dmac 7>; > - dma-names = "tx", "rx"; > - pinctrl-names = "default"; > - pinctrl-0 = <&uart2m1_xfer>; > - reg-io-width = <4>; > - reg-shift = <2>; > - status = "disabled"; > - }; > - > - i2c0: i2c@ff150000 { > - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; > - reg = <0x0 0xff150000 0x0 0x1000>; > - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; > - #address-cells = <1>; > - #size-cells = <0>; > - clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>; > - clock-names = "i2c", "pclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&i2c0_xfer>; > - status = "disabled"; > - }; > - > - i2c1: i2c@ff160000 { > - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; > - reg = <0x0 0xff160000 0x0 0x1000>; > - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; > - #address-cells = <1>; > - #size-cells = <0>; > - clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>; > - clock-names = "i2c", "pclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&i2c1_xfer>; > - status = "disabled"; > - }; > - > - i2c2: i2c@ff170000 { > - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; > - reg = <0x0 0xff170000 0x0 0x1000>; > - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; > - #address-cells = <1>; > - #size-cells = <0>; > - clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>; > - clock-names = "i2c", "pclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&i2c2_xfer>; > - status = "disabled"; > - }; > - > - i2c3: i2c@ff180000 { > - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; > - reg = <0x0 0xff180000 0x0 0x1000>; > - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; > - #address-cells = <1>; > - #size-cells = <0>; > - clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>; > - clock-names = "i2c", "pclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&i2c3_xfer>; > - status = "disabled"; > - }; > - > - spi0: spi@ff190000 { > - compatible = "rockchip,rk3328-spi", "rockchip,rk3066-spi"; > - reg = <0x0 0xff190000 0x0 0x1000>; > - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; > - #address-cells = <1>; > - #size-cells = <0>; > - clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>; > - clock-names = "spiclk", "apb_pclk"; > - dmas = <&dmac 8>, <&dmac 9>; > - dma-names = "tx", "rx"; > - pinctrl-names = "default"; > - pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>; > - status = "disabled"; > - }; > - > - wdt: watchdog@ff1a0000 { > - compatible = "rockchip,rk3328-wdt", "snps,dw-wdt"; > - reg = <0x0 0xff1a0000 0x0 0x100>; > - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru PCLK_WDT>; > - }; > - > - pwm0: pwm@ff1b0000 { > - compatible = "rockchip,rk3328-pwm"; > - reg = <0x0 0xff1b0000 0x0 0x10>; > - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; > - clock-names = "pwm", "pclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&pwm0_pin>; > - #pwm-cells = <3>; > - status = "disabled"; > - }; > - > - pwm1: pwm@ff1b0010 { > - compatible = "rockchip,rk3328-pwm"; > - reg = <0x0 0xff1b0010 0x0 0x10>; > - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; > - clock-names = "pwm", "pclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&pwm1_pin>; > - #pwm-cells = <3>; > - status = "disabled"; > - }; > - > - pwm2: pwm@ff1b0020 { > - compatible = "rockchip,rk3328-pwm"; > - reg = <0x0 0xff1b0020 0x0 0x10>; > - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; > - clock-names = "pwm", "pclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&pwm2_pin>; > - #pwm-cells = <3>; > - status = "disabled"; > - }; > - > - pwm3: pwm@ff1b0030 { > - compatible = "rockchip,rk3328-pwm"; > - reg = <0x0 0xff1b0030 0x0 0x10>; > - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; > - clock-names = "pwm", "pclk"; > - pinctrl-names = "default"; > - pinctrl-0 = <&pwmir_pin>; > - #pwm-cells = <3>; > - status = "disabled"; > - }; > - > - dmac: dma-controller@ff1f0000 { > - compatible = "arm,pl330", "arm,primecell"; > - reg = <0x0 0xff1f0000 0x0 0x4000>; > - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; > - arm,pl330-periph-burst; > - clocks = <&cru ACLK_DMAC>; > - clock-names = "apb_pclk"; > - #dma-cells = <1>; > - }; > - > - thermal-zones { > - soc_thermal: soc-thermal { > - polling-delay-passive = <20>; > - polling-delay = <1000>; > - sustainable-power = <1000>; > - > - thermal-sensors = <&tsadc 0>; > - > - trips { > - threshold: trip-point0 { > - temperature = <70000>; > - hysteresis = <2000>; > - type = "passive"; > - }; > - target: trip-point1 { > - temperature = <85000>; > - hysteresis = <2000>; > - type = "passive"; > - }; > - soc_crit: soc-crit { > - temperature = <95000>; > - hysteresis = <2000>; > - type = "critical"; > - }; > - }; > - > - cooling-maps { > - map0 { > - trip = <&target>; > - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > - contribution = <4096>; > - }; > - }; > - }; > - > - }; > - > - tsadc: tsadc@ff250000 { > - compatible = "rockchip,rk3328-tsadc"; > - reg = <0x0 0xff250000 0x0 0x100>; > - interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; > - assigned-clocks = <&cru SCLK_TSADC>; > - assigned-clock-rates = <50000>; > - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; > - clock-names = "tsadc", "apb_pclk"; > - pinctrl-names = "init", "default", "sleep"; > - pinctrl-0 = <&otp_pin>; > - pinctrl-1 = <&otp_out>; > - pinctrl-2 = <&otp_pin>; > - resets = <&cru SRST_TSADC>; > - reset-names = "tsadc-apb"; > - rockchip,grf = <&grf>; > - rockchip,hw-tshut-temp = <100000>; > - #thermal-sensor-cells = <1>; > - status = "disabled"; > - }; > - > - efuse: efuse@ff260000 { > - compatible = "rockchip,rk3328-efuse"; > - reg = <0x0 0xff260000 0x0 0x50>; > - #address-cells = <1>; > - #size-cells = <1>; > - clocks = <&cru SCLK_EFUSE>; > - clock-names = "pclk_efuse"; > - rockchip,efuse-size = <0x20>; > - > - /* Data cells */ > - efuse_id: id@7 { > - reg = <0x07 0x10>; > - }; > - cpu_leakage: cpu-leakage@17 { > - reg = <0x17 0x1>; > - }; > - logic_leakage: logic-leakage@19 { > - reg = <0x19 0x1>; > - }; > - efuse_cpu_version: cpu-version@1a { > - reg = <0x1a 0x1>; > - bits = <3 3>; > - }; > - }; > - > - saradc: adc@ff280000 { > - compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc"; > - reg = <0x0 0xff280000 0x0 0x100>; > - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; > - #io-channel-cells = <1>; > - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; > - clock-names = "saradc", "apb_pclk"; > - resets = <&cru SRST_SARADC_P>; > - reset-names = "saradc-apb"; > - status = "disabled"; > - }; > - > - gpu: gpu@ff300000 { > - compatible = "rockchip,rk3328-mali", "arm,mali-450"; > - reg = <0x0 0xff300000 0x0 0x30000>; > - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "gp", > - "gpmmu", > - "pp", > - "pp0", > - "ppmmu0", > - "pp1", > - "ppmmu1"; > - clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; > - clock-names = "bus", "core"; > - resets = <&cru SRST_GPU_A>; > - }; > - > - h265e_mmu: iommu@ff330200 { > - compatible = "rockchip,iommu"; > - reg = <0x0 0xff330200 0 0x100>; > - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru ACLK_H265>, <&cru PCLK_H265>; > - clock-names = "aclk", "iface"; > - #iommu-cells = <0>; > - status = "disabled"; > - }; > - > - vepu_mmu: iommu@ff340800 { > - compatible = "rockchip,iommu"; > - reg = <0x0 0xff340800 0x0 0x40>; > - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > - clock-names = "aclk", "iface"; > - #iommu-cells = <0>; > - status = "disabled"; > - }; > - > - vpu: video-codec@ff350000 { > - compatible = "rockchip,rk3328-vpu"; > - reg = <0x0 0xff350000 0x0 0x800>; > - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "vdpu"; > - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > - clock-names = "aclk", "hclk"; > - iommus = <&vpu_mmu>; > - power-domains = <&power RK3328_PD_VPU>; > - }; > - > - vpu_mmu: iommu@ff350800 { > - compatible = "rockchip,iommu"; > - reg = <0x0 0xff350800 0x0 0x40>; > - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > - clock-names = "aclk", "iface"; > - #iommu-cells = <0>; > - power-domains = <&power RK3328_PD_VPU>; > - }; > - > - vdec: video-codec@ff360000 { > - compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec"; > - reg = <0x0 0xff360000 0x0 0x480>; > - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, > - <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>; > - clock-names = "axi", "ahb", "cabac", "core"; > - assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>, > - <&cru SCLK_VDEC_CORE>; > - assigned-clock-rates = <400000000>, <400000000>, <300000000>; > - iommus = <&vdec_mmu>; > - power-domains = <&power RK3328_PD_VIDEO>; > - }; > - > - vdec_mmu: iommu@ff360480 { > - compatible = "rockchip,iommu"; > - reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; > - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; > - clock-names = "aclk", "iface"; > - #iommu-cells = <0>; > - power-domains = <&power RK3328_PD_VIDEO>; > - }; > - > - vop: vop@ff370000 { > - compatible = "rockchip,rk3328-vop"; > - reg = <0x0 0xff370000 0x0 0x3efc>; > - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru ACLK_VOP>, <&cru DCLK_LCDC>, <&cru HCLK_VOP>; > - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; > - resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>; > - reset-names = "axi", "ahb", "dclk"; > - iommus = <&vop_mmu>; > - status = "disabled"; > - > - vop_out: port { > - #address-cells = <1>; > - #size-cells = <0>; > - > - vop_out_hdmi: endpoint@0 { > - reg = <0>; > - remote-endpoint = <&hdmi_in_vop>; > - }; > - }; > - }; > - > - vop_mmu: iommu@ff373f00 { > - compatible = "rockchip,iommu"; > - reg = <0x0 0xff373f00 0x0 0x100>; > - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > - clock-names = "aclk", "iface"; > - #iommu-cells = <0>; > - status = "disabled"; > - }; > - > - hdmi: hdmi@ff3c0000 { > - compatible = "rockchip,rk3328-dw-hdmi"; > - reg = <0x0 0xff3c0000 0x0 0x20000>; > - reg-io-width = <4>; > - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru PCLK_HDMI>, > - <&cru SCLK_HDMI_SFC>, > - <&cru SCLK_RTC32K>; > - clock-names = "iahb", > - "isfr", > - "cec"; > - phys = <&hdmiphy>; > - phy-names = "hdmi"; > - pinctrl-names = "default"; > - pinctrl-0 = <&hdmi_cec &hdmii2c_xfer &hdmi_hpd>; > - rockchip,grf = <&grf>; > - #sound-dai-cells = <0>; > - status = "disabled"; > - > - ports { > - hdmi_in: port { > - hdmi_in_vop: endpoint { > - remote-endpoint = <&vop_out_hdmi>; > - }; > - }; > - }; > - }; > - > - codec: codec@ff410000 { > - compatible = "rockchip,rk3328-codec"; > - reg = <0x0 0xff410000 0x0 0x1000>; > - clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>; > - clock-names = "pclk", "mclk"; > - rockchip,grf = <&grf>; > - #sound-dai-cells = <0>; > - status = "disabled"; > - }; > - > - hdmiphy: phy@ff430000 { > - compatible = "rockchip,rk3328-hdmi-phy"; > - reg = <0x0 0xff430000 0x0 0x10000>; > - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru PCLK_HDMIPHY>, <&xin24m>, <&cru DCLK_HDMIPHY>; > - clock-names = "sysclk", "refoclk", "refpclk"; > - clock-output-names = "hdmi_phy"; > - #clock-cells = <0>; > - nvmem-cells = <&efuse_cpu_version>; > - nvmem-cell-names = "cpu-version"; > - #phy-cells = <0>; > - status = "disabled"; > - }; > - > - cru: clock-controller@ff440000 { > - compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon"; > - reg = <0x0 0xff440000 0x0 0x1000>; > - rockchip,grf = <&grf>; > - #clock-cells = <1>; > - #reset-cells = <1>; > - assigned-clocks = > - /* > - * CPLL should run at 1200, but that is to high for > - * the initial dividers of most of its children. > - * We need set cpll child clk div first, > - * and then set the cpll frequency. > - */ > - <&cru DCLK_LCDC>, <&cru SCLK_PDM>, > - <&cru SCLK_RTC32K>, <&cru SCLK_UART0>, > - <&cru SCLK_UART1>, <&cru SCLK_UART2>, > - <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, > - <&cru ACLK_VIO_PRE>, <&cru ACLK_RGA_PRE>, > - <&cru ACLK_VOP_PRE>, <&cru ACLK_RKVDEC_PRE>, > - <&cru ACLK_RKVENC>, <&cru ACLK_VPU_PRE>, > - <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>, > - <&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>, > - <&cru SCLK_SDIO>, <&cru SCLK_TSP>, > - <&cru SCLK_WIFI>, <&cru ARMCLK>, > - <&cru PLL_GPLL>, <&cru PLL_CPLL>, > - <&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>, > - <&cru PCLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, > - <&cru HCLK_PERI>, <&cru PCLK_PERI>, > - <&cru SCLK_RTC32K>; > - assigned-clock-parents = > - <&cru HDMIPHY>, <&cru PLL_APLL>, > - <&cru PLL_GPLL>, <&xin24m>, > - <&xin24m>, <&xin24m>; > - assigned-clock-rates = > - <0>, <61440000>, > - <0>, <24000000>, > - <24000000>, <24000000>, > - <15000000>, <15000000>, > - <100000000>, <100000000>, > - <100000000>, <100000000>, > - <50000000>, <100000000>, > - <100000000>, <100000000>, > - <50000000>, <50000000>, > - <50000000>, <50000000>, > - <24000000>, <600000000>, > - <491520000>, <1200000000>, > - <150000000>, <75000000>, > - <75000000>, <150000000>, > - <75000000>, <75000000>, > - <32768>; > - }; > - > - usb2phy_grf: syscon@ff450000 { > - compatible = "rockchip,rk3328-usb2phy-grf", "syscon", > - "simple-mfd"; > - reg = <0x0 0xff450000 0x0 0x10000>; > - #address-cells = <1>; > - #size-cells = <1>; > - > - u2phy: usb2phy@100 { > - compatible = "rockchip,rk3328-usb2phy"; > - reg = <0x100 0x10>; > - clocks = <&xin24m>; > - clock-names = "phyclk"; > - clock-output-names = "usb480m_phy"; > - #clock-cells = <0>; > - assigned-clocks = <&cru USB480M>; > - assigned-clock-parents = <&u2phy>; > - status = "disabled"; > - > - u2phy_otg: otg-port { > - #phy-cells = <0>; > - interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, > - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "otg-bvalid", "otg-id", > - "linestate"; > - status = "disabled"; > - }; > - > - u2phy_host: host-port { > - #phy-cells = <0>; > - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "linestate"; > - status = "disabled"; > - }; > - }; > - }; > - > - sdmmc: mmc@ff500000 { > - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; > - reg = <0x0 0xff500000 0x0 0x4000>; > - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, > - <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; > - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > - fifo-depth = <0x100>; > - max-frequency = <150000000>; > - status = "disabled"; > - }; > - > - sdio: mmc@ff510000 { > - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; > - reg = <0x0 0xff510000 0x0 0x4000>; > - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, > - <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; > - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > - fifo-depth = <0x100>; > - max-frequency = <150000000>; > - status = "disabled"; > - }; > - > - emmc: mmc@ff520000 { > - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; > - reg = <0x0 0xff520000 0x0 0x4000>; > - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, > - <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; > - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; > - fifo-depth = <0x100>; > - max-frequency = <150000000>; > - status = "disabled"; > - }; > - > - gmac2io: ethernet@ff540000 { > - compatible = "rockchip,rk3328-gmac"; > - reg = <0x0 0xff540000 0x0 0x10000>; > - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "macirq"; > - clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>, > - <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>, > - <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>, > - <&cru PCLK_MAC2IO>; > - clock-names = "stmmaceth", "mac_clk_rx", > - "mac_clk_tx", "clk_mac_ref", > - "clk_mac_refout", "aclk_mac", > - "pclk_mac"; > - resets = <&cru SRST_GMAC2IO_A>; > - reset-names = "stmmaceth"; > - rockchip,grf = <&grf>; > - tx-fifo-depth = <2048>; > - rx-fifo-depth = <4096>; > - snps,txpbl = <0x4>; > - status = "disabled"; > - }; > - > - gmac2phy: ethernet@ff550000 { > - compatible = "rockchip,rk3328-gmac"; > - reg = <0x0 0xff550000 0x0 0x10000>; > - rockchip,grf = <&grf>; > - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; > - interrupt-names = "macirq"; > - clocks = <&cru SCLK_MAC2PHY_SRC>, <&cru SCLK_MAC2PHY_RXTX>, > - <&cru SCLK_MAC2PHY_RXTX>, <&cru SCLK_MAC2PHY_REF>, > - <&cru ACLK_MAC2PHY>, <&cru PCLK_MAC2PHY>, > - <&cru SCLK_MAC2PHY_OUT>; > - clock-names = "stmmaceth", "mac_clk_rx", > - "mac_clk_tx", "clk_mac_ref", > - "aclk_mac", "pclk_mac", > - "clk_macphy"; > - resets = <&cru SRST_GMAC2PHY_A>; > - reset-names = "stmmaceth"; > - phy-mode = "rmii"; > - phy-handle = <&phy>; > - tx-fifo-depth = <2048>; > - rx-fifo-depth = <4096>; > - snps,txpbl = <0x4>; > - clock_in_out = "output"; > - status = "disabled"; > - > - mdio { > - compatible = "snps,dwmac-mdio"; > - #address-cells = <1>; > - #size-cells = <0>; > - > - phy: ethernet-phy@0 { > - compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"; > - reg = <0>; > - clocks = <&cru SCLK_MAC2PHY_OUT>; > - resets = <&cru SRST_MACPHY>; > - pinctrl-names = "default"; > - pinctrl-0 = <&fephyled_rxm1 &fephyled_linkm1>; > - phy-is-integrated; > - }; > - }; > - }; > - > - usb20_otg: usb@ff580000 { > - compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb", > - "snps,dwc2"; > - reg = <0x0 0xff580000 0x0 0x40000>; > - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru HCLK_OTG>; > - clock-names = "otg"; > - dr_mode = "otg"; > - g-np-tx-fifo-size = <16>; > - g-rx-fifo-size = <280>; > - g-tx-fifo-size = <256 128 128 64 32 16>; > - phys = <&u2phy_otg>; > - phy-names = "usb2-phy"; > - status = "disabled"; > - }; > - > - usb_host0_ehci: usb@ff5c0000 { > - compatible = "generic-ehci"; > - reg = <0x0 0xff5c0000 0x0 0x10000>; > - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru HCLK_HOST0>, <&u2phy>; > - phys = <&u2phy_host>; > - phy-names = "usb"; > - status = "disabled"; > - }; > - > - usb_host0_ohci: usb@ff5d0000 { > - compatible = "generic-ohci"; > - reg = <0x0 0xff5d0000 0x0 0x10000>; > - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru HCLK_HOST0>, <&u2phy>; > - phys = <&u2phy_host>; > - phy-names = "usb"; > - status = "disabled"; > - }; > - > - usbdrd3: usb@ff600000 { > - compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; > - reg = <0x0 0xff600000 0x0 0x100000>; > - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, > - <&cru ACLK_USB3OTG>; > - clock-names = "ref_clk", "suspend_clk", > - "bus_clk"; > - dr_mode = "otg"; > - phy_type = "utmi_wide"; > - snps,dis-del-phy-power-chg-quirk; > - snps,dis_enblslpm_quirk; > - snps,dis-tx-ipgap-linecheck-quirk; > - snps,dis-u2-freeclk-exists-quirk; > - snps,dis_u2_susphy_quirk; > - snps,dis_u3_susphy_quirk; > - status = "disabled"; > - }; > - > - gic: interrupt-controller@ff811000 { > - compatible = "arm,gic-400"; > - #interrupt-cells = <3>; > - #address-cells = <0>; > - interrupt-controller; > - reg = <0x0 0xff811000 0 0x1000>, > - <0x0 0xff812000 0 0x2000>, > - <0x0 0xff814000 0 0x2000>, > - <0x0 0xff816000 0 0x2000>; > - interrupts = <GIC_PPI 9 > - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; > - }; > - > - crypto: crypto@ff060000 { > - compatible = "rockchip,rk3328-crypto"; > - reg = <0x0 0xff060000 0x0 0x4000>; > - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru HCLK_CRYPTO_MST>, <&cru HCLK_CRYPTO_SLV>, > - <&cru SCLK_CRYPTO>; > - clock-names = "hclk_master", "hclk_slave", "sclk"; > - resets = <&cru SRST_CRYPTO>; > - reset-names = "crypto-rst"; > - }; > - > - pinctrl: pinctrl { > - compatible = "rockchip,rk3328-pinctrl"; > - rockchip,grf = <&grf>; > - #address-cells = <2>; > - #size-cells = <2>; > - ranges; > - > - gpio0: gpio@ff210000 { > - compatible = "rockchip,gpio-bank"; > - reg = <0x0 0xff210000 0x0 0x100>; > - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru PCLK_GPIO0>; > - > - gpio-controller; > - #gpio-cells = <2>; > - > - interrupt-controller; > - #interrupt-cells = <2>; > - }; > - > - gpio1: gpio@ff220000 { > - compatible = "rockchip,gpio-bank"; > - reg = <0x0 0xff220000 0x0 0x100>; > - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru PCLK_GPIO1>; > - > - gpio-controller; > - #gpio-cells = <2>; > - > - interrupt-controller; > - #interrupt-cells = <2>; > - }; > - > - gpio2: gpio@ff230000 { > - compatible = "rockchip,gpio-bank"; > - reg = <0x0 0xff230000 0x0 0x100>; > - interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru PCLK_GPIO2>; > - > - gpio-controller; > - #gpio-cells = <2>; > - > - interrupt-controller; > - #interrupt-cells = <2>; > - }; > - > - gpio3: gpio@ff240000 { > - compatible = "rockchip,gpio-bank"; > - reg = <0x0 0xff240000 0x0 0x100>; > - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; > - clocks = <&cru PCLK_GPIO3>; > - > - gpio-controller; > - #gpio-cells = <2>; > - > - interrupt-controller; > - #interrupt-cells = <2>; > - }; > - > - pcfg_pull_up: pcfg-pull-up { > - bias-pull-up; > - }; > - > - pcfg_pull_down: pcfg-pull-down { > - bias-pull-down; > - }; > - > - pcfg_pull_none: pcfg-pull-none { > - bias-disable; > - }; > - > - pcfg_pull_none_2ma: pcfg-pull-none-2ma { > - bias-disable; > - drive-strength = <2>; > - }; > - > - pcfg_pull_up_2ma: pcfg-pull-up-2ma { > - bias-pull-up; > - drive-strength = <2>; > - }; > - > - pcfg_pull_up_4ma: pcfg-pull-up-4ma { > - bias-pull-up; > - drive-strength = <4>; > - }; > - > - pcfg_pull_none_4ma: pcfg-pull-none-4ma { > - bias-disable; > - drive-strength = <4>; > - }; > - > - pcfg_pull_down_4ma: pcfg-pull-down-4ma { > - bias-pull-down; > - drive-strength = <4>; > - }; > - > - pcfg_pull_none_8ma: pcfg-pull-none-8ma { > - bias-disable; > - drive-strength = <8>; > - }; > - > - pcfg_pull_up_8ma: pcfg-pull-up-8ma { > - bias-pull-up; > - drive-strength = <8>; > - }; > - > - pcfg_pull_none_12ma: pcfg-pull-none-12ma { > - bias-disable; > - drive-strength = <12>; > - }; > - > - pcfg_pull_up_12ma: pcfg-pull-up-12ma { > - bias-pull-up; > - drive-strength = <12>; > - }; > - > - pcfg_output_high: pcfg-output-high { > - output-high; > - }; > - > - pcfg_output_low: pcfg-output-low { > - output-low; > - }; > - > - pcfg_input_high: pcfg-input-high { > - bias-pull-up; > - input-enable; > - }; > - > - pcfg_input: pcfg-input { > - input-enable; > - }; > - > - i2c0 { > - i2c0_xfer: i2c0-xfer { > - rockchip,pins = <2 RK_PD0 1 &pcfg_pull_none>, > - <2 RK_PD1 1 &pcfg_pull_none>; > - }; > - }; > - > - i2c1 { > - i2c1_xfer: i2c1-xfer { > - rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none>, > - <2 RK_PA5 2 &pcfg_pull_none>; > - }; > - }; > - > - i2c2 { > - i2c2_xfer: i2c2-xfer { > - rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>, > - <2 RK_PB6 1 &pcfg_pull_none>; > - }; > - }; > - > - i2c3 { > - i2c3_xfer: i2c3-xfer { > - rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>, > - <0 RK_PA6 2 &pcfg_pull_none>; > - }; > - i2c3_pins: i2c3-pins { > - rockchip,pins = > - <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, > - <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - hdmi_i2c { > - hdmii2c_xfer: hdmii2c-xfer { > - rockchip,pins = <0 RK_PA5 1 &pcfg_pull_none>, > - <0 RK_PA6 1 &pcfg_pull_none>; > - }; > - }; > - > - pdm-0 { > - pdmm0_clk: pdmm0-clk { > - rockchip,pins = <2 RK_PC2 2 &pcfg_pull_none>; > - }; > - > - pdmm0_fsync: pdmm0-fsync { > - rockchip,pins = <2 RK_PC7 2 &pcfg_pull_none>; > - }; > - > - pdmm0_sdi0: pdmm0-sdi0 { > - rockchip,pins = <2 RK_PC3 2 &pcfg_pull_none>; > - }; > - > - pdmm0_sdi1: pdmm0-sdi1 { > - rockchip,pins = <2 RK_PC4 2 &pcfg_pull_none>; > - }; > - > - pdmm0_sdi2: pdmm0-sdi2 { > - rockchip,pins = <2 RK_PC5 2 &pcfg_pull_none>; > - }; > - > - pdmm0_sdi3: pdmm0-sdi3 { > - rockchip,pins = <2 RK_PC6 2 &pcfg_pull_none>; > - }; > - > - pdmm0_clk_sleep: pdmm0-clk-sleep { > - rockchip,pins = > - <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - > - pdmm0_sdi0_sleep: pdmm0-sdi0-sleep { > - rockchip,pins = > - <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - > - pdmm0_sdi1_sleep: pdmm0-sdi1-sleep { > - rockchip,pins = > - <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - > - pdmm0_sdi2_sleep: pdmm0-sdi2-sleep { > - rockchip,pins = > - <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - > - pdmm0_sdi3_sleep: pdmm0-sdi3-sleep { > - rockchip,pins = > - <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - > - pdmm0_fsync_sleep: pdmm0-fsync-sleep { > - rockchip,pins = > - <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - }; > - > - tsadc { > - otp_pin: otp-pin { > - rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - > - otp_out: otp-out { > - rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>; > - }; > - }; > - > - uart0 { > - uart0_xfer: uart0-xfer { > - rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>, > - <1 RK_PB0 1 &pcfg_pull_up>; > - }; > - > - uart0_cts: uart0-cts { > - rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none>; > - }; > - > - uart0_rts: uart0-rts { > - rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>; > - }; > - > - uart0_rts_pin: uart0-rts-pin { > - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - uart1 { > - uart1_xfer: uart1-xfer { > - rockchip,pins = <3 RK_PA4 4 &pcfg_pull_none>, > - <3 RK_PA6 4 &pcfg_pull_up>; > - }; > - > - uart1_cts: uart1-cts { > - rockchip,pins = <3 RK_PA7 4 &pcfg_pull_none>; > - }; > - > - uart1_rts: uart1-rts { > - rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>; > - }; > - > - uart1_rts_pin: uart1-rts-pin { > - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - uart2-0 { > - uart2m0_xfer: uart2m0-xfer { > - rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>, > - <1 RK_PA1 2 &pcfg_pull_up>; > - }; > - }; > - > - uart2-1 { > - uart2m1_xfer: uart2m1-xfer { > - rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>, > - <2 RK_PA1 1 &pcfg_pull_up>; > - }; > - }; > - > - spi0-0 { > - spi0m0_clk: spi0m0-clk { > - rockchip,pins = <2 RK_PB0 1 &pcfg_pull_up>; > - }; > - > - spi0m0_cs0: spi0m0-cs0 { > - rockchip,pins = <2 RK_PB3 1 &pcfg_pull_up>; > - }; > - > - spi0m0_tx: spi0m0-tx { > - rockchip,pins = <2 RK_PB1 1 &pcfg_pull_up>; > - }; > - > - spi0m0_rx: spi0m0-rx { > - rockchip,pins = <2 RK_PB2 1 &pcfg_pull_up>; > - }; > - > - spi0m0_cs1: spi0m0-cs1 { > - rockchip,pins = <2 RK_PB4 1 &pcfg_pull_up>; > - }; > - }; > - > - spi0-1 { > - spi0m1_clk: spi0m1-clk { > - rockchip,pins = <3 RK_PC7 2 &pcfg_pull_up>; > - }; > - > - spi0m1_cs0: spi0m1-cs0 { > - rockchip,pins = <3 RK_PD2 2 &pcfg_pull_up>; > - }; > - > - spi0m1_tx: spi0m1-tx { > - rockchip,pins = <3 RK_PD1 2 &pcfg_pull_up>; > - }; > - > - spi0m1_rx: spi0m1-rx { > - rockchip,pins = <3 RK_PD0 2 &pcfg_pull_up>; > - }; > - > - spi0m1_cs1: spi0m1-cs1 { > - rockchip,pins = <3 RK_PD3 2 &pcfg_pull_up>; > - }; > - }; > - > - spi0-2 { > - spi0m2_clk: spi0m2-clk { > - rockchip,pins = <3 RK_PA0 4 &pcfg_pull_up>; > - }; > - > - spi0m2_cs0: spi0m2-cs0 { > - rockchip,pins = <3 RK_PB0 3 &pcfg_pull_up>; > - }; > - > - spi0m2_tx: spi0m2-tx { > - rockchip,pins = <3 RK_PA1 4 &pcfg_pull_up>; > - }; > - > - spi0m2_rx: spi0m2-rx { > - rockchip,pins = <3 RK_PA2 4 &pcfg_pull_up>; > - }; > - }; > - > - i2s1 { > - i2s1_mclk: i2s1-mclk { > - rockchip,pins = <2 RK_PB7 1 &pcfg_pull_none>; > - }; > - > - i2s1_sclk: i2s1-sclk { > - rockchip,pins = <2 RK_PC2 1 &pcfg_pull_none>; > - }; > - > - i2s1_lrckrx: i2s1-lrckrx { > - rockchip,pins = <2 RK_PC0 1 &pcfg_pull_none>; > - }; > - > - i2s1_lrcktx: i2s1-lrcktx { > - rockchip,pins = <2 RK_PC1 1 &pcfg_pull_none>; > - }; > - > - i2s1_sdi: i2s1-sdi { > - rockchip,pins = <2 RK_PC3 1 &pcfg_pull_none>; > - }; > - > - i2s1_sdo: i2s1-sdo { > - rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>; > - }; > - > - i2s1_sdio1: i2s1-sdio1 { > - rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>; > - }; > - > - i2s1_sdio2: i2s1-sdio2 { > - rockchip,pins = <2 RK_PC5 1 &pcfg_pull_none>; > - }; > - > - i2s1_sdio3: i2s1-sdio3 { > - rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>; > - }; > - > - i2s1_sleep: i2s1-sleep { > - rockchip,pins = > - <2 RK_PB7 RK_FUNC_GPIO &pcfg_input_high>, > - <2 RK_PC0 RK_FUNC_GPIO &pcfg_input_high>, > - <2 RK_PC1 RK_FUNC_GPIO &pcfg_input_high>, > - <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>, > - <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>, > - <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>, > - <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, > - <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>, > - <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - }; > - > - i2s2-0 { > - i2s2m0_mclk: i2s2m0-mclk { > - rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>; > - }; > - > - i2s2m0_sclk: i2s2m0-sclk { > - rockchip,pins = <1 RK_PC6 1 &pcfg_pull_none>; > - }; > - > - i2s2m0_lrckrx: i2s2m0-lrckrx { > - rockchip,pins = <1 RK_PD2 1 &pcfg_pull_none>; > - }; > - > - i2s2m0_lrcktx: i2s2m0-lrcktx { > - rockchip,pins = <1 RK_PC7 1 &pcfg_pull_none>; > - }; > - > - i2s2m0_sdi: i2s2m0-sdi { > - rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>; > - }; > - > - i2s2m0_sdo: i2s2m0-sdo { > - rockchip,pins = <1 RK_PD1 1 &pcfg_pull_none>; > - }; > - > - i2s2m0_sleep: i2s2m0-sleep { > - rockchip,pins = > - <1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, > - <1 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>, > - <1 RK_PD2 RK_FUNC_GPIO &pcfg_input_high>, > - <1 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>, > - <1 RK_PD0 RK_FUNC_GPIO &pcfg_input_high>, > - <1 RK_PD1 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - }; > - > - i2s2-1 { > - i2s2m1_mclk: i2s2m1-mclk { > - rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>; > - }; > - > - i2s2m1_sclk: i2s2m1-sclk { > - rockchip,pins = <3 RK_PA0 6 &pcfg_pull_none>; > - }; > - > - i2s2m1_lrckrx: i2sm1-lrckrx { > - rockchip,pins = <3 RK_PB0 6 &pcfg_pull_none>; > - }; > - > - i2s2m1_lrcktx: i2s2m1-lrcktx { > - rockchip,pins = <3 RK_PB0 4 &pcfg_pull_none>; > - }; > - > - i2s2m1_sdi: i2s2m1-sdi { > - rockchip,pins = <3 RK_PA2 6 &pcfg_pull_none>; > - }; > - > - i2s2m1_sdo: i2s2m1-sdo { > - rockchip,pins = <3 RK_PA1 6 &pcfg_pull_none>; > - }; > - > - i2s2m1_sleep: i2s2m1-sleep { > - rockchip,pins = > - <1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, > - <3 RK_PA0 RK_FUNC_GPIO &pcfg_input_high>, > - <3 RK_PB0 RK_FUNC_GPIO &pcfg_input_high>, > - <3 RK_PA2 RK_FUNC_GPIO &pcfg_input_high>, > - <3 RK_PA1 RK_FUNC_GPIO &pcfg_input_high>; > - }; > - }; > - > - spdif-0 { > - spdifm0_tx: spdifm0-tx { > - rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>; > - }; > - }; > - > - spdif-1 { > - spdifm1_tx: spdifm1-tx { > - rockchip,pins = <2 RK_PC1 2 &pcfg_pull_none>; > - }; > - }; > - > - spdif-2 { > - spdifm2_tx: spdifm2-tx { > - rockchip,pins = <0 RK_PA2 2 &pcfg_pull_none>; > - }; > - }; > - > - sdmmc0-0 { > - sdmmc0m0_pwren: sdmmc0m0-pwren { > - rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0m0_pin: sdmmc0m0-pin { > - rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>; > - }; > - }; > - > - sdmmc0-1 { > - sdmmc0m1_pwren: sdmmc0m1-pwren { > - rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0m1_pin: sdmmc0m1-pin { > - rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>; > - }; > - }; > - > - sdmmc0 { > - sdmmc0_clk: sdmmc0-clk { > - rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>; > - }; > - > - sdmmc0_cmd: sdmmc0-cmd { > - rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc0_dectn: sdmmc0-dectn { > - rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0_wrprt: sdmmc0-wrprt { > - rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0_bus1: sdmmc0-bus1 { > - rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc0_bus4: sdmmc0-bus4 { > - rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>, > - <1 RK_PA1 1 &pcfg_pull_up_8ma>, > - <1 RK_PA2 1 &pcfg_pull_up_8ma>, > - <1 RK_PA3 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc0_pins: sdmmc0-pins { > - rockchip,pins = > - <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>; > - }; > - }; > - > - sdmmc0ext { > - sdmmc0ext_clk: sdmmc0ext-clk { > - rockchip,pins = <3 RK_PA2 3 &pcfg_pull_none_4ma>; > - }; > - > - sdmmc0ext_cmd: sdmmc0ext-cmd { > - rockchip,pins = <3 RK_PA0 3 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0ext_wrprt: sdmmc0ext-wrprt { > - rockchip,pins = <3 RK_PA3 3 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0ext_dectn: sdmmc0ext-dectn { > - rockchip,pins = <3 RK_PA1 3 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0ext_bus1: sdmmc0ext-bus1 { > - rockchip,pins = <3 RK_PA4 3 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0ext_bus4: sdmmc0ext-bus4 { > - rockchip,pins = > - <3 RK_PA4 3 &pcfg_pull_up_4ma>, > - <3 RK_PA5 3 &pcfg_pull_up_4ma>, > - <3 RK_PA6 3 &pcfg_pull_up_4ma>, > - <3 RK_PA7 3 &pcfg_pull_up_4ma>; > - }; > - > - sdmmc0ext_pins: sdmmc0ext-pins { > - rockchip,pins = > - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>; > - }; > - }; > - > - sdmmc1 { > - sdmmc1_clk: sdmmc1-clk { > - rockchip,pins = <1 RK_PB4 1 &pcfg_pull_none_8ma>; > - }; > - > - sdmmc1_cmd: sdmmc1-cmd { > - rockchip,pins = <1 RK_PB5 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc1_pwren: sdmmc1-pwren { > - rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc1_wrprt: sdmmc1-wrprt { > - rockchip,pins = <1 RK_PC4 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc1_dectn: sdmmc1-dectn { > - rockchip,pins = <1 RK_PC3 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc1_bus1: sdmmc1-bus1 { > - rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc1_bus4: sdmmc1-bus4 { > - rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>, > - <1 RK_PB7 1 &pcfg_pull_up_8ma>, > - <1 RK_PC0 1 &pcfg_pull_up_8ma>, > - <1 RK_PC1 1 &pcfg_pull_up_8ma>; > - }; > - > - sdmmc1_pins: sdmmc1-pins { > - rockchip,pins = > - <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, > - <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>; > - }; > - }; > - > - emmc { > - emmc_clk: emmc-clk { > - rockchip,pins = <3 RK_PC5 2 &pcfg_pull_none_12ma>; > - }; > - > - emmc_cmd: emmc-cmd { > - rockchip,pins = <3 RK_PC3 2 &pcfg_pull_up_12ma>; > - }; > - > - emmc_pwren: emmc-pwren { > - rockchip,pins = <3 RK_PC6 2 &pcfg_pull_none>; > - }; > - > - emmc_rstnout: emmc-rstnout { > - rockchip,pins = <3 RK_PC4 2 &pcfg_pull_none>; > - }; > - > - emmc_bus1: emmc-bus1 { > - rockchip,pins = <0 RK_PA7 2 &pcfg_pull_up_12ma>; > - }; > - > - emmc_bus4: emmc-bus4 { > - rockchip,pins = > - <0 RK_PA7 2 &pcfg_pull_up_12ma>, > - <2 RK_PD4 2 &pcfg_pull_up_12ma>, > - <2 RK_PD5 2 &pcfg_pull_up_12ma>, > - <2 RK_PD6 2 &pcfg_pull_up_12ma>; > - }; > - > - emmc_bus8: emmc-bus8 { > - rockchip,pins = > - <0 RK_PA7 2 &pcfg_pull_up_12ma>, > - <2 RK_PD4 2 &pcfg_pull_up_12ma>, > - <2 RK_PD5 2 &pcfg_pull_up_12ma>, > - <2 RK_PD6 2 &pcfg_pull_up_12ma>, > - <2 RK_PD7 2 &pcfg_pull_up_12ma>, > - <3 RK_PC0 2 &pcfg_pull_up_12ma>, > - <3 RK_PC1 2 &pcfg_pull_up_12ma>, > - <3 RK_PC2 2 &pcfg_pull_up_12ma>; > - }; > - }; > - > - pwm0 { > - pwm0_pin: pwm0-pin { > - rockchip,pins = <2 RK_PA4 1 &pcfg_pull_none>; > - }; > - }; > - > - pwm1 { > - pwm1_pin: pwm1-pin { > - rockchip,pins = <2 RK_PA5 1 &pcfg_pull_none>; > - }; > - }; > - > - pwm2 { > - pwm2_pin: pwm2-pin { > - rockchip,pins = <2 RK_PA6 1 &pcfg_pull_none>; > - }; > - }; > - > - pwmir { > - pwmir_pin: pwmir-pin { > - rockchip,pins = <2 RK_PA2 1 &pcfg_pull_none>; > - }; > - }; > - > - gmac-1 { > - rgmiim1_pins: rgmiim1-pins { > - rockchip,pins = > - /* mac_txclk */ > - <1 RK_PB4 2 &pcfg_pull_none_8ma>, > - /* mac_rxclk */ > - <1 RK_PB5 2 &pcfg_pull_none_4ma>, > - /* mac_mdio */ > - <1 RK_PC3 2 &pcfg_pull_none_4ma>, > - /* mac_txen */ > - <1 RK_PD1 2 &pcfg_pull_none_8ma>, > - /* mac_clk */ > - <1 RK_PC5 2 &pcfg_pull_none_4ma>, > - /* mac_rxdv */ > - <1 RK_PC6 2 &pcfg_pull_none_4ma>, > - /* mac_mdc */ > - <1 RK_PC7 2 &pcfg_pull_none_4ma>, > - /* mac_rxd1 */ > - <1 RK_PB2 2 &pcfg_pull_none_4ma>, > - /* mac_rxd0 */ > - <1 RK_PB3 2 &pcfg_pull_none_4ma>, > - /* mac_txd1 */ > - <1 RK_PB0 2 &pcfg_pull_none_8ma>, > - /* mac_txd0 */ > - <1 RK_PB1 2 &pcfg_pull_none_8ma>, > - /* mac_rxd3 */ > - <1 RK_PB6 2 &pcfg_pull_none_4ma>, > - /* mac_rxd2 */ > - <1 RK_PB7 2 &pcfg_pull_none_4ma>, > - /* mac_txd3 */ > - <1 RK_PC0 2 &pcfg_pull_none_8ma>, > - /* mac_txd2 */ > - <1 RK_PC1 2 &pcfg_pull_none_8ma>, > - > - /* mac_txclk */ > - <0 RK_PB0 1 &pcfg_pull_none_8ma>, > - /* mac_txen */ > - <0 RK_PB4 1 &pcfg_pull_none_8ma>, > - /* mac_clk */ > - <0 RK_PD0 1 &pcfg_pull_none_4ma>, > - /* mac_txd1 */ > - <0 RK_PC0 1 &pcfg_pull_none_8ma>, > - /* mac_txd0 */ > - <0 RK_PC1 1 &pcfg_pull_none_8ma>, > - /* mac_txd3 */ > - <0 RK_PC7 1 &pcfg_pull_none_8ma>, > - /* mac_txd2 */ > - <0 RK_PC6 1 &pcfg_pull_none_8ma>; > - }; > - > - rmiim1_pins: rmiim1-pins { > - rockchip,pins = > - /* mac_mdio */ > - <1 RK_PC3 2 &pcfg_pull_none_2ma>, > - /* mac_txen */ > - <1 RK_PD1 2 &pcfg_pull_none_12ma>, > - /* mac_clk */ > - <1 RK_PC5 2 &pcfg_pull_none_2ma>, > - /* mac_rxer */ > - <1 RK_PD0 2 &pcfg_pull_none_2ma>, > - /* mac_rxdv */ > - <1 RK_PC6 2 &pcfg_pull_none_2ma>, > - /* mac_mdc */ > - <1 RK_PC7 2 &pcfg_pull_none_2ma>, > - /* mac_rxd1 */ > - <1 RK_PB2 2 &pcfg_pull_none_2ma>, > - /* mac_rxd0 */ > - <1 RK_PB3 2 &pcfg_pull_none_2ma>, > - /* mac_txd1 */ > - <1 RK_PB0 2 &pcfg_pull_none_12ma>, > - /* mac_txd0 */ > - <1 RK_PB1 2 &pcfg_pull_none_12ma>, > - > - /* mac_mdio */ > - <0 RK_PB3 1 &pcfg_pull_none>, > - /* mac_txen */ > - <0 RK_PB4 1 &pcfg_pull_none>, > - /* mac_clk */ > - <0 RK_PD0 1 &pcfg_pull_none>, > - /* mac_mdc */ > - <0 RK_PC3 1 &pcfg_pull_none>, > - /* mac_txd1 */ > - <0 RK_PC0 1 &pcfg_pull_none>, > - /* mac_txd0 */ > - <0 RK_PC1 1 &pcfg_pull_none>; > - }; > - }; > - > - gmac2phy { > - fephyled_speed10: fephyled-speed10 { > - rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>; > - }; > - > - fephyled_duplex: fephyled-duplex { > - rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>; > - }; > - > - fephyled_rxm1: fephyled-rxm1 { > - rockchip,pins = <2 RK_PD1 2 &pcfg_pull_none>; > - }; > - > - fephyled_txm1: fephyled-txm1 { > - rockchip,pins = <2 RK_PD1 3 &pcfg_pull_none>; > - }; > - > - fephyled_linkm1: fephyled-linkm1 { > - rockchip,pins = <2 RK_PD0 2 &pcfg_pull_none>; > - }; > - }; > - > - tsadc_pin { > - tsadc_int: tsadc-int { > - rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>; > - }; > - tsadc_pin: tsadc-pin { > - rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; > - }; > - }; > - > - hdmi_pin { > - hdmi_cec: hdmi-cec { > - rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>; > - }; > - > - hdmi_hpd: hdmi-hpd { > - rockchip,pins = <0 RK_PA4 1 &pcfg_pull_down>; > - }; > - }; > - > - cif-0 { > - dvp_d2d9_m0:dvp-d2d9-m0 { > - rockchip,pins = > - /* cif_d0 */ > - <3 RK_PA4 2 &pcfg_pull_none>, > - /* cif_d1 */ > - <3 RK_PA5 2 &pcfg_pull_none>, > - /* cif_d2 */ > - <3 RK_PA6 2 &pcfg_pull_none>, > - /* cif_d3 */ > - <3 RK_PA7 2 &pcfg_pull_none>, > - /* cif_d4 */ > - <3 RK_PB0 2 &pcfg_pull_none>, > - /* cif_d5m0 */ > - <3 RK_PB1 2 &pcfg_pull_none>, > - /* cif_d6m0 */ > - <3 RK_PB2 2 &pcfg_pull_none>, > - /* cif_d7m0 */ > - <3 RK_PB3 2 &pcfg_pull_none>, > - /* cif_href */ > - <3 RK_PA1 2 &pcfg_pull_none>, > - /* cif_vsync */ > - <3 RK_PA0 2 &pcfg_pull_none>, > - /* cif_clkoutm0 */ > - <3 RK_PA3 2 &pcfg_pull_none>, > - /* cif_clkin */ > - <3 RK_PA2 2 &pcfg_pull_none>; > - }; > - }; > - > - cif-1 { > - dvp_d2d9_m1:dvp-d2d9-m1 { > - rockchip,pins = > - /* cif_d0 */ > - <3 RK_PA4 2 &pcfg_pull_none>, > - /* cif_d1 */ > - <3 RK_PA5 2 &pcfg_pull_none>, > - /* cif_d2 */ > - <3 RK_PA6 2 &pcfg_pull_none>, > - /* cif_d3 */ > - <3 RK_PA7 2 &pcfg_pull_none>, > - /* cif_d4 */ > - <3 RK_PB0 2 &pcfg_pull_none>, > - /* cif_d5m1 */ > - <2 RK_PC0 4 &pcfg_pull_none>, > - /* cif_d6m1 */ > - <2 RK_PC1 4 &pcfg_pull_none>, > - /* cif_d7m1 */ > - <2 RK_PC2 4 &pcfg_pull_none>, > - /* cif_href */ > - <3 RK_PA1 2 &pcfg_pull_none>, > - /* cif_vsync */ > - <3 RK_PA0 2 &pcfg_pull_none>, > - /* cif_clkoutm1 */ > - <2 RK_PB7 4 &pcfg_pull_none>, > - /* cif_clkin */ > - <3 RK_PA2 2 &pcfg_pull_none>; > - }; > - }; > - }; > -}; > diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h > deleted file mode 100644 > index 555b4ff660ae..000000000000 > --- a/include/dt-bindings/clock/rk3328-cru.h > +++ /dev/null > @@ -1,393 +0,0 @@ > -/* SPDX-License-Identifier: GPL-2.0-or-later */ > -/* > - * Copyright (c) 2016 Rockchip Electronics Co. Ltd. > - * Author: Elaine <zhangqing@rock-chips.com> > - */ > - > -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H > -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H > - > -/* core clocks */ > -#define PLL_APLL 1 > -#define PLL_DPLL 2 > -#define PLL_CPLL 3 > -#define PLL_GPLL 4 > -#define PLL_NPLL 5 > -#define ARMCLK 6 > - > -/* sclk gates (special clocks) */ > -#define SCLK_RTC32K 30 > -#define SCLK_SDMMC_EXT 31 > -#define SCLK_SPI 32 > -#define SCLK_SDMMC 33 > -#define SCLK_SDIO 34 > -#define SCLK_EMMC 35 > -#define SCLK_TSADC 36 > -#define SCLK_SARADC 37 > -#define SCLK_UART0 38 > -#define SCLK_UART1 39 > -#define SCLK_UART2 40 > -#define SCLK_I2S0 41 > -#define SCLK_I2S1 42 > -#define SCLK_I2S2 43 > -#define SCLK_I2S1_OUT 44 > -#define SCLK_I2S2_OUT 45 > -#define SCLK_SPDIF 46 > -#define SCLK_TIMER0 47 > -#define SCLK_TIMER1 48 > -#define SCLK_TIMER2 49 > -#define SCLK_TIMER3 50 > -#define SCLK_TIMER4 51 > -#define SCLK_TIMER5 52 > -#define SCLK_WIFI 53 > -#define SCLK_CIF_OUT 54 > -#define SCLK_I2C0 55 > -#define SCLK_I2C1 56 > -#define SCLK_I2C2 57 > -#define SCLK_I2C3 58 > -#define SCLK_CRYPTO 59 > -#define SCLK_PWM 60 > -#define SCLK_PDM 61 > -#define SCLK_EFUSE 62 > -#define SCLK_OTP 63 > -#define SCLK_DDRCLK 64 > -#define SCLK_VDEC_CABAC 65 > -#define SCLK_VDEC_CORE 66 > -#define SCLK_VENC_DSP 67 > -#define SCLK_VENC_CORE 68 > -#define SCLK_RGA 69 > -#define SCLK_HDMI_SFC 70 > -#define SCLK_HDMI_CEC 71 > -#define SCLK_USB3_REF 72 > -#define SCLK_USB3_SUSPEND 73 > -#define SCLK_SDMMC_DRV 74 > -#define SCLK_SDIO_DRV 75 > -#define SCLK_EMMC_DRV 76 > -#define SCLK_SDMMC_EXT_DRV 77 > -#define SCLK_SDMMC_SAMPLE 78 > -#define SCLK_SDIO_SAMPLE 79 > -#define SCLK_EMMC_SAMPLE 80 > -#define SCLK_SDMMC_EXT_SAMPLE 81 > -#define SCLK_VOP 82 > -#define SCLK_MAC2PHY_RXTX 83 > -#define SCLK_MAC2PHY_SRC 84 > -#define SCLK_MAC2PHY_REF 85 > -#define SCLK_MAC2PHY_OUT 86 > -#define SCLK_MAC2IO_RX 87 > -#define SCLK_MAC2IO_TX 88 > -#define SCLK_MAC2IO_REFOUT 89 > -#define SCLK_MAC2IO_REF 90 > -#define SCLK_MAC2IO_OUT 91 > -#define SCLK_TSP 92 > -#define SCLK_HSADC_TSP 93 > -#define SCLK_USB3PHY_REF 94 > -#define SCLK_REF_USB3OTG 95 > -#define SCLK_USB3OTG_REF 96 > -#define SCLK_USB3OTG_SUSPEND 97 > -#define SCLK_REF_USB3OTG_SRC 98 > -#define SCLK_MAC2IO_SRC 99 > -#define SCLK_MAC2IO 100 > -#define SCLK_MAC2PHY 101 > -#define SCLK_MAC2IO_EXT 102 > - > -/* dclk gates */ > -#define DCLK_LCDC 120 > -#define DCLK_HDMIPHY 121 > -#define HDMIPHY 122 > -#define USB480M 123 > -#define DCLK_LCDC_SRC 124 > - > -/* aclk gates */ > -#define ACLK_AXISRAM 130 > -#define ACLK_VOP_PRE 131 > -#define ACLK_USB3OTG 132 > -#define ACLK_RGA_PRE 133 > -#define ACLK_DMAC 134 > -#define ACLK_GPU 135 > -#define ACLK_BUS_PRE 136 > -#define ACLK_PERI_PRE 137 > -#define ACLK_RKVDEC_PRE 138 > -#define ACLK_RKVDEC 139 > -#define ACLK_RKVENC 140 > -#define ACLK_VPU_PRE 141 > -#define ACLK_VIO_PRE 142 > -#define ACLK_VPU 143 > -#define ACLK_VIO 144 > -#define ACLK_VOP 145 > -#define ACLK_GMAC 146 > -#define ACLK_H265 147 > -#define ACLK_H264 148 > -#define ACLK_MAC2PHY 149 > -#define ACLK_MAC2IO 150 > -#define ACLK_DCF 151 > -#define ACLK_TSP 152 > -#define ACLK_PERI 153 > -#define ACLK_RGA 154 > -#define ACLK_IEP 155 > -#define ACLK_CIF 156 > -#define ACLK_HDCP 157 > - > -/* pclk gates */ > -#define PCLK_GPIO0 200 > -#define PCLK_GPIO1 201 > -#define PCLK_GPIO2 202 > -#define PCLK_GPIO3 203 > -#define PCLK_GRF 204 > -#define PCLK_I2C0 205 > -#define PCLK_I2C1 206 > -#define PCLK_I2C2 207 > -#define PCLK_I2C3 208 > -#define PCLK_SPI 209 > -#define PCLK_UART0 210 > -#define PCLK_UART1 211 > -#define PCLK_UART2 212 > -#define PCLK_TSADC 213 > -#define PCLK_PWM 214 > -#define PCLK_TIMER 215 > -#define PCLK_BUS_PRE 216 > -#define PCLK_PERI_PRE 217 > -#define PCLK_HDMI_CTRL 218 > -#define PCLK_HDMI_PHY 219 > -#define PCLK_GMAC 220 > -#define PCLK_H265 221 > -#define PCLK_MAC2PHY 222 > -#define PCLK_MAC2IO 223 > -#define PCLK_USB3PHY_OTG 224 > -#define PCLK_USB3PHY_PIPE 225 > -#define PCLK_USB3_GRF 226 > -#define PCLK_USB2_GRF 227 > -#define PCLK_HDMIPHY 228 > -#define PCLK_DDR 229 > -#define PCLK_PERI 230 > -#define PCLK_HDMI 231 > -#define PCLK_HDCP 232 > -#define PCLK_DCF 233 > -#define PCLK_SARADC 234 > -#define PCLK_ACODECPHY 235 > -#define PCLK_WDT 236 > - > -/* hclk gates */ > -#define HCLK_PERI 308 > -#define HCLK_TSP 309 > -#define HCLK_GMAC 310 > -#define HCLK_I2S0_8CH 311 > -#define HCLK_I2S1_8CH 312 > -#define HCLK_I2S2_2CH 313 > -#define HCLK_SPDIF_8CH 314 > -#define HCLK_VOP 315 > -#define HCLK_NANDC 316 > -#define HCLK_SDMMC 317 > -#define HCLK_SDIO 318 > -#define HCLK_EMMC 319 > -#define HCLK_SDMMC_EXT 320 > -#define HCLK_RKVDEC_PRE 321 > -#define HCLK_RKVDEC 322 > -#define HCLK_RKVENC 323 > -#define HCLK_VPU_PRE 324 > -#define HCLK_VIO_PRE 325 > -#define HCLK_VPU 326 > -#define HCLK_BUS_PRE 328 > -#define HCLK_PERI_PRE 329 > -#define HCLK_H264 330 > -#define HCLK_CIF 331 > -#define HCLK_OTG_PMU 332 > -#define HCLK_OTG 333 > -#define HCLK_HOST0 334 > -#define HCLK_HOST0_ARB 335 > -#define HCLK_CRYPTO_MST 336 > -#define HCLK_CRYPTO_SLV 337 > -#define HCLK_PDM 338 > -#define HCLK_IEP 339 > -#define HCLK_RGA 340 > -#define HCLK_HDCP 341 > - > -#define CLK_NR_CLKS (HCLK_HDCP + 1) > - > -/* soft-reset indices */ > -#define SRST_CORE0_PO 0 > -#define SRST_CORE1_PO 1 > -#define SRST_CORE2_PO 2 > -#define SRST_CORE3_PO 3 > -#define SRST_CORE0 4 > -#define SRST_CORE1 5 > -#define SRST_CORE2 6 > -#define SRST_CORE3 7 > -#define SRST_CORE0_DBG 8 > -#define SRST_CORE1_DBG 9 > -#define SRST_CORE2_DBG 10 > -#define SRST_CORE3_DBG 11 > -#define SRST_TOPDBG 12 > -#define SRST_CORE_NIU 13 > -#define SRST_STRC_A 14 > -#define SRST_L2C 15 > - > -#define SRST_A53_GIC 18 > -#define SRST_DAP 19 > -#define SRST_PMU_P 21 > -#define SRST_EFUSE 22 > -#define SRST_BUSSYS_H 23 > -#define SRST_BUSSYS_P 24 > -#define SRST_SPDIF 25 > -#define SRST_INTMEM 26 > -#define SRST_ROM 27 > -#define SRST_GPIO0 28 > -#define SRST_GPIO1 29 > -#define SRST_GPIO2 30 > -#define SRST_GPIO3 31 > - > -#define SRST_I2S0 32 > -#define SRST_I2S1 33 > -#define SRST_I2S2 34 > -#define SRST_I2S0_H 35 > -#define SRST_I2S1_H 36 > -#define SRST_I2S2_H 37 > -#define SRST_UART0 38 > -#define SRST_UART1 39 > -#define SRST_UART2 40 > -#define SRST_UART0_P 41 > -#define SRST_UART1_P 42 > -#define SRST_UART2_P 43 > -#define SRST_I2C0 44 > -#define SRST_I2C1 45 > -#define SRST_I2C2 46 > -#define SRST_I2C3 47 > - > -#define SRST_I2C0_P 48 > -#define SRST_I2C1_P 49 > -#define SRST_I2C2_P 50 > -#define SRST_I2C3_P 51 > -#define SRST_EFUSE_SE_P 52 > -#define SRST_EFUSE_NS_P 53 > -#define SRST_PWM0 54 > -#define SRST_PWM0_P 55 > -#define SRST_DMA 56 > -#define SRST_TSP_A 57 > -#define SRST_TSP_H 58 > -#define SRST_TSP 59 > -#define SRST_TSP_HSADC 60 > -#define SRST_DCF_A 61 > -#define SRST_DCF_P 62 > - > -#define SRST_SCR 64 > -#define SRST_SPI 65 > -#define SRST_TSADC 66 > -#define SRST_TSADC_P 67 > -#define SRST_CRYPTO 68 > -#define SRST_SGRF 69 > -#define SRST_GRF 70 > -#define SRST_USB_GRF 71 > -#define SRST_TIMER_6CH_P 72 > -#define SRST_TIMER0 73 > -#define SRST_TIMER1 74 > -#define SRST_TIMER2 75 > -#define SRST_TIMER3 76 > -#define SRST_TIMER4 77 > -#define SRST_TIMER5 78 > -#define SRST_USB3GRF 79 > - > -#define SRST_PHYNIU 80 > -#define SRST_HDMIPHY 81 > -#define SRST_VDAC 82 > -#define SRST_ACODEC_p 83 > -#define SRST_SARADC 85 > -#define SRST_SARADC_P 86 > -#define SRST_GRF_DDR 87 > -#define SRST_DFIMON 88 > -#define SRST_MSCH 89 > -#define SRST_DDRMSCH 91 > -#define SRST_DDRCTRL 92 > -#define SRST_DDRCTRL_P 93 > -#define SRST_DDRPHY 94 > -#define SRST_DDRPHY_P 95 > - > -#define SRST_GMAC_NIU_A 96 > -#define SRST_GMAC_NIU_P 97 > -#define SRST_GMAC2PHY_A 98 > -#define SRST_GMAC2IO_A 99 > -#define SRST_MACPHY 100 > -#define SRST_OTP_PHY 101 > -#define SRST_GPU_A 102 > -#define SRST_GPU_NIU_A 103 > -#define SRST_SDMMCEXT 104 > -#define SRST_PERIPH_NIU_A 105 > -#define SRST_PERIHP_NIU_H 106 > -#define SRST_PERIHP_P 107 > -#define SRST_PERIPHSYS_H 108 > -#define SRST_MMC0 109 > -#define SRST_SDIO 110 > -#define SRST_EMMC 111 > - > -#define SRST_USB2OTG_H 112 > -#define SRST_USB2OTG 113 > -#define SRST_USB2OTG_ADP 114 > -#define SRST_USB2HOST_H 115 > -#define SRST_USB2HOST_ARB 116 > -#define SRST_USB2HOST_AUX 117 > -#define SRST_USB2HOST_EHCIPHY 118 > -#define SRST_USB2HOST_UTMI 119 > -#define SRST_USB3OTG 120 > -#define SRST_USBPOR 121 > -#define SRST_USB2OTG_UTMI 122 > -#define SRST_USB2HOST_PHY_UTMI 123 > -#define SRST_USB3OTG_UTMI 124 > -#define SRST_USB3PHY_U2 125 > -#define SRST_USB3PHY_U3 126 > -#define SRST_USB3PHY_PIPE 127 > - > -#define SRST_VIO_A 128 > -#define SRST_VIO_BUS_H 129 > -#define SRST_VIO_H2P_H 130 > -#define SRST_VIO_ARBI_H 131 > -#define SRST_VOP_NIU_A 132 > -#define SRST_VOP_A 133 > -#define SRST_VOP_H 134 > -#define SRST_VOP_D 135 > -#define SRST_RGA 136 > -#define SRST_RGA_NIU_A 137 > -#define SRST_RGA_A 138 > -#define SRST_RGA_H 139 > -#define SRST_IEP_A 140 > -#define SRST_IEP_H 141 > -#define SRST_HDMI 142 > -#define SRST_HDMI_P 143 > - > -#define SRST_HDCP_A 144 > -#define SRST_HDCP 145 > -#define SRST_HDCP_H 146 > -#define SRST_CIF_A 147 > -#define SRST_CIF_H 148 > -#define SRST_CIF_P 149 > -#define SRST_OTP_P 150 > -#define SRST_OTP_SBPI 151 > -#define SRST_OTP_USER 152 > -#define SRST_DDRCTRL_A 153 > -#define SRST_DDRSTDY_P 154 > -#define SRST_DDRSTDY 155 > -#define SRST_PDM_H 156 > -#define SRST_PDM 157 > -#define SRST_USB3PHY_OTG_P 158 > -#define SRST_USB3PHY_PIPE_P 159 > - > -#define SRST_VCODEC_A 160 > -#define SRST_VCODEC_NIU_A 161 > -#define SRST_VCODEC_H 162 > -#define SRST_VCODEC_NIU_H 163 > -#define SRST_VDEC_A 164 > -#define SRST_VDEC_NIU_A 165 > -#define SRST_VDEC_H 166 > -#define SRST_VDEC_NIU_H 167 > -#define SRST_VDEC_CORE 168 > -#define SRST_VDEC_CABAC 169 > -#define SRST_DDRPHYDIV 175 > - > -#define SRST_RKVENC_NIU_A 176 > -#define SRST_RKVENC_NIU_H 177 > -#define SRST_RKVENC_H265_A 178 > -#define SRST_RKVENC_H265_P 179 > -#define SRST_RKVENC_H265_CORE 180 > -#define SRST_RKVENC_H265_DSP 181 > -#define SRST_RKVENC_H264_A 182 > -#define SRST_RKVENC_H264_H 183 > -#define SRST_RKVENC_INTMEM 184 > - > -#endif > diff --git a/include/dt-bindings/power/rk3328-power.h b/include/dt-bindings/power/rk3328-power.h > deleted file mode 100644 > index 02e3d7fc1cce..000000000000 > --- a/include/dt-bindings/power/rk3328-power.h > +++ /dev/null > @@ -1,19 +0,0 @@ > -/* SPDX-License-Identifier: GPL-2.0 */ > -#ifndef __DT_BINDINGS_POWER_RK3328_POWER_H__ > -#define __DT_BINDINGS_POWER_RK3328_POWER_H__ > - > -/** > - * RK3328 idle id Summary. > - */ > -#define RK3328_PD_CORE 0 > -#define RK3328_PD_GPU 1 > -#define RK3328_PD_BUS 2 > -#define RK3328_PD_MSCH 3 > -#define RK3328_PD_PERI 4 > -#define RK3328_PD_VIDEO 5 > -#define RK3328_PD_HEVC 6 > -#define RK3328_PD_SYS 7 > -#define RK3328_PD_VPU 8 > -#define RK3328_PD_VIO 9 > - > -#endif

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts deleted file mode 100644 index 1eef5504445f..000000000000 --- a/arch/arm/dts/rk3328-evb.dts +++ /dev/null @@ -1,289 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd - */ - -/dts-v1/; -#include "rk3328.dtsi" - -/ { - model = "Rockchip RK3328 EVB"; - compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2phy; - mmc0 = &sdmmc; - mmc1 = &sdio; - mmc2 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - sdio_pwrseq: sdio-pwrseq { - compatible = "mmc-pwrseq-simple"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; - - /* - * On the module itself this is one of these (depending - * on the actual card populated): - * - SDIO_RESET_L_WL_REG_ON - * - PDN (power down when low) - */ - reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0m1_pin>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc_phy: vcc-phy-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_phy"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - status = "okay"; -}; - -&gmac2phy { - phy-supply = <&vcc_phy>; - clock_in_out = "output"; - assigned-clock-rate = <50000000>; - assigned-clocks = <&cru SCLK_MAC2PHY>; - assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio2>; - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_io>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&pinctrl { - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sdio-pwrseq { - wifi_enable_h: wifi-enable-h { - rockchip,pins = - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdio { - bus-width = <4>; - cap-sd-highspeed; - cap-sdio-irq; - keep-power-in-suspend; - max-frequency = <150000000>; - mmc-pwrseq = <&sdio_pwrseq>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&usb20_otg { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts b/arch/arm/dts/rk3328-nanopi-r2c-plus.dts deleted file mode 100644 index 16a1958e4572..000000000000 --- a/arch/arm/dts/rk3328-nanopi-r2c-plus.dts +++ /dev/null @@ -1,33 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com> - */ - -/dts-v1/; -#include "rk3328-nanopi-r2c.dts" - -/ { - model = "FriendlyElec NanoPi R2C Plus"; - compatible = "friendlyarm,nanopi-r2c-plus", "rockchip,rk3328"; - - aliases { - mmc1 = &emmc; - }; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - vmmc-supply = <&vcc_io_33>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-nanopi-r2c.dts b/arch/arm/dts/rk3328-nanopi-r2c.dts deleted file mode 100644 index a07a26b944a0..000000000000 --- a/arch/arm/dts/rk3328-nanopi-r2c.dts +++ /dev/null @@ -1,40 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. - * (http://www.friendlyarm.com) - * - * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com> - */ - -/dts-v1/; -#include "rk3328-nanopi-r2s.dts" - -/ { - model = "FriendlyElec NanoPi R2C"; - compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; -}; - -&gmac2io { - phy-handle = <&yt8521s>; - tx_delay = <0x22>; - rx_delay = <0x12>; - - mdio { - /delete-node/ ethernet-phy@1; - - yt8521s: ethernet-phy@3 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <3>; - - motorcomm,clk-out-frequency-hz = <125000000>; - motorcomm,keep-pll-enabled; - motorcomm,auto-sleep-disabled; - - pinctrl-0 = <&eth_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts b/arch/arm/dts/rk3328-nanopi-r2s.dts deleted file mode 100644 index a4399da7d8b1..000000000000 --- a/arch/arm/dts/rk3328-nanopi-r2s.dts +++ /dev/null @@ -1,410 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2020 David Bauer <mail@david-bauer.net> - */ - -/dts-v1/; - -#include <dt-bindings/input/input.h> -#include <dt-bindings/gpio/gpio.h> -#include "rk3328.dtsi" - -/ { - model = "FriendlyElec NanoPi R2S"; - compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - ethernet1 = &rtl8153; - mmc0 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clk: gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - keys { - compatible = "gpio-keys"; - pinctrl-0 = <&reset_button_pin>; - pinctrl-names = "default"; - - key-reset { - label = "reset"; - gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; - linux,code = <KEY_RESTART>; - debounce-interval = <50>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - pinctrl-names = "default"; - - lan_led: led-0 { - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - label = "nanopi-r2s:green:lan"; - }; - - sys_led: led-1 { - gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; - label = "nanopi-r2s:red:sys"; - default-state = "on"; - }; - - wan_led: led-2 { - gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - label = "nanopi-r2s:green:wan"; - }; - }; - - vcc_io_sdio: sdmmcio-regulator { - compatible = "regulator-gpio"; - enable-active-high; - gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&sdio_vcc_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_io_sdio"; - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-settling-time-us = <5000>; - regulator-type = "voltage"; - startup-delay-us = <2000>; - states = <1800000 0x1>, - <3300000 0x0>; - vin-supply = <&vcc_io_33>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&sdmmc0m1_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_sd"; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io_33>; - }; - - vdd_5v: vdd-5v { - compatible = "regulator-fixed"; - regulator-name = "vdd_5v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vdd_5v_lan: vdd-5v-lan { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&lan_vdd_pin>; - pinctrl-names = "default"; - regulator-name = "vdd_5v_lan"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vdd_5v>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&display_subsystem { - status = "disabled"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; - clock_in_out = "input"; - phy-handle = <&rtl8211e>; - phy-mode = "rgmii"; - phy-supply = <&vcc_io_33>; - pinctrl-0 = <&rgmiim1_pins>; - pinctrl-names = "default"; - rx_delay = <0x18>; - snps,aal; - tx_delay = <0x24>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { - reg = <1>; - pinctrl-0 = <&eth_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-0 = <&pmic_int_l>; - pinctrl-names = "default"; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vdd_5v>; - vcc2-supply = <&vdd_5v>; - vcc3-supply = <&vdd_5v>; - vcc4-supply = <&vdd_5v>; - vcc5-supply = <&vcc_io_33>; - vcc6-supply = <&vdd_5v>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io_33: DCDC_REG4 { - regulator-name = "vcc_io_33"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&io_domains { - pmuio-supply = <&vcc_io_33>; - vccio1-supply = <&vcc_io_33>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io_sdio>; - vccio4-supply = <&vcc_18>; - vccio5-supply = <&vcc_io_33>; - vccio6-supply = <&vcc_io_33>; - status = "okay"; -}; - -&pinctrl { - button { - reset_button_pin: reset-button-pin { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - gmac2io { - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - leds { - lan_led_pin: lan-led-pin { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - lan { - lan_vdd_pin: lan-vdd-pin { - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - sd { - sdio_vcc_pin: sdio-vcc-pin { - rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - pinctrl-names = "default"; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_io_sdio>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb20_otg { - status = "okay"; - dr_mode = "host"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - /* Second port is for USB 3.0 */ - rtl8153: device@2 { - compatible = "usbbda,8153"; - reg = <2>; - }; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts deleted file mode 100644 index 4237f2ee8fee..000000000000 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts +++ /dev/null @@ -1,42 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT -/* - * Copyright (c) 2016 Xunlong Software. Co., Ltd. - * (http://www.orangepi.org) - * - * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com> - */ - -/dts-v1/; -#include "rk3328-orangepi-r1-plus.dts" - -/ { - model = "Xunlong Orange Pi R1 Plus LTS"; - compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328"; -}; - -&gmac2io { - phy-handle = <&yt8531c>; - tx_delay = <0x19>; - rx_delay = <0x05>; - - mdio { - /delete-node/ ethernet-phy@1; - - yt8531c: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - - motorcomm,auto-sleep-disabled; - motorcomm,clk-out-frequency-hz = <125000000>; - motorcomm,keep-pll-enabled; - motorcomm,rx-clk-drv-microamp = <5020>; - motorcomm,rx-data-drv-microamp = <5020>; - - pinctrl-0 = <&eth_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <15000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts deleted file mode 100644 index f20662929c77..000000000000 --- a/arch/arm/dts/rk3328-orangepi-r1-plus.dts +++ /dev/null @@ -1,374 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Based on rk3328-nanopi-r2s.dts, which is: - * Copyright (c) 2020 David Bauer <mail@david-bauer.net> - */ - -/dts-v1/; - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/leds/common.h> -#include "rk3328.dtsi" - -/ { - model = "Xunlong Orange Pi R1 Plus"; - compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - ethernet1 = &rtl8153; - mmc0 = &sdmmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clk: gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; - pinctrl-names = "default"; - - led-0 { - function = LED_FUNCTION_LAN; - color = <LED_COLOR_ID_GREEN>; - gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; - }; - - led-1 { - function = LED_FUNCTION_STATUS; - color = <LED_COLOR_ID_RED>; - gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - - led-2 { - function = LED_FUNCTION_WAN; - color = <LED_COLOR_ID_GREEN>; - gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; - }; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&sdmmc0m1_pin>; - pinctrl-names = "default"; - regulator-name = "vcc_sd"; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; - - vcc_sys: vcc-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vdd_5v_lan: vdd-5v-lan-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; - pinctrl-0 = <&lan_vdd_pin>; - pinctrl-names = "default"; - regulator-name = "vdd_5v_lan"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&display_subsystem { - status = "disabled"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; - clock_in_out = "input"; - phy-handle = <&rtl8211e>; - phy-mode = "rgmii"; - phy-supply = <&vcc_io>; - pinctrl-0 = <&rgmiim1_pins>; - pinctrl-names = "default"; - snps,aal; - rx_delay = <0x18>; - tx_delay = <0x24>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { - reg = <1>; - pinctrl-0 = <&eth_phy_reset_pin>; - pinctrl-names = "default"; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-0 = <&pmic_int_l>; - pinctrl-names = "default"; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_sys>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&io_domains { - pmuio-supply = <&vcc_io>; - vccio1-supply = <&vcc_io>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io>; - vccio4-supply = <&vcc_io>; - vccio5-supply = <&vcc_io>; - vccio6-supply = <&vcc_io>; - status = "okay"; -}; - -&pinctrl { - gmac2io { - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - leds { - lan_led_pin: lan-led-pin { - rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - sys_led_pin: sys-led-pin { - rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - wan_led_pin: wan-led-pin { - rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - lan { - lan_vdd_pin: lan-vdd-pin { - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pwm2 { - status = "okay"; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - pinctrl-names = "default"; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&spi0 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - }; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb20_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - /* Second port is for USB 3.0 */ - rtl8153: device@2 { - compatible = "usbbda,8153"; - reg = <2>; - }; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts deleted file mode 100644 index 414897a57e75..000000000000 --- a/arch/arm/dts/rk3328-roc-cc.dts +++ /dev/null @@ -1,384 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd - */ - -/dts-v1/; -#include "rk3328.dtsi" - -/ { - model = "Firefly roc-rk3328-cc"; - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - mmc0 = &sdmmc; - mmc1 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clkin: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0m1_pin>; - regulator-boot-on; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io>; - }; - - vcc_sdio: sdmmcio-regulator { - compatible = "regulator-gpio"; - gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>; - states = <1800000 0x1>, - <3300000 0x0>; - regulator-name = "vcc_sdio"; - regulator-type = "voltage"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb20_host_drv>; - regulator-name = "vcc_host1_5v"; - regulator-always-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc_phy: vcc-phy-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc_phy"; - regulator-always-on; - regulator-boot-on; - }; - - leds { - compatible = "gpio-leds"; - - power_led: led-0 { - label = "firefly:blue:power"; - linux,default-trigger = "heartbeat"; - gpios = <&rk805 1 GPIO_ACTIVE_LOW>; - default-state = "on"; - }; - - user_led: led-1 { - label = "firefly:yellow:user"; - linux,default-trigger = "mmc1"; - gpios = <&rk805 0 GPIO_ACTIVE_LOW>; - default-state = "off"; - }; - }; -}; - -&analog_sound { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; - clock_in_out = "input"; - phy-supply = <&vcc_phy>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmiim1_pins>; - snps,aal; - snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - snps,rxpbl = <0x4>; - snps,txpbl = <0x4>; - tx_delay = <0x24>; - rx_delay = <0x18>; - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmiphy { - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_io>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&i2s0 { - status = "okay"; -}; - -&i2s1 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - vccio1-supply = <&vcc_io>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_sdio>; - vccio4-supply = <&vcc_18>; - vccio5-supply = <&vcc_io>; - vccio6-supply = <&vcc_io>; - pmuio-supply = <&vcc_io>; -}; - -&pinctrl { - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - usb20_host_drv: usb20-host-drv { - rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply = <&vcc_sd>; - vqmmc-supply = <&vcc_sdio>; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&u2phy_otg { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb20_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&vop { - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts b/arch/arm/dts/rk3328-rock-pi-e.dts deleted file mode 100644 index 3cda6c627b68..000000000000 --- a/arch/arm/dts/rk3328-rock-pi-e.dts +++ /dev/null @@ -1,445 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * (C) Copyright 2020 Chen-Yu Tsai <wens@csie.org> - * - * Based on ./rk3328-rock64.dts, which is - * - * Copyright (c) 2017 PINE64 - */ - -/dts-v1/; - -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/leds/common.h> -#include <dt-bindings/pinctrl/rockchip.h> - -#include "rk3328.dtsi" - -/ { - model = "Radxa ROCK Pi E"; - compatible = "radxa,rockpi-e", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - ethernet1 = &gmac2phy; - mmc0 = &sdmmc; - mmc1 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1750000>; - - /* This button is unpopulated out of the factory. */ - button-recovery { - label = "Recovery"; - linux,code = <KEY_VENDOR>; - press-threshold-microvolt = <10000>; - }; - }; - - gmac_clkin: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-0 = <&led_pin>; - pinctrl-names = "default"; - - led-0 { - color = <LED_COLOR_ID_BLUE>; - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0m1_pin>; - regulator-name = "vcc_sd"; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; - - vcc_host_5v: vcc-host-5v-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb30_host_drv>; - enable-active-high; - regulator-name = "vcc_host_5v"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc_wifi: vcc-wifi-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_en>; - regulator-name = "vcc_wifi"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_io>; - }; -}; - -&analog_sound { - status = "okay"; -}; - -&codec { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; - clock_in_out = "input"; - phy-handle = <&rtl8211e>; - phy-mode = "rgmii"; - phy-supply = <&vcc_io>; - pinctrl-names = "default"; - pinctrl-0 = <&rgmiim1_pins>; - snps,aal; - snps,rxpbl = <0x4>; - snps,txpbl = <0x4>; - tx_delay = <0x26>; - rx_delay = <0x11>; - status = "okay"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { - reg = <1>; - pinctrl-0 = <&eth_phy_int_pin>, <&eth_phy_reset_pin>; - pinctrl-names = "default"; - interrupt-parent = <&gpio1>; - interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - }; - }; -}; - -&gmac2phy { - status = "okay"; -}; - -&gpio0 { - gpio-line-names = - /* GPIO0_A0 - A7 */ - "", "", "", "", "", "", "", "", - /* GPIO0_B0 - B7 */ - "", "", "", "", "", "", "", "", - /* GPIO0_C0 - C7 */ - "", "", "", "", "", "", "", "", - /* GPIO0_D0 - D7 */ - "", "", "", "pin-15 [GPIO0_D3]", "", "", "", ""; -}; - -&gpio1 { - gpio-line-names = - /* GPIO1_A0 - A7 */ - "", "", "", "", "", "", "", "", - /* GPIO1_B0 - B7 */ - "", "", "", "", "", "", "", "", - /* GPIO1_C0 - C7 */ - "", "", "", "", "", "", "", "", - /* GPIO1_D0 - D7 */ - "", "", "", "", "pin-07 [GPIO1_D4]", "", "", ""; -}; - -&gpio2 { - gpio-line-names = - /* GPIO2_A0 - A7 */ - "pin-08 [GPIO2_A0]", "pin-10 [GPIO2_A1]", "pin-11 [GPIO2_A2]", - "pin-13 [GPIO2-A3]", "pin-27 [GPIO2_A4]", "pin-28 [GPIO2_A5]", - "pin-33 [GPIO2_A6]", "", - /* GPIO2_B0 - B7 */ - "", "", "", "", "pin-26 [GPIO2_B4]", "", "", "pin-36 [GPIO2_B7]", - /* GPIO2_C0 - C7 */ - "pin-32 [GPIO2_C0]", "pin-35 [GPIO2_C1]", "pin-12 [GPIO2_C2]", - "pin-38 [GPIO2_C3]", "pin-29 [GPIO2_C4]", "pin-31 [GPIO2_C5]", - "pin-37 [GPIO2_C6]", "pin-40 [GPIO2_C7]", - /* GPIO2_D0 - D7 */ - "", "", "", "", "", "", "", ""; -}; - -&gpio3 { - gpio-line-names = - /* GPIO3_A0 - A7 */ - "pin-23 [GPIO3_A0]", "pin-19 [GPIO3_A1]", "pin-21 [GPIO3_A2]", - "", "pin-03 [GPIO3_A4]", "", "pin-05 [GPIO3_A6]", "", - /* GPIO3_B0 - B7 */ - "pin-24 [GPIO3_B0]", "", "", "", "", "", "", "", - /* GPIO3_C0 - C7 */ - "", "", "", "", "", "", "", "", - /* GPIO3_D0 - D7 */ - "", "", "", "", "", "", "", ""; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio2>; - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_sys>; - - regulators { - vdd_log: DCDC_REG1 { - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&i2s1 { - status = "okay"; -}; - -&io_domains { - pmuio-supply = <&vcc_io>; - vccio1-supply = <&vcc_io>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io>; - vccio4-supply = <&vcc_io>; - vccio5-supply = <&vcc_io>; - vccio6-supply = <&vcc_io>; - status = "okay"; -}; - -&pinctrl { - ephy { - eth_phy_int_pin: eth-phy-int-pin { - rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>; - }; - - eth_phy_reset_pin: eth-phy-reset-pin { - rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; - }; - }; - - leds { - led_pin: led-pin { - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb3 { - usb30_host_drv: usb30-host-drv { - rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - wifi { - wifi_en: wifi-en { - rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-sd-highspeed; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcc_18>; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&u2phy { - status = "okay"; -}; - -&u2phy_host { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts deleted file mode 100644 index 229fe9da9c2d..000000000000 --- a/arch/arm/dts/rk3328-rock64.dts +++ /dev/null @@ -1,394 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 PINE64 - */ - -/dts-v1/; -#include "rk3328.dtsi" - -/ { - model = "Pine64 Rock64"; - compatible = "pine64,rock64", "rockchip,rk3328"; - - aliases { - ethernet0 = &gmac2io; - mmc0 = &sdmmc; - mmc1 = &emmc; - }; - - chosen { - stdout-path = "serial2:1500000n8"; - }; - - gmac_clkin: external-gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - - vcc_sd: sdmmc-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0m1_pin>; - regulator-name = "vcc_sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc_io>; - }; - - /* Common enable line for all of the rails mentioned in the labels */ - vcc_host_5v: vcc_host1_5v: vcc_otg_5v: vcc-host-5v-regulator { - compatible = "regulator-fixed"; - gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; - pinctrl-names = "default"; - pinctrl-0 = <&usb20_host_drv>; - regulator-name = "vcc_host_5v"; - regulator-always-on; - regulator-boot-on; - vin-supply = <&vcc_sys>; - }; - - vcc_sys: vcc-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - ir-receiver { - compatible = "gpio-ir-receiver"; - gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; - pinctrl-0 = <&ir_int>; - pinctrl-names = "default"; - }; - - leds { - compatible = "gpio-leds"; - - power_led: led-0 { - gpios = <&rk805 1 GPIO_ACTIVE_LOW>; - linux,default-trigger = "mmc0"; - }; - - standby_led: led-1 { - gpios = <&rk805 0 GPIO_ACTIVE_LOW>; - linux,default-trigger = "heartbeat"; - }; - }; - - spdif_sound: spdif-sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "SPDIF"; - - simple-audio-card,cpu { - sound-dai = <&spdif>; - }; - - simple-audio-card,codec { - sound-dai = <&spdif_dit>; - }; - }; - - spdif_dit: spdif-dit { - compatible = "linux,spdif-dit"; - #sound-dai-cells = <0>; - }; -}; - -&analog_sound { - status = "okay"; -}; - -&codec { - mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>; - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_arm>; -}; - -&cpu1 { - cpu-supply = <&vdd_arm>; -}; - -&cpu2 { - cpu-supply = <&vdd_arm>; -}; - -&cpu3 { - cpu-supply = <&vdd_arm>; -}; - -&emmc { - bus-width = <8>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; - vmmc-supply = <&vcc_io>; - vqmmc-supply = <&vcc18_emmc>; - status = "okay"; -}; - -&gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; - clock_in_out = "input"; - phy-supply = <&vcc_io>; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <&rgmiim1_pins>; - snps,force_thresh_dma_mode; - snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 10000 50000>; - tx_delay = <0x24>; - rx_delay = <0x18>; - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_sound { - status = "okay"; -}; - -&hdmiphy { - status = "okay"; -}; - -&i2c1 { - status = "okay"; - - rk805: pmic@18 { - compatible = "rockchip,rk805"; - reg = <0x18>; - interrupt-parent = <&gpio2>; - interrupts = <6 IRQ_TYPE_LEVEL_LOW>; - #clock-cells = <1>; - clock-output-names = "xin32k", "rk805-clkout2"; - gpio-controller; - #gpio-cells = <2>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int_l>; - rockchip,system-power-controller; - wakeup-source; - - vcc1-supply = <&vcc_sys>; - vcc2-supply = <&vcc_sys>; - vcc3-supply = <&vcc_sys>; - vcc4-supply = <&vcc_sys>; - vcc5-supply = <&vcc_io>; - vcc6-supply = <&vcc_sys>; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - - vdd_arm: DCDC_REG2 { - regulator-name = "vdd_arm"; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vcc_io: DCDC_REG4 { - regulator-name = "vcc_io"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcc_18: LDO_REG1 { - regulator-name = "vcc_18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcc18_emmc: LDO_REG2 { - regulator-name = "vcc18_emmc"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vdd_10: LDO_REG3 { - regulator-name = "vdd_10"; - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <1000000>; - regulator-always-on; - regulator-boot-on; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1000000>; - }; - }; - }; - }; -}; - -&i2s0 { - status = "okay"; -}; - -&i2s1 { - status = "okay"; -}; - -&io_domains { - status = "okay"; - - vccio1-supply = <&vcc_io>; - vccio2-supply = <&vcc18_emmc>; - vccio3-supply = <&vcc_io>; - vccio4-supply = <&vcc_18>; - vccio5-supply = <&vcc_io>; - vccio6-supply = <&vcc_io>; - pmuio-supply = <&vcc_io>; -}; - -&pinctrl { - ir { - ir_int: ir-int { - rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int_l: pmic-int-l { - rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb2 { - usb20_host_drv: usb20-host-drv { - rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&sdmmc { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; - vmmc-supply = <&vcc_sd>; - status = "okay"; -}; - -&spdif { - pinctrl-0 = <&spdifm0_tx>; - status = "okay"; -}; - -&spi0 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - - /* maximum speed for Rockchip SPI */ - spi-max-frequency = <50000000>; - }; -}; - -&tsadc { - rockchip,hw-tshut-mode = <0>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&u2phy { - status = "okay"; - - u2phy_host: host-port { - status = "okay"; - }; - - u2phy_otg: otg-port { - status = "okay"; - }; -}; - -&usb20_otg { - dr_mode = "host"; - status = "okay"; -}; - -&usbdrd3 { - dr_mode = "host"; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&vop { - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi deleted file mode 100644 index fb5dcf6e9327..000000000000 --- a/arch/arm/dts/rk3328.dtsi +++ /dev/null @@ -1,1944 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd - */ - -#include <dt-bindings/clock/rk3328-cru.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/pinctrl/rockchip.h> -#include <dt-bindings/power/rk3328-power.h> -#include <dt-bindings/soc/rockchip,boot-mode.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - compatible = "rockchip,rk3328"; - - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x0>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x1>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x2>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a53"; - reg = <0x0 0x3>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; - cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - - idle-states { - entry-method = "psci"; - - CPU_SLEEP: cpu-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x0010000>; - entry-latency-us = <120>; - exit-latency-us = <250>; - min-residency-us = <900>; - }; - }; - - l2: l2-cache0 { - compatible = "cache"; - cache-level = <2>; - cache-unified; - }; - }; - - cpu0_opp_table: opp-table-0 { - compatible = "operating-points-v2"; - opp-shared; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <950000>; - clock-latency-ns = <40000>; - opp-suspend; - }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <950000>; - clock-latency-ns = <40000>; - }; - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <1000000>; - clock-latency-ns = <40000>; - }; - opp-1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <1100000>; - clock-latency-ns = <40000>; - }; - opp-1200000000 { - opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <1225000>; - clock-latency-ns = <40000>; - }; - opp-1296000000 { - opp-hz = /bits/ 64 <1296000000>; - opp-microvolt = <1300000>; - clock-latency-ns = <40000>; - }; - }; - - analog_sound: analog-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <256>; - simple-audio-card,name = "Analog"; - status = "disabled"; - - simple-audio-card,cpu { - sound-dai = <&i2s1>; - }; - - simple-audio-card,codec { - sound-dai = <&codec>; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - display_subsystem: display-subsystem { - compatible = "rockchip,display-subsystem"; - ports = <&vop_out>; - }; - - hdmi_sound: hdmi-sound { - compatible = "simple-audio-card"; - simple-audio-card,format = "i2s"; - simple-audio-card,mclk-fs = <128>; - simple-audio-card,name = "HDMI"; - status = "disabled"; - - simple-audio-card,cpu { - sound-dai = <&i2s0>; - }; - - simple-audio-card,codec { - sound-dai = <&hdmi>; - }; - }; - - psci { - compatible = "arm,psci-1.0", "arm,psci-0.2"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; - }; - - xin24m: xin24m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - }; - - i2s0: i2s@ff000000 { - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff000000 0x0 0x1000>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac 11>, <&dmac 12>; - dma-names = "tx", "rx"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s1: i2s@ff010000 { - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff010000 0x0 0x1000>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac 14>, <&dmac 15>; - dma-names = "tx", "rx"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - i2s2: i2s@ff020000 { - compatible = "rockchip,rk3328-i2s", "rockchip,rk3066-i2s"; - reg = <0x0 0xff020000 0x0 0x1000>; - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>; - clock-names = "i2s_clk", "i2s_hclk"; - dmas = <&dmac 0>, <&dmac 1>; - dma-names = "tx", "rx"; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - spdif: spdif@ff030000 { - compatible = "rockchip,rk3328-spdif"; - reg = <0x0 0xff030000 0x0 0x1000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>; - clock-names = "mclk", "hclk"; - dmas = <&dmac 10>; - dma-names = "tx"; - pinctrl-names = "default"; - pinctrl-0 = <&spdifm2_tx>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - pdm: pdm@ff040000 { - compatible = "rockchip,pdm"; - reg = <0x0 0xff040000 0x0 0x1000>; - clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>; - clock-names = "pdm_clk", "pdm_hclk"; - dmas = <&dmac 16>; - dma-names = "rx"; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&pdmm0_clk - &pdmm0_sdi0 - &pdmm0_sdi1 - &pdmm0_sdi2 - &pdmm0_sdi3>; - pinctrl-1 = <&pdmm0_clk_sleep - &pdmm0_sdi0_sleep - &pdmm0_sdi1_sleep - &pdmm0_sdi2_sleep - &pdmm0_sdi3_sleep>; - status = "disabled"; - }; - - grf: syscon@ff100000 { - compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff100000 0x0 0x1000>; - - io_domains: io-domains { - compatible = "rockchip,rk3328-io-voltage-domain"; - status = "disabled"; - }; - - grf_gpio: gpio { - compatible = "rockchip,rk3328-grf-gpio"; - gpio-controller; - #gpio-cells = <2>; - }; - - power: power-controller { - compatible = "rockchip,rk3328-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - power-domain@RK3328_PD_HEVC { - reg = <RK3328_PD_HEVC>; - #power-domain-cells = <0>; - }; - power-domain@RK3328_PD_VIDEO { - reg = <RK3328_PD_VIDEO>; - clocks = <&cru ACLK_RKVDEC>, - <&cru HCLK_RKVDEC>, - <&cru SCLK_VDEC_CABAC>, - <&cru SCLK_VDEC_CORE>; - #power-domain-cells = <0>; - }; - power-domain@RK3328_PD_VPU { - reg = <RK3328_PD_VPU>; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - #power-domain-cells = <0>; - }; - }; - - reboot-mode { - compatible = "syscon-reboot-mode"; - offset = <0x5c8>; - mode-normal = <BOOT_NORMAL>; - mode-recovery = <BOOT_RECOVERY>; - mode-bootloader = <BOOT_FASTBOOT>; - mode-loader = <BOOT_BL_DOWNLOAD>; - }; - }; - - uart0: serial@ff110000 { - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff110000 0x0 0x100>; - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac 2>, <&dmac 3>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart1: serial@ff120000 { - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff120000 0x0 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac 4>, <&dmac 5>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart2: serial@ff130000 { - compatible = "rockchip,rk3328-uart", "snps,dw-apb-uart"; - reg = <0x0 0xff130000 0x0 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac 6>, <&dmac 7>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&uart2m1_xfer>; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - i2c0: i2c@ff150000 { - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff150000 0x0 0x1000>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_I2C0>, <&cru PCLK_I2C0>; - clock-names = "i2c", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_xfer>; - status = "disabled"; - }; - - i2c1: i2c@ff160000 { - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff160000 0x0 0x1000>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>; - clock-names = "i2c", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_xfer>; - status = "disabled"; - }; - - i2c2: i2c@ff170000 { - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff170000 0x0 0x1000>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>; - clock-names = "i2c", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_xfer>; - status = "disabled"; - }; - - i2c3: i2c@ff180000 { - compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xff180000 0x0 0x1000>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>; - clock-names = "i2c", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_xfer>; - status = "disabled"; - }; - - spi0: spi@ff190000 { - compatible = "rockchip,rk3328-spi", "rockchip,rk3066-spi"; - reg = <0x0 0xff190000 0x0 0x1000>; - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>; - clock-names = "spiclk", "apb_pclk"; - dmas = <&dmac 8>, <&dmac 9>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>; - status = "disabled"; - }; - - wdt: watchdog@ff1a0000 { - compatible = "rockchip,rk3328-wdt", "snps,dw-wdt"; - reg = <0x0 0xff1a0000 0x0 0x100>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_WDT>; - }; - - pwm0: pwm@ff1b0000 { - compatible = "rockchip,rk3328-pwm"; - reg = <0x0 0xff1b0000 0x0 0x10>; - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm0_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm1: pwm@ff1b0010 { - compatible = "rockchip,rk3328-pwm"; - reg = <0x0 0xff1b0010 0x0 0x10>; - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm1_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm2: pwm@ff1b0020 { - compatible = "rockchip,rk3328-pwm"; - reg = <0x0 0xff1b0020 0x0 0x10>; - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwm2_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm3: pwm@ff1b0030 { - compatible = "rockchip,rk3328-pwm"; - reg = <0x0 0xff1b0030 0x0 0x10>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; - clock-names = "pwm", "pclk"; - pinctrl-names = "default"; - pinctrl-0 = <&pwmir_pin>; - #pwm-cells = <3>; - status = "disabled"; - }; - - dmac: dma-controller@ff1f0000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xff1f0000 0x0 0x4000>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_DMAC>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - thermal-zones { - soc_thermal: soc-thermal { - polling-delay-passive = <20>; - polling-delay = <1000>; - sustainable-power = <1000>; - - thermal-sensors = <&tsadc 0>; - - trips { - threshold: trip-point0 { - temperature = <70000>; - hysteresis = <2000>; - type = "passive"; - }; - target: trip-point1 { - temperature = <85000>; - hysteresis = <2000>; - type = "passive"; - }; - soc_crit: soc-crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&target>; - cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, - <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; - contribution = <4096>; - }; - }; - }; - - }; - - tsadc: tsadc@ff250000 { - compatible = "rockchip,rk3328-tsadc"; - reg = <0x0 0xff250000 0x0 0x100>; - interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; - assigned-clocks = <&cru SCLK_TSADC>; - assigned-clock-rates = <50000>; - clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; - clock-names = "tsadc", "apb_pclk"; - pinctrl-names = "init", "default", "sleep"; - pinctrl-0 = <&otp_pin>; - pinctrl-1 = <&otp_out>; - pinctrl-2 = <&otp_pin>; - resets = <&cru SRST_TSADC>; - reset-names = "tsadc-apb"; - rockchip,grf = <&grf>; - rockchip,hw-tshut-temp = <100000>; - #thermal-sensor-cells = <1>; - status = "disabled"; - }; - - efuse: efuse@ff260000 { - compatible = "rockchip,rk3328-efuse"; - reg = <0x0 0xff260000 0x0 0x50>; - #address-cells = <1>; - #size-cells = <1>; - clocks = <&cru SCLK_EFUSE>; - clock-names = "pclk_efuse"; - rockchip,efuse-size = <0x20>; - - /* Data cells */ - efuse_id: id@7 { - reg = <0x07 0x10>; - }; - cpu_leakage: cpu-leakage@17 { - reg = <0x17 0x1>; - }; - logic_leakage: logic-leakage@19 { - reg = <0x19 0x1>; - }; - efuse_cpu_version: cpu-version@1a { - reg = <0x1a 0x1>; - bits = <3 3>; - }; - }; - - saradc: adc@ff280000 { - compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc"; - reg = <0x0 0xff280000 0x0 0x100>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - #io-channel-cells = <1>; - clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_SARADC_P>; - reset-names = "saradc-apb"; - status = "disabled"; - }; - - gpu: gpu@ff300000 { - compatible = "rockchip,rk3328-mali", "arm,mali-450"; - reg = <0x0 0xff300000 0x0 0x30000>; - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gp", - "gpmmu", - "pp", - "pp0", - "ppmmu0", - "pp1", - "ppmmu1"; - clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>; - clock-names = "bus", "core"; - resets = <&cru SRST_GPU_A>; - }; - - h265e_mmu: iommu@ff330200 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff330200 0 0x100>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_H265>, <&cru PCLK_H265>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - vepu_mmu: iommu@ff340800 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff340800 0x0 0x40>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - vpu: video-codec@ff350000 { - compatible = "rockchip,rk3328-vpu"; - reg = <0x0 0xff350000 0x0 0x800>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "vdpu"; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "hclk"; - iommus = <&vpu_mmu>; - power-domains = <&power RK3328_PD_VPU>; - }; - - vpu_mmu: iommu@ff350800 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff350800 0x0 0x40>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3328_PD_VPU>; - }; - - vdec: video-codec@ff360000 { - compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec"; - reg = <0x0 0xff360000 0x0 0x480>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, - <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>; - clock-names = "axi", "ahb", "cabac", "core"; - assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>, - <&cru SCLK_VDEC_CORE>; - assigned-clock-rates = <400000000>, <400000000>, <300000000>; - iommus = <&vdec_mmu>; - power-domains = <&power RK3328_PD_VIDEO>; - }; - - vdec_mmu: iommu@ff360480 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - power-domains = <&power RK3328_PD_VIDEO>; - }; - - vop: vop@ff370000 { - compatible = "rockchip,rk3328-vop"; - reg = <0x0 0xff370000 0x0 0x3efc>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VOP>, <&cru DCLK_LCDC>, <&cru HCLK_VOP>; - clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; - resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>; - reset-names = "axi", "ahb", "dclk"; - iommus = <&vop_mmu>; - status = "disabled"; - - vop_out: port { - #address-cells = <1>; - #size-cells = <0>; - - vop_out_hdmi: endpoint@0 { - reg = <0>; - remote-endpoint = <&hdmi_in_vop>; - }; - }; - }; - - vop_mmu: iommu@ff373f00 { - compatible = "rockchip,iommu"; - reg = <0x0 0xff373f00 0x0 0x100>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; - clock-names = "aclk", "iface"; - #iommu-cells = <0>; - status = "disabled"; - }; - - hdmi: hdmi@ff3c0000 { - compatible = "rockchip,rk3328-dw-hdmi"; - reg = <0x0 0xff3c0000 0x0 0x20000>; - reg-io-width = <4>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_HDMI>, - <&cru SCLK_HDMI_SFC>, - <&cru SCLK_RTC32K>; - clock-names = "iahb", - "isfr", - "cec"; - phys = <&hdmiphy>; - phy-names = "hdmi"; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_cec &hdmii2c_xfer &hdmi_hpd>; - rockchip,grf = <&grf>; - #sound-dai-cells = <0>; - status = "disabled"; - - ports { - hdmi_in: port { - hdmi_in_vop: endpoint { - remote-endpoint = <&vop_out_hdmi>; - }; - }; - }; - }; - - codec: codec@ff410000 { - compatible = "rockchip,rk3328-codec"; - reg = <0x0 0xff410000 0x0 0x1000>; - clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>; - clock-names = "pclk", "mclk"; - rockchip,grf = <&grf>; - #sound-dai-cells = <0>; - status = "disabled"; - }; - - hdmiphy: phy@ff430000 { - compatible = "rockchip,rk3328-hdmi-phy"; - reg = <0x0 0xff430000 0x0 0x10000>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_HDMIPHY>, <&xin24m>, <&cru DCLK_HDMIPHY>; - clock-names = "sysclk", "refoclk", "refpclk"; - clock-output-names = "hdmi_phy"; - #clock-cells = <0>; - nvmem-cells = <&efuse_cpu_version>; - nvmem-cell-names = "cpu-version"; - #phy-cells = <0>; - status = "disabled"; - }; - - cru: clock-controller@ff440000 { - compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon"; - reg = <0x0 0xff440000 0x0 0x1000>; - rockchip,grf = <&grf>; - #clock-cells = <1>; - #reset-cells = <1>; - assigned-clocks = - /* - * CPLL should run at 1200, but that is to high for - * the initial dividers of most of its children. - * We need set cpll child clk div first, - * and then set the cpll frequency. - */ - <&cru DCLK_LCDC>, <&cru SCLK_PDM>, - <&cru SCLK_RTC32K>, <&cru SCLK_UART0>, - <&cru SCLK_UART1>, <&cru SCLK_UART2>, - <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, - <&cru ACLK_VIO_PRE>, <&cru ACLK_RGA_PRE>, - <&cru ACLK_VOP_PRE>, <&cru ACLK_RKVDEC_PRE>, - <&cru ACLK_RKVENC>, <&cru ACLK_VPU_PRE>, - <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>, - <&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>, - <&cru SCLK_SDIO>, <&cru SCLK_TSP>, - <&cru SCLK_WIFI>, <&cru ARMCLK>, - <&cru PLL_GPLL>, <&cru PLL_CPLL>, - <&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>, - <&cru PCLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, - <&cru HCLK_PERI>, <&cru PCLK_PERI>, - <&cru SCLK_RTC32K>; - assigned-clock-parents = - <&cru HDMIPHY>, <&cru PLL_APLL>, - <&cru PLL_GPLL>, <&xin24m>, - <&xin24m>, <&xin24m>; - assigned-clock-rates = - <0>, <61440000>, - <0>, <24000000>, - <24000000>, <24000000>, - <15000000>, <15000000>, - <100000000>, <100000000>, - <100000000>, <100000000>, - <50000000>, <100000000>, - <100000000>, <100000000>, - <50000000>, <50000000>, - <50000000>, <50000000>, - <24000000>, <600000000>, - <491520000>, <1200000000>, - <150000000>, <75000000>, - <75000000>, <150000000>, - <75000000>, <75000000>, - <32768>; - }; - - usb2phy_grf: syscon@ff450000 { - compatible = "rockchip,rk3328-usb2phy-grf", "syscon", - "simple-mfd"; - reg = <0x0 0xff450000 0x0 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - - u2phy: usb2phy@100 { - compatible = "rockchip,rk3328-usb2phy"; - reg = <0x100 0x10>; - clocks = <&xin24m>; - clock-names = "phyclk"; - clock-output-names = "usb480m_phy"; - #clock-cells = <0>; - assigned-clocks = <&cru USB480M>; - assigned-clock-parents = <&u2phy>; - status = "disabled"; - - u2phy_otg: otg-port { - #phy-cells = <0>; - interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "otg-bvalid", "otg-id", - "linestate"; - status = "disabled"; - }; - - u2phy_host: host-port { - #phy-cells = <0>; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "linestate"; - status = "disabled"; - }; - }; - }; - - sdmmc: mmc@ff500000 { - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff500000 0x0 0x4000>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, - <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - status = "disabled"; - }; - - sdio: mmc@ff510000 { - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff510000 0x0 0x4000>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>, - <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - status = "disabled"; - }; - - emmc: mmc@ff520000 { - compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xff520000 0x0 0x4000>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>, - <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - status = "disabled"; - }; - - gmac2io: ethernet@ff540000 { - compatible = "rockchip,rk3328-gmac"; - reg = <0x0 0xff540000 0x0 0x10000>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "macirq"; - clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>, - <&cru SCLK_MAC2IO_TX>, <&cru SCLK_MAC2IO_REF>, - <&cru SCLK_MAC2IO_REFOUT>, <&cru ACLK_MAC2IO>, - <&cru PCLK_MAC2IO>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_ref", - "clk_mac_refout", "aclk_mac", - "pclk_mac"; - resets = <&cru SRST_GMAC2IO_A>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; - tx-fifo-depth = <2048>; - rx-fifo-depth = <4096>; - snps,txpbl = <0x4>; - status = "disabled"; - }; - - gmac2phy: ethernet@ff550000 { - compatible = "rockchip,rk3328-gmac"; - reg = <0x0 0xff550000 0x0 0x10000>; - rockchip,grf = <&grf>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "macirq"; - clocks = <&cru SCLK_MAC2PHY_SRC>, <&cru SCLK_MAC2PHY_RXTX>, - <&cru SCLK_MAC2PHY_RXTX>, <&cru SCLK_MAC2PHY_REF>, - <&cru ACLK_MAC2PHY>, <&cru PCLK_MAC2PHY>, - <&cru SCLK_MAC2PHY_OUT>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_ref", - "aclk_mac", "pclk_mac", - "clk_macphy"; - resets = <&cru SRST_GMAC2PHY_A>; - reset-names = "stmmaceth"; - phy-mode = "rmii"; - phy-handle = <&phy>; - tx-fifo-depth = <2048>; - rx-fifo-depth = <4096>; - snps,txpbl = <0x4>; - clock_in_out = "output"; - status = "disabled"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - phy: ethernet-phy@0 { - compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22"; - reg = <0>; - clocks = <&cru SCLK_MAC2PHY_OUT>; - resets = <&cru SRST_MACPHY>; - pinctrl-names = "default"; - pinctrl-0 = <&fephyled_rxm1 &fephyled_linkm1>; - phy-is-integrated; - }; - }; - }; - - usb20_otg: usb@ff580000 { - compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb", - "snps,dwc2"; - reg = <0x0 0xff580000 0x0 0x40000>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_OTG>; - clock-names = "otg"; - dr_mode = "otg"; - g-np-tx-fifo-size = <16>; - g-rx-fifo-size = <280>; - g-tx-fifo-size = <256 128 128 64 32 16>; - phys = <&u2phy_otg>; - phy-names = "usb2-phy"; - status = "disabled"; - }; - - usb_host0_ehci: usb@ff5c0000 { - compatible = "generic-ehci"; - reg = <0x0 0xff5c0000 0x0 0x10000>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_HOST0>, <&u2phy>; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host0_ohci: usb@ff5d0000 { - compatible = "generic-ohci"; - reg = <0x0 0xff5d0000 0x0 0x10000>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_HOST0>, <&u2phy>; - phys = <&u2phy_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usbdrd3: usb@ff600000 { - compatible = "rockchip,rk3328-dwc3", "snps,dwc3"; - reg = <0x0 0xff600000 0x0 0x100000>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, - <&cru ACLK_USB3OTG>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk"; - dr_mode = "otg"; - phy_type = "utmi_wide"; - snps,dis-del-phy-power-chg-quirk; - snps,dis_enblslpm_quirk; - snps,dis-tx-ipgap-linecheck-quirk; - snps,dis-u2-freeclk-exists-quirk; - snps,dis_u2_susphy_quirk; - snps,dis_u3_susphy_quirk; - status = "disabled"; - }; - - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0xff811000 0 0x1000>, - <0x0 0xff812000 0 0x2000>, - <0x0 0xff814000 0 0x2000>, - <0x0 0xff816000 0 0x2000>; - interrupts = <GIC_PPI 9 - (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; - }; - - crypto: crypto@ff060000 { - compatible = "rockchip,rk3328-crypto"; - reg = <0x0 0xff060000 0x0 0x4000>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_CRYPTO_MST>, <&cru HCLK_CRYPTO_SLV>, - <&cru SCLK_CRYPTO>; - clock-names = "hclk_master", "hclk_slave", "sclk"; - resets = <&cru SRST_CRYPTO>; - reset-names = "crypto-rst"; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3328-pinctrl"; - rockchip,grf = <&grf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio@ff210000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff210000 0x0 0x100>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO0>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@ff220000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff220000 0x0 0x100>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO1>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@ff230000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff230000 0x0 0x100>; - interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO2>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@ff240000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xff240000 0x0 0x100>; - interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO3>; - - gpio-controller; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - }; - - pcfg_pull_up: pcfg-pull-up { - bias-pull-up; - }; - - pcfg_pull_down: pcfg-pull-down { - bias-pull-down; - }; - - pcfg_pull_none: pcfg-pull-none { - bias-disable; - }; - - pcfg_pull_none_2ma: pcfg-pull-none-2ma { - bias-disable; - drive-strength = <2>; - }; - - pcfg_pull_up_2ma: pcfg-pull-up-2ma { - bias-pull-up; - drive-strength = <2>; - }; - - pcfg_pull_up_4ma: pcfg-pull-up-4ma { - bias-pull-up; - drive-strength = <4>; - }; - - pcfg_pull_none_4ma: pcfg-pull-none-4ma { - bias-disable; - drive-strength = <4>; - }; - - pcfg_pull_down_4ma: pcfg-pull-down-4ma { - bias-pull-down; - drive-strength = <4>; - }; - - pcfg_pull_none_8ma: pcfg-pull-none-8ma { - bias-disable; - drive-strength = <8>; - }; - - pcfg_pull_up_8ma: pcfg-pull-up-8ma { - bias-pull-up; - drive-strength = <8>; - }; - - pcfg_pull_none_12ma: pcfg-pull-none-12ma { - bias-disable; - drive-strength = <12>; - }; - - pcfg_pull_up_12ma: pcfg-pull-up-12ma { - bias-pull-up; - drive-strength = <12>; - }; - - pcfg_output_high: pcfg-output-high { - output-high; - }; - - pcfg_output_low: pcfg-output-low { - output-low; - }; - - pcfg_input_high: pcfg-input-high { - bias-pull-up; - input-enable; - }; - - pcfg_input: pcfg-input { - input-enable; - }; - - i2c0 { - i2c0_xfer: i2c0-xfer { - rockchip,pins = <2 RK_PD0 1 &pcfg_pull_none>, - <2 RK_PD1 1 &pcfg_pull_none>; - }; - }; - - i2c1 { - i2c1_xfer: i2c1-xfer { - rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none>, - <2 RK_PA5 2 &pcfg_pull_none>; - }; - }; - - i2c2 { - i2c2_xfer: i2c2-xfer { - rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>, - <2 RK_PB6 1 &pcfg_pull_none>; - }; - }; - - i2c3 { - i2c3_xfer: i2c3-xfer { - rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>, - <0 RK_PA6 2 &pcfg_pull_none>; - }; - i2c3_pins: i2c3-pins { - rockchip,pins = - <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>, - <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hdmi_i2c { - hdmii2c_xfer: hdmii2c-xfer { - rockchip,pins = <0 RK_PA5 1 &pcfg_pull_none>, - <0 RK_PA6 1 &pcfg_pull_none>; - }; - }; - - pdm-0 { - pdmm0_clk: pdmm0-clk { - rockchip,pins = <2 RK_PC2 2 &pcfg_pull_none>; - }; - - pdmm0_fsync: pdmm0-fsync { - rockchip,pins = <2 RK_PC7 2 &pcfg_pull_none>; - }; - - pdmm0_sdi0: pdmm0-sdi0 { - rockchip,pins = <2 RK_PC3 2 &pcfg_pull_none>; - }; - - pdmm0_sdi1: pdmm0-sdi1 { - rockchip,pins = <2 RK_PC4 2 &pcfg_pull_none>; - }; - - pdmm0_sdi2: pdmm0-sdi2 { - rockchip,pins = <2 RK_PC5 2 &pcfg_pull_none>; - }; - - pdmm0_sdi3: pdmm0-sdi3 { - rockchip,pins = <2 RK_PC6 2 &pcfg_pull_none>; - }; - - pdmm0_clk_sleep: pdmm0-clk-sleep { - rockchip,pins = - <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_sdi0_sleep: pdmm0-sdi0-sleep { - rockchip,pins = - <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_sdi1_sleep: pdmm0-sdi1-sleep { - rockchip,pins = - <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_sdi2_sleep: pdmm0-sdi2-sleep { - rockchip,pins = - <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_sdi3_sleep: pdmm0-sdi3-sleep { - rockchip,pins = - <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>; - }; - - pdmm0_fsync_sleep: pdmm0-fsync-sleep { - rockchip,pins = - <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - tsadc { - otp_pin: otp-pin { - rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - otp_out: otp-out { - rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>; - }; - }; - - uart0 { - uart0_xfer: uart0-xfer { - rockchip,pins = <1 RK_PB1 1 &pcfg_pull_none>, - <1 RK_PB0 1 &pcfg_pull_up>; - }; - - uart0_cts: uart0-cts { - rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none>; - }; - - uart0_rts: uart0-rts { - rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>; - }; - - uart0_rts_pin: uart0-rts-pin { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - uart1 { - uart1_xfer: uart1-xfer { - rockchip,pins = <3 RK_PA4 4 &pcfg_pull_none>, - <3 RK_PA6 4 &pcfg_pull_up>; - }; - - uart1_cts: uart1-cts { - rockchip,pins = <3 RK_PA7 4 &pcfg_pull_none>; - }; - - uart1_rts: uart1-rts { - rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>; - }; - - uart1_rts_pin: uart1-rts-pin { - rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - uart2-0 { - uart2m0_xfer: uart2m0-xfer { - rockchip,pins = <1 RK_PA0 2 &pcfg_pull_none>, - <1 RK_PA1 2 &pcfg_pull_up>; - }; - }; - - uart2-1 { - uart2m1_xfer: uart2m1-xfer { - rockchip,pins = <2 RK_PA0 1 &pcfg_pull_none>, - <2 RK_PA1 1 &pcfg_pull_up>; - }; - }; - - spi0-0 { - spi0m0_clk: spi0m0-clk { - rockchip,pins = <2 RK_PB0 1 &pcfg_pull_up>; - }; - - spi0m0_cs0: spi0m0-cs0 { - rockchip,pins = <2 RK_PB3 1 &pcfg_pull_up>; - }; - - spi0m0_tx: spi0m0-tx { - rockchip,pins = <2 RK_PB1 1 &pcfg_pull_up>; - }; - - spi0m0_rx: spi0m0-rx { - rockchip,pins = <2 RK_PB2 1 &pcfg_pull_up>; - }; - - spi0m0_cs1: spi0m0-cs1 { - rockchip,pins = <2 RK_PB4 1 &pcfg_pull_up>; - }; - }; - - spi0-1 { - spi0m1_clk: spi0m1-clk { - rockchip,pins = <3 RK_PC7 2 &pcfg_pull_up>; - }; - - spi0m1_cs0: spi0m1-cs0 { - rockchip,pins = <3 RK_PD2 2 &pcfg_pull_up>; - }; - - spi0m1_tx: spi0m1-tx { - rockchip,pins = <3 RK_PD1 2 &pcfg_pull_up>; - }; - - spi0m1_rx: spi0m1-rx { - rockchip,pins = <3 RK_PD0 2 &pcfg_pull_up>; - }; - - spi0m1_cs1: spi0m1-cs1 { - rockchip,pins = <3 RK_PD3 2 &pcfg_pull_up>; - }; - }; - - spi0-2 { - spi0m2_clk: spi0m2-clk { - rockchip,pins = <3 RK_PA0 4 &pcfg_pull_up>; - }; - - spi0m2_cs0: spi0m2-cs0 { - rockchip,pins = <3 RK_PB0 3 &pcfg_pull_up>; - }; - - spi0m2_tx: spi0m2-tx { - rockchip,pins = <3 RK_PA1 4 &pcfg_pull_up>; - }; - - spi0m2_rx: spi0m2-rx { - rockchip,pins = <3 RK_PA2 4 &pcfg_pull_up>; - }; - }; - - i2s1 { - i2s1_mclk: i2s1-mclk { - rockchip,pins = <2 RK_PB7 1 &pcfg_pull_none>; - }; - - i2s1_sclk: i2s1-sclk { - rockchip,pins = <2 RK_PC2 1 &pcfg_pull_none>; - }; - - i2s1_lrckrx: i2s1-lrckrx { - rockchip,pins = <2 RK_PC0 1 &pcfg_pull_none>; - }; - - i2s1_lrcktx: i2s1-lrcktx { - rockchip,pins = <2 RK_PC1 1 &pcfg_pull_none>; - }; - - i2s1_sdi: i2s1-sdi { - rockchip,pins = <2 RK_PC3 1 &pcfg_pull_none>; - }; - - i2s1_sdo: i2s1-sdo { - rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>; - }; - - i2s1_sdio1: i2s1-sdio1 { - rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>; - }; - - i2s1_sdio2: i2s1-sdio2 { - rockchip,pins = <2 RK_PC5 1 &pcfg_pull_none>; - }; - - i2s1_sdio3: i2s1-sdio3 { - rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>; - }; - - i2s1_sleep: i2s1-sleep { - rockchip,pins = - <2 RK_PB7 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC0 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC1 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>, - <2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2s2-0 { - i2s2m0_mclk: i2s2m0-mclk { - rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>; - }; - - i2s2m0_sclk: i2s2m0-sclk { - rockchip,pins = <1 RK_PC6 1 &pcfg_pull_none>; - }; - - i2s2m0_lrckrx: i2s2m0-lrckrx { - rockchip,pins = <1 RK_PD2 1 &pcfg_pull_none>; - }; - - i2s2m0_lrcktx: i2s2m0-lrcktx { - rockchip,pins = <1 RK_PC7 1 &pcfg_pull_none>; - }; - - i2s2m0_sdi: i2s2m0-sdi { - rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>; - }; - - i2s2m0_sdo: i2s2m0-sdo { - rockchip,pins = <1 RK_PD1 1 &pcfg_pull_none>; - }; - - i2s2m0_sleep: i2s2m0-sleep { - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PD2 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PD0 RK_FUNC_GPIO &pcfg_input_high>, - <1 RK_PD1 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - i2s2-1 { - i2s2m1_mclk: i2s2m1-mclk { - rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>; - }; - - i2s2m1_sclk: i2s2m1-sclk { - rockchip,pins = <3 RK_PA0 6 &pcfg_pull_none>; - }; - - i2s2m1_lrckrx: i2sm1-lrckrx { - rockchip,pins = <3 RK_PB0 6 &pcfg_pull_none>; - }; - - i2s2m1_lrcktx: i2s2m1-lrcktx { - rockchip,pins = <3 RK_PB0 4 &pcfg_pull_none>; - }; - - i2s2m1_sdi: i2s2m1-sdi { - rockchip,pins = <3 RK_PA2 6 &pcfg_pull_none>; - }; - - i2s2m1_sdo: i2s2m1-sdo { - rockchip,pins = <3 RK_PA1 6 &pcfg_pull_none>; - }; - - i2s2m1_sleep: i2s2m1-sleep { - rockchip,pins = - <1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>, - <3 RK_PA0 RK_FUNC_GPIO &pcfg_input_high>, - <3 RK_PB0 RK_FUNC_GPIO &pcfg_input_high>, - <3 RK_PA2 RK_FUNC_GPIO &pcfg_input_high>, - <3 RK_PA1 RK_FUNC_GPIO &pcfg_input_high>; - }; - }; - - spdif-0 { - spdifm0_tx: spdifm0-tx { - rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>; - }; - }; - - spdif-1 { - spdifm1_tx: spdifm1-tx { - rockchip,pins = <2 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - spdif-2 { - spdifm2_tx: spdifm2-tx { - rockchip,pins = <0 RK_PA2 2 &pcfg_pull_none>; - }; - }; - - sdmmc0-0 { - sdmmc0m0_pwren: sdmmc0m0-pwren { - rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>; - }; - - sdmmc0m0_pin: sdmmc0m0-pin { - rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - sdmmc0-1 { - sdmmc0m1_pwren: sdmmc0m1-pwren { - rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0m1_pin: sdmmc0m1-pin { - rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - sdmmc0 { - sdmmc0_clk: sdmmc0-clk { - rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>; - }; - - sdmmc0_cmd: sdmmc0-cmd { - rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>; - }; - - sdmmc0_dectn: sdmmc0-dectn { - rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>; - }; - - sdmmc0_wrprt: sdmmc0-wrprt { - rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up_4ma>; - }; - - sdmmc0_bus1: sdmmc0-bus1 { - rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>; - }; - - sdmmc0_bus4: sdmmc0-bus4 { - rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>, - <1 RK_PA1 1 &pcfg_pull_up_8ma>, - <1 RK_PA2 1 &pcfg_pull_up_8ma>, - <1 RK_PA3 1 &pcfg_pull_up_8ma>; - }; - - sdmmc0_pins: sdmmc0-pins { - rockchip,pins = - <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - sdmmc0ext { - sdmmc0ext_clk: sdmmc0ext-clk { - rockchip,pins = <3 RK_PA2 3 &pcfg_pull_none_4ma>; - }; - - sdmmc0ext_cmd: sdmmc0ext-cmd { - rockchip,pins = <3 RK_PA0 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_wrprt: sdmmc0ext-wrprt { - rockchip,pins = <3 RK_PA3 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_dectn: sdmmc0ext-dectn { - rockchip,pins = <3 RK_PA1 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_bus1: sdmmc0ext-bus1 { - rockchip,pins = <3 RK_PA4 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_bus4: sdmmc0ext-bus4 { - rockchip,pins = - <3 RK_PA4 3 &pcfg_pull_up_4ma>, - <3 RK_PA5 3 &pcfg_pull_up_4ma>, - <3 RK_PA6 3 &pcfg_pull_up_4ma>, - <3 RK_PA7 3 &pcfg_pull_up_4ma>; - }; - - sdmmc0ext_pins: sdmmc0ext-pins { - rockchip,pins = - <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - sdmmc1 { - sdmmc1_clk: sdmmc1-clk { - rockchip,pins = <1 RK_PB4 1 &pcfg_pull_none_8ma>; - }; - - sdmmc1_cmd: sdmmc1-cmd { - rockchip,pins = <1 RK_PB5 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_pwren: sdmmc1-pwren { - rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_wrprt: sdmmc1-wrprt { - rockchip,pins = <1 RK_PC4 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_dectn: sdmmc1-dectn { - rockchip,pins = <1 RK_PC3 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_bus1: sdmmc1-bus1 { - rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_bus4: sdmmc1-bus4 { - rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>, - <1 RK_PB7 1 &pcfg_pull_up_8ma>, - <1 RK_PC0 1 &pcfg_pull_up_8ma>, - <1 RK_PC1 1 &pcfg_pull_up_8ma>; - }; - - sdmmc1_pins: sdmmc1-pins { - rockchip,pins = - <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up_4ma>, - <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>; - }; - }; - - emmc { - emmc_clk: emmc-clk { - rockchip,pins = <3 RK_PC5 2 &pcfg_pull_none_12ma>; - }; - - emmc_cmd: emmc-cmd { - rockchip,pins = <3 RK_PC3 2 &pcfg_pull_up_12ma>; - }; - - emmc_pwren: emmc-pwren { - rockchip,pins = <3 RK_PC6 2 &pcfg_pull_none>; - }; - - emmc_rstnout: emmc-rstnout { - rockchip,pins = <3 RK_PC4 2 &pcfg_pull_none>; - }; - - emmc_bus1: emmc-bus1 { - rockchip,pins = <0 RK_PA7 2 &pcfg_pull_up_12ma>; - }; - - emmc_bus4: emmc-bus4 { - rockchip,pins = - <0 RK_PA7 2 &pcfg_pull_up_12ma>, - <2 RK_PD4 2 &pcfg_pull_up_12ma>, - <2 RK_PD5 2 &pcfg_pull_up_12ma>, - <2 RK_PD6 2 &pcfg_pull_up_12ma>; - }; - - emmc_bus8: emmc-bus8 { - rockchip,pins = - <0 RK_PA7 2 &pcfg_pull_up_12ma>, - <2 RK_PD4 2 &pcfg_pull_up_12ma>, - <2 RK_PD5 2 &pcfg_pull_up_12ma>, - <2 RK_PD6 2 &pcfg_pull_up_12ma>, - <2 RK_PD7 2 &pcfg_pull_up_12ma>, - <3 RK_PC0 2 &pcfg_pull_up_12ma>, - <3 RK_PC1 2 &pcfg_pull_up_12ma>, - <3 RK_PC2 2 &pcfg_pull_up_12ma>; - }; - }; - - pwm0 { - pwm0_pin: pwm0-pin { - rockchip,pins = <2 RK_PA4 1 &pcfg_pull_none>; - }; - }; - - pwm1 { - pwm1_pin: pwm1-pin { - rockchip,pins = <2 RK_PA5 1 &pcfg_pull_none>; - }; - }; - - pwm2 { - pwm2_pin: pwm2-pin { - rockchip,pins = <2 RK_PA6 1 &pcfg_pull_none>; - }; - }; - - pwmir { - pwmir_pin: pwmir-pin { - rockchip,pins = <2 RK_PA2 1 &pcfg_pull_none>; - }; - }; - - gmac-1 { - rgmiim1_pins: rgmiim1-pins { - rockchip,pins = - /* mac_txclk */ - <1 RK_PB4 2 &pcfg_pull_none_8ma>, - /* mac_rxclk */ - <1 RK_PB5 2 &pcfg_pull_none_4ma>, - /* mac_mdio */ - <1 RK_PC3 2 &pcfg_pull_none_4ma>, - /* mac_txen */ - <1 RK_PD1 2 &pcfg_pull_none_8ma>, - /* mac_clk */ - <1 RK_PC5 2 &pcfg_pull_none_4ma>, - /* mac_rxdv */ - <1 RK_PC6 2 &pcfg_pull_none_4ma>, - /* mac_mdc */ - <1 RK_PC7 2 &pcfg_pull_none_4ma>, - /* mac_rxd1 */ - <1 RK_PB2 2 &pcfg_pull_none_4ma>, - /* mac_rxd0 */ - <1 RK_PB3 2 &pcfg_pull_none_4ma>, - /* mac_txd1 */ - <1 RK_PB0 2 &pcfg_pull_none_8ma>, - /* mac_txd0 */ - <1 RK_PB1 2 &pcfg_pull_none_8ma>, - /* mac_rxd3 */ - <1 RK_PB6 2 &pcfg_pull_none_4ma>, - /* mac_rxd2 */ - <1 RK_PB7 2 &pcfg_pull_none_4ma>, - /* mac_txd3 */ - <1 RK_PC0 2 &pcfg_pull_none_8ma>, - /* mac_txd2 */ - <1 RK_PC1 2 &pcfg_pull_none_8ma>, - - /* mac_txclk */ - <0 RK_PB0 1 &pcfg_pull_none_8ma>, - /* mac_txen */ - <0 RK_PB4 1 &pcfg_pull_none_8ma>, - /* mac_clk */ - <0 RK_PD0 1 &pcfg_pull_none_4ma>, - /* mac_txd1 */ - <0 RK_PC0 1 &pcfg_pull_none_8ma>, - /* mac_txd0 */ - <0 RK_PC1 1 &pcfg_pull_none_8ma>, - /* mac_txd3 */ - <0 RK_PC7 1 &pcfg_pull_none_8ma>, - /* mac_txd2 */ - <0 RK_PC6 1 &pcfg_pull_none_8ma>; - }; - - rmiim1_pins: rmiim1-pins { - rockchip,pins = - /* mac_mdio */ - <1 RK_PC3 2 &pcfg_pull_none_2ma>, - /* mac_txen */ - <1 RK_PD1 2 &pcfg_pull_none_12ma>, - /* mac_clk */ - <1 RK_PC5 2 &pcfg_pull_none_2ma>, - /* mac_rxer */ - <1 RK_PD0 2 &pcfg_pull_none_2ma>, - /* mac_rxdv */ - <1 RK_PC6 2 &pcfg_pull_none_2ma>, - /* mac_mdc */ - <1 RK_PC7 2 &pcfg_pull_none_2ma>, - /* mac_rxd1 */ - <1 RK_PB2 2 &pcfg_pull_none_2ma>, - /* mac_rxd0 */ - <1 RK_PB3 2 &pcfg_pull_none_2ma>, - /* mac_txd1 */ - <1 RK_PB0 2 &pcfg_pull_none_12ma>, - /* mac_txd0 */ - <1 RK_PB1 2 &pcfg_pull_none_12ma>, - - /* mac_mdio */ - <0 RK_PB3 1 &pcfg_pull_none>, - /* mac_txen */ - <0 RK_PB4 1 &pcfg_pull_none>, - /* mac_clk */ - <0 RK_PD0 1 &pcfg_pull_none>, - /* mac_mdc */ - <0 RK_PC3 1 &pcfg_pull_none>, - /* mac_txd1 */ - <0 RK_PC0 1 &pcfg_pull_none>, - /* mac_txd0 */ - <0 RK_PC1 1 &pcfg_pull_none>; - }; - }; - - gmac2phy { - fephyled_speed10: fephyled-speed10 { - rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>; - }; - - fephyled_duplex: fephyled-duplex { - rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>; - }; - - fephyled_rxm1: fephyled-rxm1 { - rockchip,pins = <2 RK_PD1 2 &pcfg_pull_none>; - }; - - fephyled_txm1: fephyled-txm1 { - rockchip,pins = <2 RK_PD1 3 &pcfg_pull_none>; - }; - - fephyled_linkm1: fephyled-linkm1 { - rockchip,pins = <2 RK_PD0 2 &pcfg_pull_none>; - }; - }; - - tsadc_pin { - tsadc_int: tsadc-int { - rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>; - }; - tsadc_pin: tsadc-pin { - rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - hdmi_pin { - hdmi_cec: hdmi-cec { - rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>; - }; - - hdmi_hpd: hdmi-hpd { - rockchip,pins = <0 RK_PA4 1 &pcfg_pull_down>; - }; - }; - - cif-0 { - dvp_d2d9_m0:dvp-d2d9-m0 { - rockchip,pins = - /* cif_d0 */ - <3 RK_PA4 2 &pcfg_pull_none>, - /* cif_d1 */ - <3 RK_PA5 2 &pcfg_pull_none>, - /* cif_d2 */ - <3 RK_PA6 2 &pcfg_pull_none>, - /* cif_d3 */ - <3 RK_PA7 2 &pcfg_pull_none>, - /* cif_d4 */ - <3 RK_PB0 2 &pcfg_pull_none>, - /* cif_d5m0 */ - <3 RK_PB1 2 &pcfg_pull_none>, - /* cif_d6m0 */ - <3 RK_PB2 2 &pcfg_pull_none>, - /* cif_d7m0 */ - <3 RK_PB3 2 &pcfg_pull_none>, - /* cif_href */ - <3 RK_PA1 2 &pcfg_pull_none>, - /* cif_vsync */ - <3 RK_PA0 2 &pcfg_pull_none>, - /* cif_clkoutm0 */ - <3 RK_PA3 2 &pcfg_pull_none>, - /* cif_clkin */ - <3 RK_PA2 2 &pcfg_pull_none>; - }; - }; - - cif-1 { - dvp_d2d9_m1:dvp-d2d9-m1 { - rockchip,pins = - /* cif_d0 */ - <3 RK_PA4 2 &pcfg_pull_none>, - /* cif_d1 */ - <3 RK_PA5 2 &pcfg_pull_none>, - /* cif_d2 */ - <3 RK_PA6 2 &pcfg_pull_none>, - /* cif_d3 */ - <3 RK_PA7 2 &pcfg_pull_none>, - /* cif_d4 */ - <3 RK_PB0 2 &pcfg_pull_none>, - /* cif_d5m1 */ - <2 RK_PC0 4 &pcfg_pull_none>, - /* cif_d6m1 */ - <2 RK_PC1 4 &pcfg_pull_none>, - /* cif_d7m1 */ - <2 RK_PC2 4 &pcfg_pull_none>, - /* cif_href */ - <3 RK_PA1 2 &pcfg_pull_none>, - /* cif_vsync */ - <3 RK_PA0 2 &pcfg_pull_none>, - /* cif_clkoutm1 */ - <2 RK_PB7 4 &pcfg_pull_none>, - /* cif_clkin */ - <3 RK_PA2 2 &pcfg_pull_none>; - }; - }; - }; -}; diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h deleted file mode 100644 index 555b4ff660ae..000000000000 --- a/include/dt-bindings/clock/rk3328-cru.h +++ /dev/null @@ -1,393 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (c) 2016 Rockchip Electronics Co. Ltd. - * Author: Elaine <zhangqing@rock-chips.com> - */ - -#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H -#define _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H - -/* core clocks */ -#define PLL_APLL 1 -#define PLL_DPLL 2 -#define PLL_CPLL 3 -#define PLL_GPLL 4 -#define PLL_NPLL 5 -#define ARMCLK 6 - -/* sclk gates (special clocks) */ -#define SCLK_RTC32K 30 -#define SCLK_SDMMC_EXT 31 -#define SCLK_SPI 32 -#define SCLK_SDMMC 33 -#define SCLK_SDIO 34 -#define SCLK_EMMC 35 -#define SCLK_TSADC 36 -#define SCLK_SARADC 37 -#define SCLK_UART0 38 -#define SCLK_UART1 39 -#define SCLK_UART2 40 -#define SCLK_I2S0 41 -#define SCLK_I2S1 42 -#define SCLK_I2S2 43 -#define SCLK_I2S1_OUT 44 -#define SCLK_I2S2_OUT 45 -#define SCLK_SPDIF 46 -#define SCLK_TIMER0 47 -#define SCLK_TIMER1 48 -#define SCLK_TIMER2 49 -#define SCLK_TIMER3 50 -#define SCLK_TIMER4 51 -#define SCLK_TIMER5 52 -#define SCLK_WIFI 53 -#define SCLK_CIF_OUT 54 -#define SCLK_I2C0 55 -#define SCLK_I2C1 56 -#define SCLK_I2C2 57 -#define SCLK_I2C3 58 -#define SCLK_CRYPTO 59 -#define SCLK_PWM 60 -#define SCLK_PDM 61 -#define SCLK_EFUSE 62 -#define SCLK_OTP 63 -#define SCLK_DDRCLK 64 -#define SCLK_VDEC_CABAC 65 -#define SCLK_VDEC_CORE 66 -#define SCLK_VENC_DSP 67 -#define SCLK_VENC_CORE 68 -#define SCLK_RGA 69 -#define SCLK_HDMI_SFC 70 -#define SCLK_HDMI_CEC 71 -#define SCLK_USB3_REF 72 -#define SCLK_USB3_SUSPEND 73 -#define SCLK_SDMMC_DRV 74 -#define SCLK_SDIO_DRV 75 -#define SCLK_EMMC_DRV 76 -#define SCLK_SDMMC_EXT_DRV 77 -#define SCLK_SDMMC_SAMPLE 78 -#define SCLK_SDIO_SAMPLE 79 -#define SCLK_EMMC_SAMPLE 80 -#define SCLK_SDMMC_EXT_SAMPLE 81 -#define SCLK_VOP 82 -#define SCLK_MAC2PHY_RXTX 83 -#define SCLK_MAC2PHY_SRC 84 -#define SCLK_MAC2PHY_REF 85 -#define SCLK_MAC2PHY_OUT 86 -#define SCLK_MAC2IO_RX 87 -#define SCLK_MAC2IO_TX 88 -#define SCLK_MAC2IO_REFOUT 89 -#define SCLK_MAC2IO_REF 90 -#define SCLK_MAC2IO_OUT 91 -#define SCLK_TSP 92 -#define SCLK_HSADC_TSP 93 -#define SCLK_USB3PHY_REF 94 -#define SCLK_REF_USB3OTG 95 -#define SCLK_USB3OTG_REF 96 -#define SCLK_USB3OTG_SUSPEND 97 -#define SCLK_REF_USB3OTG_SRC 98 -#define SCLK_MAC2IO_SRC 99 -#define SCLK_MAC2IO 100 -#define SCLK_MAC2PHY 101 -#define SCLK_MAC2IO_EXT 102 - -/* dclk gates */ -#define DCLK_LCDC 120 -#define DCLK_HDMIPHY 121 -#define HDMIPHY 122 -#define USB480M 123 -#define DCLK_LCDC_SRC 124 - -/* aclk gates */ -#define ACLK_AXISRAM 130 -#define ACLK_VOP_PRE 131 -#define ACLK_USB3OTG 132 -#define ACLK_RGA_PRE 133 -#define ACLK_DMAC 134 -#define ACLK_GPU 135 -#define ACLK_BUS_PRE 136 -#define ACLK_PERI_PRE 137 -#define ACLK_RKVDEC_PRE 138 -#define ACLK_RKVDEC 139 -#define ACLK_RKVENC 140 -#define ACLK_VPU_PRE 141 -#define ACLK_VIO_PRE 142 -#define ACLK_VPU 143 -#define ACLK_VIO 144 -#define ACLK_VOP 145 -#define ACLK_GMAC 146 -#define ACLK_H265 147 -#define ACLK_H264 148 -#define ACLK_MAC2PHY 149 -#define ACLK_MAC2IO 150 -#define ACLK_DCF 151 -#define ACLK_TSP 152 -#define ACLK_PERI 153 -#define ACLK_RGA 154 -#define ACLK_IEP 155 -#define ACLK_CIF 156 -#define ACLK_HDCP 157 - -/* pclk gates */ -#define PCLK_GPIO0 200 -#define PCLK_GPIO1 201 -#define PCLK_GPIO2 202 -#define PCLK_GPIO3 203 -#define PCLK_GRF 204 -#define PCLK_I2C0 205 -#define PCLK_I2C1 206 -#define PCLK_I2C2 207 -#define PCLK_I2C3 208 -#define PCLK_SPI 209 -#define PCLK_UART0 210 -#define PCLK_UART1 211 -#define PCLK_UART2 212 -#define PCLK_TSADC 213 -#define PCLK_PWM 214 -#define PCLK_TIMER 215 -#define PCLK_BUS_PRE 216 -#define PCLK_PERI_PRE 217 -#define PCLK_HDMI_CTRL 218 -#define PCLK_HDMI_PHY 219 -#define PCLK_GMAC 220 -#define PCLK_H265 221 -#define PCLK_MAC2PHY 222 -#define PCLK_MAC2IO 223 -#define PCLK_USB3PHY_OTG 224 -#define PCLK_USB3PHY_PIPE 225 -#define PCLK_USB3_GRF 226 -#define PCLK_USB2_GRF 227 -#define PCLK_HDMIPHY 228 -#define PCLK_DDR 229 -#define PCLK_PERI 230 -#define PCLK_HDMI 231 -#define PCLK_HDCP 232 -#define PCLK_DCF 233 -#define PCLK_SARADC 234 -#define PCLK_ACODECPHY 235 -#define PCLK_WDT 236 - -/* hclk gates */ -#define HCLK_PERI 308 -#define HCLK_TSP 309 -#define HCLK_GMAC 310 -#define HCLK_I2S0_8CH 311 -#define HCLK_I2S1_8CH 312 -#define HCLK_I2S2_2CH 313 -#define HCLK_SPDIF_8CH 314 -#define HCLK_VOP 315 -#define HCLK_NANDC 316 -#define HCLK_SDMMC 317 -#define HCLK_SDIO 318 -#define HCLK_EMMC 319 -#define HCLK_SDMMC_EXT 320 -#define HCLK_RKVDEC_PRE 321 -#define HCLK_RKVDEC 322 -#define HCLK_RKVENC 323 -#define HCLK_VPU_PRE 324 -#define HCLK_VIO_PRE 325 -#define HCLK_VPU 326 -#define HCLK_BUS_PRE 328 -#define HCLK_PERI_PRE 329 -#define HCLK_H264 330 -#define HCLK_CIF 331 -#define HCLK_OTG_PMU 332 -#define HCLK_OTG 333 -#define HCLK_HOST0 334 -#define HCLK_HOST0_ARB 335 -#define HCLK_CRYPTO_MST 336 -#define HCLK_CRYPTO_SLV 337 -#define HCLK_PDM 338 -#define HCLK_IEP 339 -#define HCLK_RGA 340 -#define HCLK_HDCP 341 - -#define CLK_NR_CLKS (HCLK_HDCP + 1) - -/* soft-reset indices */ -#define SRST_CORE0_PO 0 -#define SRST_CORE1_PO 1 -#define SRST_CORE2_PO 2 -#define SRST_CORE3_PO 3 -#define SRST_CORE0 4 -#define SRST_CORE1 5 -#define SRST_CORE2 6 -#define SRST_CORE3 7 -#define SRST_CORE0_DBG 8 -#define SRST_CORE1_DBG 9 -#define SRST_CORE2_DBG 10 -#define SRST_CORE3_DBG 11 -#define SRST_TOPDBG 12 -#define SRST_CORE_NIU 13 -#define SRST_STRC_A 14 -#define SRST_L2C 15 - -#define SRST_A53_GIC 18 -#define SRST_DAP 19 -#define SRST_PMU_P 21 -#define SRST_EFUSE 22 -#define SRST_BUSSYS_H 23 -#define SRST_BUSSYS_P 24 -#define SRST_SPDIF 25 -#define SRST_INTMEM 26 -#define SRST_ROM 27 -#define SRST_GPIO0 28 -#define SRST_GPIO1 29 -#define SRST_GPIO2 30 -#define SRST_GPIO3 31 - -#define SRST_I2S0 32 -#define SRST_I2S1 33 -#define SRST_I2S2 34 -#define SRST_I2S0_H 35 -#define SRST_I2S1_H 36 -#define SRST_I2S2_H 37 -#define SRST_UART0 38 -#define SRST_UART1 39 -#define SRST_UART2 40 -#define SRST_UART0_P 41 -#define SRST_UART1_P 42 -#define SRST_UART2_P 43 -#define SRST_I2C0 44 -#define SRST_I2C1 45 -#define SRST_I2C2 46 -#define SRST_I2C3 47 - -#define SRST_I2C0_P 48 -#define SRST_I2C1_P 49 -#define SRST_I2C2_P 50 -#define SRST_I2C3_P 51 -#define SRST_EFUSE_SE_P 52 -#define SRST_EFUSE_NS_P 53 -#define SRST_PWM0 54 -#define SRST_PWM0_P 55 -#define SRST_DMA 56 -#define SRST_TSP_A 57 -#define SRST_TSP_H 58 -#define SRST_TSP 59 -#define SRST_TSP_HSADC 60 -#define SRST_DCF_A 61 -#define SRST_DCF_P 62 - -#define SRST_SCR 64 -#define SRST_SPI 65 -#define SRST_TSADC 66 -#define SRST_TSADC_P 67 -#define SRST_CRYPTO 68 -#define SRST_SGRF 69 -#define SRST_GRF 70 -#define SRST_USB_GRF 71 -#define SRST_TIMER_6CH_P 72 -#define SRST_TIMER0 73 -#define SRST_TIMER1 74 -#define SRST_TIMER2 75 -#define SRST_TIMER3 76 -#define SRST_TIMER4 77 -#define SRST_TIMER5 78 -#define SRST_USB3GRF 79 - -#define SRST_PHYNIU 80 -#define SRST_HDMIPHY 81 -#define SRST_VDAC 82 -#define SRST_ACODEC_p 83 -#define SRST_SARADC 85 -#define SRST_SARADC_P 86 -#define SRST_GRF_DDR 87 -#define SRST_DFIMON 88 -#define SRST_MSCH 89 -#define SRST_DDRMSCH 91 -#define SRST_DDRCTRL 92 -#define SRST_DDRCTRL_P 93 -#define SRST_DDRPHY 94 -#define SRST_DDRPHY_P 95 - -#define SRST_GMAC_NIU_A 96 -#define SRST_GMAC_NIU_P 97 -#define SRST_GMAC2PHY_A 98 -#define SRST_GMAC2IO_A 99 -#define SRST_MACPHY 100 -#define SRST_OTP_PHY 101 -#define SRST_GPU_A 102 -#define SRST_GPU_NIU_A 103 -#define SRST_SDMMCEXT 104 -#define SRST_PERIPH_NIU_A 105 -#define SRST_PERIHP_NIU_H 106 -#define SRST_PERIHP_P 107 -#define SRST_PERIPHSYS_H 108 -#define SRST_MMC0 109 -#define SRST_SDIO 110 -#define SRST_EMMC 111 - -#define SRST_USB2OTG_H 112 -#define SRST_USB2OTG 113 -#define SRST_USB2OTG_ADP 114 -#define SRST_USB2HOST_H 115 -#define SRST_USB2HOST_ARB 116 -#define SRST_USB2HOST_AUX 117 -#define SRST_USB2HOST_EHCIPHY 118 -#define SRST_USB2HOST_UTMI 119 -#define SRST_USB3OTG 120 -#define SRST_USBPOR 121 -#define SRST_USB2OTG_UTMI 122 -#define SRST_USB2HOST_PHY_UTMI 123 -#define SRST_USB3OTG_UTMI 124 -#define SRST_USB3PHY_U2 125 -#define SRST_USB3PHY_U3 126 -#define SRST_USB3PHY_PIPE 127 - -#define SRST_VIO_A 128 -#define SRST_VIO_BUS_H 129 -#define SRST_VIO_H2P_H 130 -#define SRST_VIO_ARBI_H 131 -#define SRST_VOP_NIU_A 132 -#define SRST_VOP_A 133 -#define SRST_VOP_H 134 -#define SRST_VOP_D 135 -#define SRST_RGA 136 -#define SRST_RGA_NIU_A 137 -#define SRST_RGA_A 138 -#define SRST_RGA_H 139 -#define SRST_IEP_A 140 -#define SRST_IEP_H 141 -#define SRST_HDMI 142 -#define SRST_HDMI_P 143 - -#define SRST_HDCP_A 144 -#define SRST_HDCP 145 -#define SRST_HDCP_H 146 -#define SRST_CIF_A 147 -#define SRST_CIF_H 148 -#define SRST_CIF_P 149 -#define SRST_OTP_P 150 -#define SRST_OTP_SBPI 151 -#define SRST_OTP_USER 152 -#define SRST_DDRCTRL_A 153 -#define SRST_DDRSTDY_P 154 -#define SRST_DDRSTDY 155 -#define SRST_PDM_H 156 -#define SRST_PDM 157 -#define SRST_USB3PHY_OTG_P 158 -#define SRST_USB3PHY_PIPE_P 159 - -#define SRST_VCODEC_A 160 -#define SRST_VCODEC_NIU_A 161 -#define SRST_VCODEC_H 162 -#define SRST_VCODEC_NIU_H 163 -#define SRST_VDEC_A 164 -#define SRST_VDEC_NIU_A 165 -#define SRST_VDEC_H 166 -#define SRST_VDEC_NIU_H 167 -#define SRST_VDEC_CORE 168 -#define SRST_VDEC_CABAC 169 -#define SRST_DDRPHYDIV 175 - -#define SRST_RKVENC_NIU_A 176 -#define SRST_RKVENC_NIU_H 177 -#define SRST_RKVENC_H265_A 178 -#define SRST_RKVENC_H265_P 179 -#define SRST_RKVENC_H265_CORE 180 -#define SRST_RKVENC_H265_DSP 181 -#define SRST_RKVENC_H264_A 182 -#define SRST_RKVENC_H264_H 183 -#define SRST_RKVENC_INTMEM 184 - -#endif diff --git a/include/dt-bindings/power/rk3328-power.h b/include/dt-bindings/power/rk3328-power.h deleted file mode 100644 index 02e3d7fc1cce..000000000000 --- a/include/dt-bindings/power/rk3328-power.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_BINDINGS_POWER_RK3328_POWER_H__ -#define __DT_BINDINGS_POWER_RK3328_POWER_H__ - -/** - * RK3328 idle id Summary. - */ -#define RK3328_PD_CORE 0 -#define RK3328_PD_GPU 1 -#define RK3328_PD_BUS 2 -#define RK3328_PD_MSCH 3 -#define RK3328_PD_PERI 4 -#define RK3328_PD_VIDEO 5 -#define RK3328_PD_HEVC 6 -#define RK3328_PD_SYS 7 -#define RK3328_PD_VPU 8 -#define RK3328_PD_VIO 9 - -#endif

[04/16] rockchip: rk3328: Remove redundant device tree files

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