| Message ID | 20230104015628.29787-1-rick@andestech.com |
|---|---|
| State | Accepted |
| Commit | 3c60e59a4f540ae28dc51a4044f9733169cd7081 |
| Delegated to: | Andes |
| Headers | show |
| Series | [v3,1/2] riscv: ax25: bypass malloc when spl fit boots from ram | expand |
On Wed, Jan 04, 2023 at 09:56:28AM +0800, Rick Chen wrote: > Add src and dst address checking, if they > are the same address, just return and don't > copy data anymore. > > Signed-off-by: Rick Chen <rick@andestech.com> > --- > Changes in v3 > - new patch: separate from [1/2] > --- > arch/riscv/lib/memcpy.S | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
diff --git a/arch/riscv/lib/memcpy.S b/arch/riscv/lib/memcpy.S index 00672c19ad..9884077c93 100644 --- a/arch/riscv/lib/memcpy.S +++ b/arch/riscv/lib/memcpy.S @@ -9,6 +9,7 @@ /* void *memcpy(void *, const void *, size_t) */ ENTRY(__memcpy) WEAK(memcpy) + beq a0, a1, .copy_end /* Save for return value */ mv t6, a0 @@ -121,6 +122,7 @@ WEAK(memcpy) 2: mv a0, t6 +.copy_end: ret .Lmisaligned_word_copy:
Add src and dst address checking, if they are the same address, just return and don't copy data anymore. Signed-off-by: Rick Chen <rick@andestech.com> --- Changes in v3 - new patch: separate from [1/2] --- arch/riscv/lib/memcpy.S | 2 ++ 1 file changed, 2 insertions(+)