| Message ID | 20210407163159.15.Ic5602c03301b09f3ae3fc1b3fb5809ee130866e8@changeid |
|---|---|
| State | Superseded |
| Delegated to: | Bin Meng |
| Headers | show |
| Series | misc: Some more misc patches | expand |
Hi Simon, On Wed, Apr 7, 2021 at 12:33 PM Simon Glass <sjg@chromium.org> wrote: > > All the x86 devicetree files are built at once, whichever board is > actually being built. If coreboot is the target build, CONFIG_ROM_SIZE > is not defined and samus cannot build Chromium OS verified boot. Add > this condition to avoid errors about CONFIG_ROM_SIZE being missing. The commit title should use "x86: chromebook" as the tags, since it's not x86 generic thing. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > arch/x86/dts/chromebook_coral.dts | 2 +- > arch/x86/dts/chromebook_samus.dts | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > Otherwise, Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Regards, Bin
On 4/7/21 1:32 PM, Simon Glass wrote: > All the x86 devicetree files are built at once, whichever board is > actually being built. If coreboot is the target build, CONFIG_ROM_SIZE > is not defined and samus cannot build Chromium OS verified boot. Add > this condition to avoid errors about CONFIG_ROM_SIZE being missing. > > Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Best Regards, Jaehoon Chung > --- > > arch/x86/dts/chromebook_coral.dts | 2 +- > arch/x86/dts/chromebook_samus.dts | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts > index c8cb4e21c6d..66c31efb6cd 100644 > --- a/arch/x86/dts/chromebook_coral.dts > +++ b/arch/x86/dts/chromebook_coral.dts > @@ -10,7 +10,7 @@ > /include/ "rtc.dtsi" > /include/ "tsc_timer.dtsi" > > -#ifdef CONFIG_CHROMEOS_VBOOT > +#if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) > #include "chromeos-x86.dtsi" > #include "flashmap-x86-ro.dtsi" > #include "flashmap-16mb-rw.dtsi" > diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts > index adaeb1ea355..ad35ab2e3fd 100644 > --- a/arch/x86/dts/chromebook_samus.dts > +++ b/arch/x86/dts/chromebook_samus.dts > @@ -11,7 +11,7 @@ > > #include "smbios.dtsi" > > -#ifdef CONFIG_CHROMEOS_VBOOT > +#if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) > #include "chromeos-x86.dtsi" > #include "flashmap-x86-ro.dtsi" > #include "flashmap-8mb-rw.dtsi" >
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index c8cb4e21c6d..66c31efb6cd 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -10,7 +10,7 @@ /include/ "rtc.dtsi" /include/ "tsc_timer.dtsi" -#ifdef CONFIG_CHROMEOS_VBOOT +#if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) #include "chromeos-x86.dtsi" #include "flashmap-x86-ro.dtsi" #include "flashmap-16mb-rw.dtsi" diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts index adaeb1ea355..ad35ab2e3fd 100644 --- a/arch/x86/dts/chromebook_samus.dts +++ b/arch/x86/dts/chromebook_samus.dts @@ -11,7 +11,7 @@ #include "smbios.dtsi" -#ifdef CONFIG_CHROMEOS_VBOOT +#if defined(CONFIG_CHROMEOS_VBOOT) && defined(CONFIG_ROM_SIZE) #include "chromeos-x86.dtsi" #include "flashmap-x86-ro.dtsi" #include "flashmap-8mb-rw.dtsi"
All the x86 devicetree files are built at once, whichever board is actually being built. If coreboot is the target build, CONFIG_ROM_SIZE is not defined and samus cannot build Chromium OS verified boot. Add this condition to avoid errors about CONFIG_ROM_SIZE being missing. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/x86/dts/chromebook_coral.dts | 2 +- arch/x86/dts/chromebook_samus.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)