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[U-Boot,RFC,1/8] sun8i: Add TZPC setup for A83T

Message ID 20170607004721.24194-2-icenowy@aosc.io
State RFC
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Icenowy Zheng June 7, 2017, 12:47 a.m. UTC
From: "tpearson@raptorengineering.com" <tpearson@raptorengineering.com>

This patch enables non-secure access to all system peripherals
controlled by the STMA, and additionally sets the secure RAM
range to 64k in line with other sunxi devices.

Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 arch/arm/cpu/armv7/sunxi/Makefile      |  1 +
 arch/arm/cpu/armv7/sunxi/tzpc.c        | 10 ++++++++++
 arch/arm/include/asm/arch-sunxi/tzpc.h |  6 ++++++
 arch/arm/mach-sunxi/board.c            |  2 +-
 4 files changed, 18 insertions(+), 1 deletion(-)

Comments

Chen-Yu Tsai June 7, 2017, 3:24 a.m. UTC | #1
On Wed, Jun 7, 2017 at 8:47 AM, Icenowy Zheng <icenowy@aosc.io> wrote:
> From: "tpearson@raptorengineering.com" <tpearson@raptorengineering.com>

You should fix his name here.

>
> This patch enables non-secure access to all system peripherals
> controlled by the STMA, and additionally sets the secure RAM
> range to 64k in line with other sunxi devices.
>
> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  arch/arm/cpu/armv7/sunxi/Makefile      |  1 +
>  arch/arm/cpu/armv7/sunxi/tzpc.c        | 10 ++++++++++
>  arch/arm/include/asm/arch-sunxi/tzpc.h |  6 ++++++
>  arch/arm/mach-sunxi/board.c            |  2 +-
>  4 files changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
> index b35b9df4a9..8c026ff052 100644
> --- a/arch/arm/cpu/armv7/sunxi/Makefile
> +++ b/arch/arm/cpu/armv7/sunxi/Makefile
> @@ -11,6 +11,7 @@ obj-y += timer.o
>
>  obj-$(CONFIG_MACH_SUN6I)       += tzpc.o
>  obj-$(CONFIG_MACH_SUN8I_H3)    += tzpc.o
> +obj-$(CONFIG_MACH_SUN8I_A83T)  += tzpc.o
>
>  ifndef CONFIG_SPL_BUILD
>  obj-$(CONFIG_ARMV7_PSCI)       += psci.o
> diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c
> index 6c8a0fd9a2..50a5ff6b30 100644
> --- a/arch/arm/cpu/armv7/sunxi/tzpc.c
> +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c
> @@ -18,6 +18,16 @@ void tzpc_init(void)
>         writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set);
>  #endif
>
> +#ifdef SUN8I_A83T_TZPC_DECPORT0_ALL
> +       /* Set secure RAM size to defined value */
> +       writel(SUN8I_A83T_TZPC_R0SIZE_64K, &tzpc->r0size);

As mentioned in the original review of this patch, this field is read only.
There is no need to write to this register.

> +
> +       /* Enable non-secure access to all peripherals */
> +       writel(SUN8I_A83T_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
> +       writel(SUN8I_A83T_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
> +       writel(SUN8I_A83T_TZPC_DECPORT2_ALL, &tzpc->decport2_set);
> +#endif
> +
>  #ifdef CONFIG_MACH_SUN8I_H3
>         /* Enable non-secure access to all peripherals */
>         writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
> diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h
> index 95c55cd4d1..5b85ee86f9 100644
> --- a/arch/arm/include/asm/arch-sunxi/tzpc.h
> +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h
> @@ -25,6 +25,12 @@ struct sunxi_tzpc {
>
>  #define SUN6I_TZPC_DECPORT0_RTC        (1 << 1)
>
> +#define SUN8I_A83T_TZPC_DECPORT0_ALL   0xbe
> +#define SUN8I_A83T_TZPC_DECPORT1_ALL   0x7f
> +#define SUN8I_A83T_TZPC_DECPORT2_ALL   0x10
> +/* The Secure RAM size, 0x10 means 64KiB */
> +#define SUN8I_A83T_TZPC_R0SIZE_64K     0x10

So this last one is not needed.

ChenYu

> +
>  #define SUN8I_H3_TZPC_DECPORT0_ALL  0xbe
>  #define SUN8I_H3_TZPC_DECPORT1_ALL  0xff
>  #define SUN8I_H3_TZPC_DECPORT2_ALL  0x7f
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index 65b1ebd837..269555e77c 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -196,7 +196,7 @@ void s_init(void)
>                 "mcr p15, 0, r0, c1, c0, 1\n"
>                 ::: "r0");
>  #endif
> -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
> +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_A83T || defined CONFIG_MACH_SUN8I_H3
>         /* Enable non-secure access to some peripherals */
>         tzpc_init();
>  #endif
> --
> 2.12.2
>
> --
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diff mbox

Patch

diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile
index b35b9df4a9..8c026ff052 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -11,6 +11,7 @@  obj-y	+= timer.o
 
 obj-$(CONFIG_MACH_SUN6I)	+= tzpc.o
 obj-$(CONFIG_MACH_SUN8I_H3)	+= tzpc.o
+obj-$(CONFIG_MACH_SUN8I_A83T)	+= tzpc.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ARMV7_PSCI)	+= psci.o
diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c
index 6c8a0fd9a2..50a5ff6b30 100644
--- a/arch/arm/cpu/armv7/sunxi/tzpc.c
+++ b/arch/arm/cpu/armv7/sunxi/tzpc.c
@@ -18,6 +18,16 @@  void tzpc_init(void)
 	writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set);
 #endif
 
+#ifdef SUN8I_A83T_TZPC_DECPORT0_ALL
+	/* Set secure RAM size to defined value */
+	writel(SUN8I_A83T_TZPC_R0SIZE_64K, &tzpc->r0size);
+
+	/* Enable non-secure access to all peripherals */
+	writel(SUN8I_A83T_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
+	writel(SUN8I_A83T_TZPC_DECPORT1_ALL, &tzpc->decport1_set);
+	writel(SUN8I_A83T_TZPC_DECPORT2_ALL, &tzpc->decport2_set);
+#endif
+
 #ifdef CONFIG_MACH_SUN8I_H3
 	/* Enable non-secure access to all peripherals */
 	writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set);
diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h
index 95c55cd4d1..5b85ee86f9 100644
--- a/arch/arm/include/asm/arch-sunxi/tzpc.h
+++ b/arch/arm/include/asm/arch-sunxi/tzpc.h
@@ -25,6 +25,12 @@  struct sunxi_tzpc {
 
 #define SUN6I_TZPC_DECPORT0_RTC	(1 << 1)
 
+#define SUN8I_A83T_TZPC_DECPORT0_ALL	0xbe
+#define SUN8I_A83T_TZPC_DECPORT1_ALL	0x7f
+#define SUN8I_A83T_TZPC_DECPORT2_ALL	0x10
+/* The Secure RAM size, 0x10 means 64KiB */
+#define SUN8I_A83T_TZPC_R0SIZE_64K	0x10
+
 #define SUN8I_H3_TZPC_DECPORT0_ALL  0xbe
 #define SUN8I_H3_TZPC_DECPORT1_ALL  0xff
 #define SUN8I_H3_TZPC_DECPORT2_ALL  0x7f
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 65b1ebd837..269555e77c 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -196,7 +196,7 @@  void s_init(void)
 		"mcr p15, 0, r0, c1, c0, 1\n"
 		::: "r0");
 #endif
-#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
+#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_A83T || defined CONFIG_MACH_SUN8I_H3
 	/* Enable non-secure access to some peripherals */
 	tzpc_init();
 #endif