From patchwork Wed Jun 7 00:47:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 772111 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wj90W3Ld3z9s82 for ; Wed, 7 Jun 2017 10:48:43 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id E9479C21C82; Wed, 7 Jun 2017 00:48:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 7E0D1C21CBB; Wed, 7 Jun 2017 00:48:07 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 41B76C21C5C; Wed, 7 Jun 2017 00:47:56 +0000 (UTC) Received: from nov-007-i623.relay.mailchannels.net (nov-007-i623.relay.mailchannels.net [46.232.183.177]) by lists.denx.de (Postfix) with ESMTPS id 5D133C21C39 for ; Wed, 7 Jun 2017 00:47:50 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from relay.mailchannels.net (localhost [127.0.0.1]) by relay.mailchannels.net (Postfix) with ESMTP id 8A578126CB5; Wed, 7 Jun 2017 00:47:48 +0000 (UTC) Received: from hermes.aosc.io (unknown [100.96.131.87]) (Authenticated sender: lmn-TZDUIOWCRQMW) by relay.mailchannels.net (Postfix) with ESMTPA id A6FD6126C20; Wed, 7 Jun 2017 00:47:47 +0000 (UTC) X-Sender-Id: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io Received: from hermes.aosc.io (hermes.aosc.io [172.20.120.92]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384) by 0.0.0.0:2500 (trex/5.9.4); Wed, 07 Jun 2017 00:47:48 +0000 X-MC-Relay: Neutral X-MailChannels-SenderId: lmn-tzduiowcrqmw|x-authsender|icenowy@aosc.io X-MailChannels-Auth-Id: lmn-TZDUIOWCRQMW X-Robust-Thoughtful: 20a3d8b4754f7370_1496796468380_511349511 X-MC-Loop-Signature: 1496796468380:2230213058 X-MC-Ingress-Time: 1496796468380 Received: from localhost (localhost [127.0.0.1]) (Authenticated sender: icenowy@aosc.io) by hermes.aosc.io (Postfix) with ESMTPSA id A3E6E5150A; Wed, 7 Jun 2017 00:47:43 +0000 (UTC) From: Icenowy Zheng To: Jagan Teki , Maxime Ripard , Chen-Yu Tsai Date: Wed, 7 Jun 2017 08:47:14 +0800 Message-Id: <20170607004721.24194-2-icenowy@aosc.io> In-Reply-To: <20170607004721.24194-1-icenowy@aosc.io> References: <20170607004721.24194-1-icenowy@aosc.io> Cc: u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Icenowy Zheng Subject: [U-Boot] [RFC PATCH 1/8] sun8i: Add TZPC setup for A83T X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: "tpearson@raptorengineering.com" This patch enables non-secure access to all system peripherals controlled by the STMA, and additionally sets the secure RAM range to 64k in line with other sunxi devices. Signed-off-by: Timothy Pearson Signed-off-by: Icenowy Zheng --- arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/tzpc.c | 10 ++++++++++ arch/arm/include/asm/arch-sunxi/tzpc.h | 6 ++++++ arch/arm/mach-sunxi/board.c | 2 +- 4 files changed, 18 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index b35b9df4a9..8c026ff052 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -11,6 +11,7 @@ obj-y += timer.o obj-$(CONFIG_MACH_SUN6I) += tzpc.o obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o +obj-$(CONFIG_MACH_SUN8I_A83T) += tzpc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV7_PSCI) += psci.o diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c index 6c8a0fd9a2..50a5ff6b30 100644 --- a/arch/arm/cpu/armv7/sunxi/tzpc.c +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c @@ -18,6 +18,16 @@ void tzpc_init(void) writel(SUN6I_TZPC_DECPORT0_RTC, &tzpc->decport0_set); #endif +#ifdef SUN8I_A83T_TZPC_DECPORT0_ALL + /* Set secure RAM size to defined value */ + writel(SUN8I_A83T_TZPC_R0SIZE_64K, &tzpc->r0size); + + /* Enable non-secure access to all peripherals */ + writel(SUN8I_A83T_TZPC_DECPORT0_ALL, &tzpc->decport0_set); + writel(SUN8I_A83T_TZPC_DECPORT1_ALL, &tzpc->decport1_set); + writel(SUN8I_A83T_TZPC_DECPORT2_ALL, &tzpc->decport2_set); +#endif + #ifdef CONFIG_MACH_SUN8I_H3 /* Enable non-secure access to all peripherals */ writel(SUN8I_H3_TZPC_DECPORT0_ALL, &tzpc->decport0_set); diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h index 95c55cd4d1..5b85ee86f9 100644 --- a/arch/arm/include/asm/arch-sunxi/tzpc.h +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h @@ -25,6 +25,12 @@ struct sunxi_tzpc { #define SUN6I_TZPC_DECPORT0_RTC (1 << 1) +#define SUN8I_A83T_TZPC_DECPORT0_ALL 0xbe +#define SUN8I_A83T_TZPC_DECPORT1_ALL 0x7f +#define SUN8I_A83T_TZPC_DECPORT2_ALL 0x10 +/* The Secure RAM size, 0x10 means 64KiB */ +#define SUN8I_A83T_TZPC_R0SIZE_64K 0x10 + #define SUN8I_H3_TZPC_DECPORT0_ALL 0xbe #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 65b1ebd837..269555e77c 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -196,7 +196,7 @@ void s_init(void) "mcr p15, 0, r0, c1, c0, 1\n" ::: "r0"); #endif -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_A83T || defined CONFIG_MACH_SUN8I_H3 /* Enable non-secure access to some peripherals */ tzpc_init(); #endif