diff mbox

[U-Boot,v3,3/3] imx:mx6slevk add board level support for usb

Message ID 1415322494-20415-4-git-send-email-Peng.Fan@freescale.com
State Changes Requested
Delegated to: Stefano Babic
Headers show

Commit Message

Peng Fan Nov. 7, 2014, 1:08 a.m. UTC 
Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode

There are two usb port on mx6slevk board:
1. otg port
2. host port
The following are the connection between usb controller and board usb
interface, host port has not ID pin set:
otg1 core <---> board otg port
otg2 core <---> board host port
In order to make host port work, board_usb_phy_mode return 0 to let
ehci-mx6.c driver decide otg2 core to works in host mode.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
---

Changes v3:
 implement board_usb_phy_mode
Changes v2:
 Add otg polarity setting
 move pinmux into board_init
 set pinmux setting static

 arch/arm/include/asm/arch-mx6/mx6sl_pins.h |  5 +++
 board/freescale/mx6slevk/mx6slevk.c        | 63 ++++++++++++++++++++++++++++++
 include/configs/mx6slevk.h                 | 14 +++++++
 3 files changed, 82 insertions(+)

Comments

Marek Vasut Nov. 7, 2014, 8:26 a.m. UTC | #1 
On Friday, November 07, 2014 at 02:08:14 AM, Peng Fan wrote:
> Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
> 
> There are two usb port on mx6slevk board:
> 1. otg port
> 2. host port
> The following are the connection between usb controller and board usb
> interface, host port has not ID pin set:
> otg1 core <---> board otg port
> otg2 core <---> board host port
> In order to make host port work, board_usb_phy_mode return 0 to let
> ehci-mx6.c driver decide otg2 core to works in host mode.
> 
> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
> Signed-off-by: Ye Li <B37916@freescale.com>
> ---

[...]

> @@ -150,6 +151,63 @@ static int setup_fec(void)
>  }
>  #endif
> 
> +#ifdef CONFIG_USB_EHCI_MX6
> +#define USB_OTHERREGS_OFFSET	0x800
> +#define USBPHY_CTRL		0x30
> +#define UCTRL_PWR_POL		(1 << 9)
> +#define USBPHY_CTRL_OTG_ID	0x08000000

This looks like an duplication. Aren't those bits defined somewhere in
generic code already ?
[...]
Best regards,
Marek Vasut
Peng Fan Nov. 7, 2014, 11:08 a.m. UTC | #2 
在 11/7/2014 4:26 PM, Marek Vasut 写道:
> On Friday, November 07, 2014 at 02:08:14 AM, Peng Fan wrote:
>> Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
>>
>> There are two usb port on mx6slevk board:
>> 1. otg port
>> 2. host port
>> The following are the connection between usb controller and board usb
>> interface, host port has not ID pin set:
>> otg1 core <---> board otg port
>> otg2 core <---> board host port
>> In order to make host port work, board_usb_phy_mode return 0 to let
>> ehci-mx6.c driver decide otg2 core to works in host mode.
>>
>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>> Signed-off-by: Ye Li <B37916@freescale.com>
>> ---
>
> [...]
>
>> @@ -150,6 +151,63 @@ static int setup_fec(void)
>>   }
>>   #endif
>>
>> +#ifdef CONFIG_USB_EHCI_MX6
>> +#define USB_OTHERREGS_OFFSET	0x800
>> +#define USBPHY_CTRL		0x30
>> +#define UCTRL_PWR_POL		(1 << 9)
>> +#define USBPHY_CTRL_OTG_ID	0x08000000
>
> This looks like an duplication. Aren't those bits defined somewhere in
> generic code already ?
If this way 'int board_usb_phy_mode(int port, enum usb_init_type *type)' 
can be accpeted, these bits are not needed and I'll move these bits in 
the seperate PHY register struct access patch. Anyway, after the board 
level usb support patch.
> [...]
> Best regards,
> Marek Vasut
>
Regards,
Peng.
Marek Vasut Nov. 7, 2014, 11:10 a.m. UTC | #3 
On Friday, November 07, 2014 at 12:08:03 PM, Peng Fan wrote:
> 在 11/7/2014 4:26 PM, Marek Vasut 写道:
> > On Friday, November 07, 2014 at 02:08:14 AM, Peng Fan wrote:
> >> Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
> >> 
> >> There are two usb port on mx6slevk board:
> >> 1. otg port
> >> 2. host port
> >> The following are the connection between usb controller and board usb
> >> interface, host port has not ID pin set:
> >> otg1 core <---> board otg port
> >> otg2 core <---> board host port
> >> In order to make host port work, board_usb_phy_mode return 0 to let
> >> ehci-mx6.c driver decide otg2 core to works in host mode.
> >> 
> >> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
> >> Signed-off-by: Ye Li <B37916@freescale.com>
> >> ---
> > 
> > [...]
> > 
> >> @@ -150,6 +151,63 @@ static int setup_fec(void)
> >> 
> >>   }
> >>   #endif
> >> 
> >> +#ifdef CONFIG_USB_EHCI_MX6
> >> +#define USB_OTHERREGS_OFFSET	0x800
> >> +#define USBPHY_CTRL		0x30
> >> +#define UCTRL_PWR_POL		(1 << 9)
> >> +#define USBPHY_CTRL_OTG_ID	0x08000000
> > 
> > This looks like an duplication. Aren't those bits defined somewhere in
> > generic code already ?
> 
> If this way 'int board_usb_phy_mode(int port, enum usb_init_type *type)'
> can be accpeted, these bits are not needed and I'll move these bits in
> the seperate PHY register struct access patch. Anyway, after the board
> level usb support patch.

What about abstracting that stuff into a function which returns the PHY's
idea of the current mode instead. That way, you can determine the PHY's
idea of the mode from both board code and the driver code.

Best regards,
Marek Vasut
Peng Fan Nov. 7, 2014, 11:48 a.m. UTC | #4 
在 11/7/2014 7:10 PM, Marek Vasut 写道:
> On Friday, November 07, 2014 at 12:08:03 PM, Peng Fan wrote:
>> 在 11/7/2014 4:26 PM, Marek Vasut 写道:
>>> On Friday, November 07, 2014 at 02:08:14 AM, Peng Fan wrote:
>>>> Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
>>>>
>>>> There are two usb port on mx6slevk board:
>>>> 1. otg port
>>>> 2. host port
>>>> The following are the connection between usb controller and board usb
>>>> interface, host port has not ID pin set:
>>>> otg1 core <---> board otg port
>>>> otg2 core <---> board host port
>>>> In order to make host port work, board_usb_phy_mode return 0 to let
>>>> ehci-mx6.c driver decide otg2 core to works in host mode.
>>>>
>>>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>>>> Signed-off-by: Ye Li <B37916@freescale.com>
>>>> ---
>>>
>>> [...]
>>>
>>>> @@ -150,6 +151,63 @@ static int setup_fec(void)
>>>>
>>>>    }
>>>>    #endif
>>>>
>>>> +#ifdef CONFIG_USB_EHCI_MX6
>>>> +#define USB_OTHERREGS_OFFSET	0x800
>>>> +#define USBPHY_CTRL		0x30
>>>> +#define UCTRL_PWR_POL		(1 << 9)
>>>> +#define USBPHY_CTRL_OTG_ID	0x08000000
>>>
>>> This looks like an duplication. Aren't those bits defined somewhere in
>>> generic code already ?
>>
>> If this way 'int board_usb_phy_mode(int port, enum usb_init_type *type)'
>> can be accpeted, these bits are not needed and I'll move these bits in
>> the seperate PHY register struct access patch. Anyway, after the board
>> level usb support patch.
>
> What about abstracting that stuff into a function which returns the PHY's
> idea of the current mode instead. That way, you can determine the PHY's
> idea of the mode from both board code and the driver code.
>
struct phy register is good, but I prefer not to include this in board 
level code, see my reply in this patch "usb:ehci-mx6 add 
board_usb_phy_mode function" just as "board_ehci_power" and 
"board_ehci_hcd_init" do. I think it is good to make it a seperate patch.
> Best regards,
> Marek Vasut
>
Regards,
Peng.
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
index 045ccc4..17b4798 100644
--- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
@@ -34,5 +34,10 @@  enum {
 	MX6_PAD_FEC_REF_CLK__FEC_REF_OUT			= IOMUX_PAD(0x424, 0x134, 0x10, 0x000, 0, 0),
 	MX6_PAD_FEC_RX_ER__GPIO_4_19				= IOMUX_PAD(0x0428, 0x0138, 5, 0x0000, 0, 0),
 	MX6_PAD_FEC_TX_CLK__GPIO_4_21				= IOMUX_PAD(0x0434, 0x0144, 5, 0x0000, 0, 0),
+
+	MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID			= IOMUX_PAD(0x03D0, 0x00E0, 4, 0x05DC, 0, 0),
+
+	MX6_PAD_KEY_COL4__USB_USBOTG1_PWR			= IOMUX_PAD(0x0484, 0x017C, 6, 0x0000, 0, 0),
+	MX6_PAD_KEY_COL5__USB_USBOTG2_PWR			= IOMUX_PAD(0x0488, 0x0180, 6, 0x0000, 0, 0),
 };
 #endif	/* __ASM_ARCH_MX6_MX6SL_PINS_H__ */
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index a500133..e9ec77e 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -20,6 +20,7 @@ 
 #include <fsl_esdhc.h>
 #include <mmc.h>
 #include <netdev.h>
+#include <usb.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -150,6 +151,63 @@  static int setup_fec(void)
 }
 #endif
 
+#ifdef CONFIG_USB_EHCI_MX6
+#define USB_OTHERREGS_OFFSET	0x800
+#define USBPHY_CTRL		0x30
+#define UCTRL_PWR_POL		(1 << 9)
+#define USBPHY_CTRL_OTG_ID	0x08000000
+
+static iomux_v3_cfg_t const usb_otg_pads[] = {
+	/* OTG1 */
+	MX6_PAD_KEY_COL4__USB_USBOTG1_PWR | MUX_PAD_CTRL(NO_PAD_CTRL),
+	MX6_PAD_EPDC_PWRCOM__ANATOP_USBOTG1_ID | MUX_PAD_CTRL(NO_PAD_CTRL),
+	/* OTG2 */
+	MX6_PAD_KEY_COL5__USB_USBOTG2_PWR | MUX_PAD_CTRL(NO_PAD_CTRL)
+};
+
+static void setup_usb(void)
+{
+	imx_iomux_v3_setup_multiple_pads(usb_otg_pads,
+					 ARRAY_SIZE(usb_otg_pads));
+}
+
+int board_usb_phy_mode(int port)
+{
+	void __iomem *phy_reg;
+	void __iomem *phy_ctrl;
+	u32 val;
+
+	switch (port) {
+	case 0:
+		phy_reg = (void __iomem *)USB_PHY0_BASE_ADDR;
+		phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
+		val = __raw_readl(phy_ctrl);
+		return val & USBPHY_CTRL_OTG_ID;
+	case 1:
+		/* Work in HOST mode. */
+		return 0;
+	}
+
+	/* suppress warning msg */
+	return 0;
+}
+
+int board_ehci_hcd_init(int port)
+{
+	u32 *usbnc_usb_ctrl;
+
+	if (port > 1)
+		return -EINVAL;
+
+	usbnc_usb_ctrl = (u32 *)(USB_BASE_ADDR + USB_OTHERREGS_OFFSET +
+				 port * 4);
+
+	/* Set Power polarity */
+	setbits_le32(usbnc_usb_ctrl, UCTRL_PWR_POL);
+
+	return 0;
+}
+#endif
 
 int board_early_init_f(void)
 {
@@ -168,6 +226,11 @@  int board_init(void)
 #ifdef	CONFIG_FEC_MXC
 	setup_fec();
 #endif
+
+#ifdef CONFIG_USB_EHCI_MX6
+	setup_usb();
+#endif
+
 	return 0;
 }
 
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index fddedf1..021dc0e 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -210,4 +210,18 @@ 
 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
 #endif
 
+/* USB Configs */
+#define CONFIG_CMD_USB
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_MX6
+#define CONFIG_USB_STORAGE
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
+#define CONFIG_MXC_USB_FLAGS		0
+#define CONFIG_USB_MAX_CONTROLLER_COUNT	2
+#endif
+
 #endif				/* __CONFIG_H */