| Message ID | 20220627164044.1512862-1-rpathak@ventanamicro.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] target/riscv: fix user-mode build issue because mhartid | expand |
On Tue, Jun 28, 2022 at 3:03 AM Rahul Pathak <rpathak@ventanamicro.com> wrote: > > mhartid csr is not available in user-mode code path and > user-mode build fails because of its reference in > riscv_cpu_realize function > > Commit causing the issue is currently in Alistair's > riscv-to-apply.next branch and need to be squashed there. > > Fixes: 7ecee770d40 ("target/riscv: Force disable extensions if priv spec version does not match") Can you please re-send the original patch with the fix? I have removed this patch from my tree Alistair > > Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> > --- > > Changes in V2: > - remove the stray format specifier > - add the Fixes tag and reference to external tree > --- > target/riscv/cpu.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index e4ec05abf4..509923f15e 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -636,9 +636,15 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) > if (isa_ext_is_enabled(cpu, &isa_edata_arr[i]) && > (env->priv_ver < isa_edata_arr[i].min_version)) { > isa_ext_update_enabled(cpu, &isa_edata_arr[i], false); > +#ifndef CONFIG_USER_ONLY > warn_report("disabling %s extension for hart 0x%lx because " > "privilege spec version does not match", > isa_edata_arr[i].name, (unsigned long)env->mhartid); > +#else > + warn_report("disabling %s extension for hart because " > + "privilege spec version does not match", > + isa_edata_arr[i].name); > +#endif > } > } > > -- > 2.34.1 > >
Hi Alistair My fix patch needs to be dropped since Anup took care of this issue in his yesterdays series update in this patch - [PATCH v8 4/4] target/riscv: Force disable extensions if priv spec version does not match Thanks Rahul On Wed, Jun 29, 2022 at 7:32 AM Alistair Francis <alistair23@gmail.com> wrote: > > On Tue, Jun 28, 2022 at 3:03 AM Rahul Pathak <rpathak@ventanamicro.com> wrote: > > > > mhartid csr is not available in user-mode code path and > > user-mode build fails because of its reference in > > riscv_cpu_realize function > > > > Commit causing the issue is currently in Alistair's > > riscv-to-apply.next branch and need to be squashed there. > > > > Fixes: 7ecee770d40 ("target/riscv: Force disable extensions if priv spec version does not match") > > Can you please re-send the original patch with the fix? I have removed > this patch from my tree > > Alistair > > > > > Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> > > --- > > > > Changes in V2: > > - remove the stray format specifier > > - add the Fixes tag and reference to external tree > > --- > > target/riscv/cpu.c | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > > index e4ec05abf4..509923f15e 100644 > > --- a/target/riscv/cpu.c > > +++ b/target/riscv/cpu.c > > @@ -636,9 +636,15 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) > > if (isa_ext_is_enabled(cpu, &isa_edata_arr[i]) && > > (env->priv_ver < isa_edata_arr[i].min_version)) { > > isa_ext_update_enabled(cpu, &isa_edata_arr[i], false); > > +#ifndef CONFIG_USER_ONLY > > warn_report("disabling %s extension for hart 0x%lx because " > > "privilege spec version does not match", > > isa_edata_arr[i].name, (unsigned long)env->mhartid); > > +#else > > + warn_report("disabling %s extension for hart because " > > + "privilege spec version does not match", > > + isa_edata_arr[i].name); > > +#endif > > } > > } > > > > -- > > 2.34.1 > > > >
Hi Rahul, On Wed, Jun 29, 2022 at 10:07 AM Rahul Pathak <rpathak@ventanamicro.com> wrote: > > Hi Alistair > > My fix patch needs to be dropped since Anup took care of this issue > in his yesterdays series update in this patch - > [PATCH v8 4/4] target/riscv: Force disable extensions if priv spec > version does not match I don't understand. Each patch should keep bisectability. This sounds like to me, that [PATCH v8 4/4] target/riscv: Force disable extensions if priv spec version does not match has an issue that it does 2 things: one is to fix this bug, and the other one is to force disable extensions. Which is not right. Regards, Bin
On Wed, Jun 29, 2022 at 9:27 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > Hi Rahul, > > On Wed, Jun 29, 2022 at 10:07 AM Rahul Pathak <rpathak@ventanamicro.com> wrote: > > > > Hi Alistair > > > > My fix patch needs to be dropped since Anup took care of this issue > > in his yesterdays series update in this patch - > > [PATCH v8 4/4] target/riscv: Force disable extensions if priv spec > > version does not match > > I don't understand. Each patch should keep bisectability. The patches are already bisectable. There was a compile error until v6 which was fixed in v7 by squashing this patch into PATCH4. > > This sounds like to me, that > [PATCH v8 4/4] target/riscv: Force disable extensions if priv spec > version does not match > > has an issue that it does 2 things: one is to fix this bug, and the > other one is to force disable extensions. > > Which is not right. The bug is fixed as a result of force disabling extensions which don't match the priv spec version. Regards, Anup
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index e4ec05abf4..509923f15e 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -636,9 +636,15 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) if (isa_ext_is_enabled(cpu, &isa_edata_arr[i]) && (env->priv_ver < isa_edata_arr[i].min_version)) { isa_ext_update_enabled(cpu, &isa_edata_arr[i], false); +#ifndef CONFIG_USER_ONLY warn_report("disabling %s extension for hart 0x%lx because " "privilege spec version does not match", isa_edata_arr[i].name, (unsigned long)env->mhartid); +#else + warn_report("disabling %s extension for hart because " + "privilege spec version does not match", + isa_edata_arr[i].name); +#endif } }
mhartid csr is not available in user-mode code path and user-mode build fails because of its reference in riscv_cpu_realize function Commit causing the issue is currently in Alistair's riscv-to-apply.next branch and need to be squashed there. Fixes: 7ecee770d40 ("target/riscv: Force disable extensions if priv spec version does not match") Signed-off-by: Rahul Pathak <rpathak@ventanamicro.com> --- Changes in V2: - remove the stray format specifier - add the Fixes tag and reference to external tree --- target/riscv/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+)