diff mbox series

[5/5] hw/core: tcg-cpu-ops.h: Update comments of debug_check_watchpoint()

Message ID 20211029152535.2055096-6-bin.meng@windriver.com
State Superseded
Headers show
Series target/riscv: Initial support for native debug feature via M-mode CSRs | expand

Commit Message

Bin Meng Oct. 29, 2021, 3:25 p.m. UTC 
This is now used by RISC-V as well. Update the comments.

Signed-off-by: Bin Meng <bin.meng@windriver.com>

---

 include/hw/core/tcg-cpu-ops.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Richard Henderson Oct. 29, 2021, 7:33 p.m. UTC | #1 
On 10/29/21 8:25 AM, Bin Meng wrote:
> This is now used by RISC-V as well. Update the comments.
> 
> Signed-off-by: Bin Meng<bin.meng@windriver.com>
> 
> ---
> 
>   include/hw/core/tcg-cpu-ops.h | 1 +
>   1 file changed, 1 insertion(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 6cbe17f2e6..532c148a80 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -92,6 +92,7 @@  struct TCGCPUOps {
     /**
      * @debug_check_watchpoint: return true if the architectural
      * watchpoint whose address has matched should really fire, used by ARM
+     * and RISC-V
      */
     bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);