diff mbox series

[1/2] Consistent function names for sifive uart read and write function

Message ID 20210504153456.927083-2-lukas.juenger@greensocs.com
State New
Headers show
Series QOMify Sifive UART model | expand

Commit Message

Lukas Jünger May 4, 2021, 3:34 p.m. UTC
Signed-off-by: Lukas Jünger <lukas.juenger@greensocs.com>
---
 hw/char/sifive_uart.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

Comments

Alistair Francis May 6, 2021, 2:12 a.m. UTC | #1
On Wed, May 5, 2021 at 2:50 AM Lukas Jünger <lukas.juenger@greensocs.com> wrote:
>
> Signed-off-by: Lukas Jünger <lukas.juenger@greensocs.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/char/sifive_uart.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c
> index 3a00ba7f00..cb70374ead 100644
> --- a/hw/char/sifive_uart.c
> +++ b/hw/char/sifive_uart.c
> @@ -65,7 +65,7 @@ static void update_irq(SiFiveUARTState *s)
>  }
>
>  static uint64_t
> -uart_read(void *opaque, hwaddr addr, unsigned int size)
> +sifive_uart_read(void *opaque, hwaddr addr, unsigned int size)
>  {
>      SiFiveUARTState *s = opaque;
>      unsigned char r;
> @@ -101,8 +101,8 @@ uart_read(void *opaque, hwaddr addr, unsigned int size)
>  }
>
>  static void
> -uart_write(void *opaque, hwaddr addr,
> -           uint64_t val64, unsigned int size)
> +sifive_uart_write(void *opaque, hwaddr addr,
> +                  uint64_t val64, unsigned int size)
>  {
>      SiFiveUARTState *s = opaque;
>      uint32_t value = val64;
> @@ -131,9 +131,9 @@ uart_write(void *opaque, hwaddr addr,
>                    __func__, (int)addr, (int)value);
>  }
>
> -static const MemoryRegionOps uart_ops = {
> -    .read = uart_read,
> -    .write = uart_write,
> +static const MemoryRegionOps sifive_uart_ops = {
> +    .read = sifive_uart_read,
> +    .write = sifive_uart_write,
>      .endianness = DEVICE_NATIVE_ENDIAN,
>      .valid = {
>          .min_access_size = 4,
> @@ -187,7 +187,7 @@ SiFiveUARTState *sifive_uart_create(MemoryRegion *address_space, hwaddr base,
>      qemu_chr_fe_init(&s->chr, chr, &error_abort);
>      qemu_chr_fe_set_handlers(&s->chr, uart_can_rx, uart_rx, uart_event,
>          uart_be_change, s, NULL, true);
> -    memory_region_init_io(&s->mmio, NULL, &uart_ops, s,
> +    memory_region_init_io(&s->mmio, NULL, &sifive_uart_ops, s,
>                            TYPE_SIFIVE_UART, SIFIVE_UART_MAX);
>      memory_region_add_subregion(address_space, base, &s->mmio);
>      return s;
> --
> 2.30.2
>
>
Luc Michel May 11, 2021, 11:38 a.m. UTC | #2
On 5/4/21 5:34 PM, Lukas Jünger wrote:
> Signed-off-by: Lukas Jünger <lukas.juenger@greensocs.com>

Reviewed-by: Luc Michel <luc.michel@greensocs.com>

> ---
>   hw/char/sifive_uart.c | 14 +++++++-------
>   1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c
> index 3a00ba7f00..cb70374ead 100644
> --- a/hw/char/sifive_uart.c
> +++ b/hw/char/sifive_uart.c
> @@ -65,7 +65,7 @@ static void update_irq(SiFiveUARTState *s)
>   }
>   
>   static uint64_t
> -uart_read(void *opaque, hwaddr addr, unsigned int size)
> +sifive_uart_read(void *opaque, hwaddr addr, unsigned int size)
>   {
>       SiFiveUARTState *s = opaque;
>       unsigned char r;
> @@ -101,8 +101,8 @@ uart_read(void *opaque, hwaddr addr, unsigned int size)
>   }
>   
>   static void
> -uart_write(void *opaque, hwaddr addr,
> -           uint64_t val64, unsigned int size)
> +sifive_uart_write(void *opaque, hwaddr addr,
> +                  uint64_t val64, unsigned int size)
>   {
>       SiFiveUARTState *s = opaque;
>       uint32_t value = val64;
> @@ -131,9 +131,9 @@ uart_write(void *opaque, hwaddr addr,
>                     __func__, (int)addr, (int)value);
>   }
>   
> -static const MemoryRegionOps uart_ops = {
> -    .read = uart_read,
> -    .write = uart_write,
> +static const MemoryRegionOps sifive_uart_ops = {
> +    .read = sifive_uart_read,
> +    .write = sifive_uart_write,
>       .endianness = DEVICE_NATIVE_ENDIAN,
>       .valid = {
>           .min_access_size = 4,
> @@ -187,7 +187,7 @@ SiFiveUARTState *sifive_uart_create(MemoryRegion *address_space, hwaddr base,
>       qemu_chr_fe_init(&s->chr, chr, &error_abort);
>       qemu_chr_fe_set_handlers(&s->chr, uart_can_rx, uart_rx, uart_event,
>           uart_be_change, s, NULL, true);
> -    memory_region_init_io(&s->mmio, NULL, &uart_ops, s,
> +    memory_region_init_io(&s->mmio, NULL, &sifive_uart_ops, s,
>                             TYPE_SIFIVE_UART, SIFIVE_UART_MAX);
>       memory_region_add_subregion(address_space, base, &s->mmio);
>       return s;
>
Bin Meng May 11, 2021, 1:06 p.m. UTC | #3
Hi Lukas,

On Wed, May 5, 2021 at 12:49 AM Lukas Jünger
<lukas.juenger@greensocs.com> wrote:
>

While we are here, could we make other functions sifive_ prefixed?

Also the commit title should include a tag of "hw/char: sifive_uart"

> Signed-off-by: Lukas Jünger <lukas.juenger@greensocs.com>
> ---
>  hw/char/sifive_uart.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
>

Regards,
Bin
diff mbox series

Patch

diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c
index 3a00ba7f00..cb70374ead 100644
--- a/hw/char/sifive_uart.c
+++ b/hw/char/sifive_uart.c
@@ -65,7 +65,7 @@  static void update_irq(SiFiveUARTState *s)
 }
 
 static uint64_t
-uart_read(void *opaque, hwaddr addr, unsigned int size)
+sifive_uart_read(void *opaque, hwaddr addr, unsigned int size)
 {
     SiFiveUARTState *s = opaque;
     unsigned char r;
@@ -101,8 +101,8 @@  uart_read(void *opaque, hwaddr addr, unsigned int size)
 }
 
 static void
-uart_write(void *opaque, hwaddr addr,
-           uint64_t val64, unsigned int size)
+sifive_uart_write(void *opaque, hwaddr addr,
+                  uint64_t val64, unsigned int size)
 {
     SiFiveUARTState *s = opaque;
     uint32_t value = val64;
@@ -131,9 +131,9 @@  uart_write(void *opaque, hwaddr addr,
                   __func__, (int)addr, (int)value);
 }
 
-static const MemoryRegionOps uart_ops = {
-    .read = uart_read,
-    .write = uart_write,
+static const MemoryRegionOps sifive_uart_ops = {
+    .read = sifive_uart_read,
+    .write = sifive_uart_write,
     .endianness = DEVICE_NATIVE_ENDIAN,
     .valid = {
         .min_access_size = 4,
@@ -187,7 +187,7 @@  SiFiveUARTState *sifive_uart_create(MemoryRegion *address_space, hwaddr base,
     qemu_chr_fe_init(&s->chr, chr, &error_abort);
     qemu_chr_fe_set_handlers(&s->chr, uart_can_rx, uart_rx, uart_event,
         uart_be_change, s, NULL, true);
-    memory_region_init_io(&s->mmio, NULL, &uart_ops, s,
+    memory_region_init_io(&s->mmio, NULL, &sifive_uart_ops, s,
                           TYPE_SIFIVE_UART, SIFIVE_UART_MAX);
     memory_region_add_subregion(address_space, base, &s->mmio);
     return s;