diff mbox series

[55/62] AVX512FP16: Add expander for cstorehf4.

Message ID 20210701061648.9447-56-hongtao.liu@intel.com
State New
Headers show
Series Support all AVX512FP16 intrinsics. | expand

Commit Message

Liu, Hongtao July 1, 2021, 6:16 a.m. UTC 
gcc/ChangeLog:

	* config/i386/i386.md (cstore<mode>4): Extend from MODEF to
	MODEFH.

gcc/testsuite/ChangeLog:

	* gcc.target/i386/avx512fp16-builtin-fpcompare-1.c: New test.
	* gcc.target/i386/avx512fp16-builtin-fpcompare-2.c: New test.
---
 gcc/config/i386/i386.md                       |  4 +-
 .../i386/avx512fp16-builtin-fpcompare-1.c     | 40 +++++++++++++++++++
 .../i386/avx512fp16-builtin-fpcompare-2.c     | 29 ++++++++++++++
 3 files changed, 71 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-builtin-fpcompare-1.c
 create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-builtin-fpcompare-2.c
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 247a6e489ef..5f45c4ff583 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1524,8 +1524,8 @@  (define_expand "cbranch<mode>4"
 
 (define_expand "cstore<mode>4"
   [(set (reg:CC FLAGS_REG)
-	(compare:CC (match_operand:MODEF 2 "cmp_fp_expander_operand")
-		    (match_operand:MODEF 3 "cmp_fp_expander_operand")))
+	(compare:CC (match_operand:MODEFH 2 "cmp_fp_expander_operand")
+		    (match_operand:MODEFH 3 "cmp_fp_expander_operand")))
    (set (match_operand:QI 0 "register_operand")
               (match_operator 1 "ix86_fp_comparison_operator"
                [(reg:CC FLAGS_REG)
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-fpcompare-1.c b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-fpcompare-1.c
new file mode 100644
index 00000000000..62115f15f30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-fpcompare-1.c
@@ -0,0 +1,40 @@ 
+/* { dg-do compile } */
+/* { dg-options "-Ofast -mavx512fp16" } */
+
+int
+f1 (_Float16 x, _Float16 y)
+{
+  return x > y;
+}
+
+int
+f2 (_Float16 x, _Float16 y)
+{
+  return x < y;
+}
+
+/* { dg-final { scan-assembler-times "seta" 2 } } */
+
+int
+f3 (_Float16 x, _Float16 y)
+{
+  return x >= y;
+}
+
+int
+f4 (_Float16 x, _Float16 y)
+{
+  return x <= y;
+}
+
+/* { dg-final { scan-assembler-times "setnb" 2 } } */
+
+int
+f5 (_Float16 x, _Float16 y)
+{
+  return __builtin_isunordered (x, y);
+}
+
+/* { dg-final { scan-assembler-not "vcvtsh2s\[sd\]" } }  */
+/* { dg-final { scan-assembler-times "xorl" 5 } } */
+/* { dg-final { scan-assembler-times "vcomish\[^\n\r\]*xmm\[0-9\]" 4 } } */
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-fpcompare-2.c b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-fpcompare-2.c
new file mode 100644
index 00000000000..150c351e784
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-builtin-fpcompare-2.c
@@ -0,0 +1,29 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -mfpmath=sse -mavx512fp16" } */
+
+int
+foo (_Float16 y)
+{
+  return __builtin_isinf (y);
+}
+
+int
+foo2 (_Float16 y)
+{
+  return __builtin_isfinite (y);
+}
+
+int
+foo3 (_Float16 y)
+{
+  return __builtin_signbit(y);
+}
+
+int
+foo4 (_Float16 y)
+{
+  return __builtin_isnormal (y);
+}
+
+/* { dg-final { scan-assembler-not "vcvtsh2s\[sd\]" } }  */
+/* { dg-final { scan-assembler-times "vucomish\[^\n\r\]*xmm\[0-9\]" 4 } } */