@@ -26,23 +26,27 @@ typedef union
__m512 zmm;
__m512h zmmh;
__m512i zmmi;
+ __m512d zmmd;
__m256 ymm[2];
__m256h ymmh[2];
__m256i ymmi[2];
+ __m256d ymmd[2];
__m128h xmmh[4];
__m128 xmm[4];
__m128i xmmi[4];
+ __m128d xmmd[4];
unsigned short u16[32];
unsigned int u32[16];
int i32[16];
long long s64[8];
unsigned long long u64[8];
+ double f64[8];
float f32[16];
_Float16 f16[32];
} V512;
/* Global variables. */
-V512 src1, src2, src3;
+V512 src1, src2, src3, src3f;
int n_errs = 0;
/* Helper function for packing/unpacking ph operands. */
@@ -167,12 +171,16 @@ init_src()
int i;
for (i = 0; i < AVX512F_MAX_ELEM; i++) {
- v1.f32[i] = i + 1;
- v2.f32[i] = i * 0.5f;
- v3.f32[i] = i * 1.5f;
- v4.f32[i] = i - 0.5f;
+ v1.f32[i] = i + 1;
+ v2.f32[i] = i * 0.5f;
+ v3.f32[i] = i * 1.5f;
+ v4.f32[i] = i - 0.5f;
- src3.u32[i] = (i + 1) * 10;
+ src3.u32[i] = (i + 1) * 10;
+ }
+
+ for (i = 0; i < 8; i++) {
+ src3f.f64[i] = (i + 1) * 7.5;
}
src1 = pack_twops_2ph(v1, v2);
@@ -223,6 +231,7 @@ init_dest(V512 * res, V512 * exp)
#undef HF
#undef SF
#undef SI
+#undef DF
#undef H_HF
#undef NET_MASK
#undef MASK_VALUE
@@ -235,10 +244,12 @@ init_dest(V512 * res, V512 * exp)
#define HF(x) x.ymmh[0]
#define H_HF(x) x.xmmh[0]
#define SF(x) x.ymm[0]
+#define DF(x) x.ymmd[0]
#define SI(x) x.ymmi[0]
#elif AVX512F_LEN == 128
#undef HF
#undef SF
+#undef DF
#undef SI
#undef H_HF
#undef NET_MASK
@@ -251,6 +262,7 @@ init_dest(V512 * res, V512 * exp)
#define ZMASK_VALUE 0xc1
#define HF(x) x.xmmh[0]
#define SF(x) x.xmm[0]
+#define DF(x) x.xmmd[0]
#define SI(x) x.xmmi[0]
#define H_HF(x) x.xmmh[0]
#else
@@ -260,6 +272,7 @@ init_dest(V512 * res, V512 * exp)
#define HALF_MASK 0xcccc
#define HF(x) x.zmmh
#define SF(x) x.zmm
+#define DF(x) x.zmmd
#define SI(x) x.zmmi
#define H_HF(x) x.ymmh[0]
#endif
new file mode 100644
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtpd2phz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2phz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2phz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res, res1, res2;
+volatile __m512d x1, x2, x3;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+ res = _mm512_cvtpd_ph (x1);
+ res1 = _mm512_mask_cvtpd_ph (res, m8, x2);
+ res2 = _mm512_maskz_cvtpd_ph (m8, x3);
+ res = _mm512_cvt_roundpd_ph (x1, 4);
+ res1 = _mm512_mask_cvt_roundpd_ph (res, m8, x2, 8);
+ res2 = _mm512_maskz_cvt_roundpd_ph (m8, x3, 11);
+}
new file mode 100644
@@ -0,0 +1,82 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 64)
+
+void NOINLINE
+EMULATE(cvtpd2_ph) (V512 * dest, V512 op1, int n_el,
+ __mmask32 k, int zero_mask)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+ __mmask16 m1, m2;
+
+ m1 = k & 0xffff;
+ unpack_ph_2twops(*dest, &v7, &v8);
+
+ for (i = 0; i < n_el; i++) {
+ if (((1 << i) & m1) == 0) {
+ if (zero_mask) {
+ v5.f32[i] = 0;
+ }
+ else {
+ v5.u32[i] = v7.u32[i];
+ }
+ }
+ else {
+ v5.f32[i] = op1.f64[i];
+ }
+ }
+ *dest = pack_twops_2ph(v5, v5);
+ for (i = n_el; i < 8; i++)
+ dest->u16[i] = 0;
+}
+
+void
+TEST (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, NET_MASK, 0);
+ res.xmmh[0] = INTRINSIC (_cvtpd_ph) (DF(src3f));
+ CHECK_RESULT (&res, &exp, 8, _cvtpd_ph);
+
+ init_dest(&res, &exp);
+ EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, 0xcc, 0);
+ res.xmmh[0] = INTRINSIC (_mask_cvtpd_ph) (res.xmmh[0], 0xcc,
+ DF(src3f));
+ CHECK_RESULT (&res, &exp, 8, _mask_cvtpd_ph);
+
+ EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, 0xf1, 1);
+ res.xmmh[0] = INTRINSIC (_maskz_cvtpd_ph) (0xf1, DF(src3f));
+ CHECK_RESULT (&res, &exp, 8, _maskz_cvtpd_ph);
+
+#if AVX512F_LEN == 512
+ EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, NET_MASK, 0);
+ res.xmmh[0] = INTRINSIC (_cvt_roundpd_ph) (DF(src3f), _ROUND_NINT);
+ CHECK_RESULT (&res, &exp, 8, _cvt_roundpd_ph);
+
+ init_dest(&res, &exp);
+ EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, 0xcc, 0);
+ res.xmmh[0] = INTRINSIC (_mask_cvt_roundpd_ph) (res.xmmh[0], 0xcc,
+ DF(src3f), _ROUND_NINT);
+ CHECK_RESULT (&res, &exp, 8, _mask_cvt_roundpd_ph);
+
+ EMULATE(cvtpd2_ph)(&exp, src3f, N_ELEMS, 0xf1, 1);
+ res.xmmh[0] = INTRINSIC (_maskz_cvt_roundpd_ph) (0xf1, DF(src3f), _ROUND_NINT);
+ CHECK_RESULT (&res, &exp, 8, _maskz_cvt_roundpd_ph);
+#endif
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
+
new file mode 100644
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\{sae\}\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512d res, res1, res2;
+volatile __m128h x1, x2, x3;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+ res = _mm512_cvtph_pd (x1);
+ res1 = _mm512_mask_cvtph_pd (res, m8, x2);
+ res2 = _mm512_maskz_cvtph_pd (m8, x3);
+ res = _mm512_cvt_roundph_pd (x1, 4);
+ res1 = _mm512_mask_cvt_roundph_pd (res, m8, x2, 8);
+ res2 = _mm512_maskz_cvt_roundph_pd (m8, x3, 8);
+}
new file mode 100644
@@ -0,0 +1,78 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 16)
+
+void NOINLINE
+EMULATE(cvtph2_pd) (V512 * dest, V512 op1,
+ __mmask32 k, int zero_mask)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+ __mmask16 m1, m2;
+
+ m1 = k & 0xffff;
+ unpack_ph_2twops(op1, &v1, &v2);
+
+ for (i = 0; i < 8; i++) {
+ if (((1 << i) & m1) == 0) {
+ if (zero_mask) {
+ v5.u64[i] = 0;
+ }
+ else {
+ v5.u64[i] = dest->u64[i];
+ }
+ }
+ else {
+ v5.f64[i] = v1.f32[i];
+ }
+ }
+
+ *dest = v5;
+}
+
+void
+TEST (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ EMULATE(cvtph2_pd)(&exp, src1, NET_MASK, 0);
+ DF(res) = INTRINSIC (_cvtph_pd) (src1.xmmh[0]);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _cvtph_pd);
+
+ init_dest(&res, &exp);
+ EMULATE(cvtph2_pd)(&exp, src1, 0xcc, 0);
+ DF(res) = INTRINSIC (_mask_cvtph_pd) (DF(res), 0xcc, src1.xmmh[0]);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _mask_cvtph_pd);
+
+ EMULATE(cvtph2_pd)(&exp, src1, 0xc1, 1);
+ DF(res) = INTRINSIC (_maskz_cvtph_pd) (0xc1, src1.xmmh[0]);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_cvtph_pd);
+
+#if AVX512F_LEN == 512
+ EMULATE(cvtph2_pd)(&exp, src1, NET_MASK, 0);
+ DF(res) = INTRINSIC (_cvt_roundph_pd) (src1.xmmh[0], _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _cvt_roundph_pd);
+
+ init_dest(&res, &exp);
+ EMULATE(cvtph2_pd)(&exp, src1, 0xcc, 0);
+ DF(res) = INTRINSIC (_mask_cvt_roundph_pd) (DF(res), 0xcc, src1.xmmh[0], _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _mask_cvt_roundph_pd);
+
+ EMULATE(cvtph2_pd)(&exp, src1, 0xc1, 1);
+ DF(res) = INTRINSIC (_maskz_cvt_roundph_pd) (0xc1, src1.xmmh[0], _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_cvt_roundph_pd);
+#endif
+
+ if (n_errs != 0) {
+ abort ();
+}
+}
+
new file mode 100644
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\{sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512 res, res1, res2;
+volatile __m256h x1, x2, x3;
+volatile __mmask16 m16;
+
+void extern
+avx512f_test (void)
+{
+ res = _mm512_cvtxph_ps (x1);
+ res1 = _mm512_mask_cvtxph_ps (res, m16, x2);
+ res2 = _mm512_maskz_cvtxph_ps (m16, x3);
+ res = _mm512_cvtx_roundph_ps (x1, 4);
+ res1 = _mm512_mask_cvtx_roundph_ps (res, m16, x2, 8);
+ res2 = _mm512_maskz_cvtx_roundph_ps (m16, x3, 8);
+}
new file mode 100644
@@ -0,0 +1,81 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 32)
+#define CHECK_ELEMS (AVX512F_LEN / 16)
+
+void NOINLINE
+EMULATE(cvtxph2_ps) (V512 * dest, V512 op1, int n_el,
+ __mmask32 k, int zero_mask)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+ __mmask16 m1, m2;
+
+ m1 = k & 0xffff;
+ unpack_ph_2twops(op1, &v1, &v2);
+
+ for (i = 0; i < n_el; i++) {
+ if (((1 << i) & m1) == 0) {
+ if (zero_mask) {
+ v5.u32[i] = 0;
+ }
+ else {
+ v5.u32[i] = dest->u32[i];
+ }
+ }
+ else {
+ v5.f32[i] = v1.f32[i];
+ }
+ }
+
+ for (i = n_el; i < 16; i++)
+ v5.u32[i] = 0;
+
+ *dest = v5;
+}
+
+void
+TEST (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xffff, 0);
+ SF(res) = INTRINSIC (_cvtxph_ps) (H_HF(src1));
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _cvtxph_ps);
+
+ init_dest(&res, &exp);
+ EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xcc, 0);
+ SF(res) = INTRINSIC (_mask_cvtxph_ps) (SF(res), 0xcc, H_HF(src1));
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _mask_cvtxph_ps);
+
+ EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xc1, 1);
+ SF(res) = INTRINSIC (_maskz_cvtxph_ps) (0xc1, H_HF(src1));
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _maskz_cvtxph_ps);
+
+#if AVX512F_LEN == 512
+ EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xffff, 0);
+ SF(res) = INTRINSIC (_cvtx_roundph_ps) (H_HF(src1), _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _cvtx_roundph_ps);
+
+ init_dest(&res, &exp);
+ EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xcc, 0);
+ SF(res) = INTRINSIC (_mask_cvtx_roundph_ps) (SF(res), 0xcc, H_HF(src1), _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _mask_cvtx_roundph_ps);
+
+ EMULATE(cvtxph2_ps)(&exp, src1, N_ELEMS, 0xc1, 1);
+ SF(res) = INTRINSIC (_maskz_cvtx_roundph_ps) (0xc1, H_HF(src1), _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _maskz_cvtx_roundph_ps);
+#endif
+
+ if (n_errs != 0)
+ abort ();
+}
+
new file mode 100644
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 2 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\{\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\{rn-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phx\[ \\t\]+\{rz-sae\}\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256h res, res1, res2;
+volatile __m512 x1, x2, x3;
+volatile __mmask16 m16;
+
+void extern
+avx512f_test (void)
+{
+ res = _mm512_cvtxps_ph (x1);
+ res1 = _mm512_mask_cvtxps_ph (res, m16, x2);
+ res2 = _mm512_maskz_cvtxps_ph (m16, x3);
+ res = _mm512_cvtx_roundps_ph (x1, 4);
+ res1 = _mm512_mask_cvtx_roundps_ph (res, m16, x2, 8);
+ res2 = _mm512_maskz_cvtx_roundps_ph (m16, x3, 11);
+}
new file mode 100644
@@ -0,0 +1,84 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 32)
+#define CHECK_ELEMS (AVX512F_LEN_HALF / 16)
+
+void NOINLINE
+EMULATE(cvtxps2_ph) (V512 * dest, V512 op1, int n_el,
+ __mmask32 k, int zero_mask)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+ __mmask16 m1, m2;
+
+ m1 = k & 0xffff;
+
+ unpack_ph_2twops(*dest, &v7, &v8);
+
+ for (i = 0; i < n_el; i++) {
+ if (((1 << i) & m1) == 0) {
+ if (zero_mask) {
+ v5.f32[i] = 0;
+ }
+ else {
+ v5.u32[i] = v7.u32[i];
+ }
+ }
+ else {
+ v5.f32[i] = op1.f32[i];
+ }
+ }
+ *dest = pack_twops_2ph(v5, v5);
+ for (i = n_el; i < 16; i++)
+ dest->u16[i] = 0;
+}
+
+void
+TEST (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, NET_MASK, 0);
+ H_HF(res) = INTRINSIC (_cvtxps_ph) (SF(src3f));
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _cvtxps_ph);
+
+ init_dest(&res, &exp);
+ EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, 0xcc, 0);
+ H_HF(res) = INTRINSIC (_mask_cvtxps_ph) (H_HF(res), 0xcc,
+ SF(src3f));
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _mask_cvtxps_ph);
+
+ EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, 0xf1, 1);
+ H_HF(res) = INTRINSIC (_maskz_cvtxps_ph) (0xf1, SF(src3f));
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _maskz_cvtxps_ph);
+
+#if AVX512F_LEN == 512
+ EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, NET_MASK, 0);
+ H_HF(res) = INTRINSIC (_cvtx_roundps_ph) (SF(src3f), _ROUND_NINT);
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _cvtx_roundps_ph);
+
+ init_dest(&res, &exp);
+ EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, 0xcc, 0);
+ H_HF(res) = INTRINSIC (_mask_cvtx_roundps_ph) (H_HF(res), 0xcc,
+ SF(src3f), _ROUND_NINT);
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _mask_cvtx_roundps_ph);
+
+ EMULATE(cvtxps2_ph)(&exp, src3f, N_ELEMS, 0xf1, 1);
+ H_HF(res) = INTRINSIC (_maskz_cvtx_roundps_ph) (0xf1, SF(src3f), _ROUND_NINT);
+ CHECK_RESULT (&res, &exp, CHECK_ELEMS, _maskz_cvtx_roundps_ph);
+#endif
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
+
new file mode 100644
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
+/* { dg-final { scan-assembler-times "vcvtpd2phy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2phy\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2phy\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2phx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2phx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2phx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res3;
+volatile __m256d x2;
+volatile __m128d x3;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+ res3 = _mm256_cvtpd_ph (x2);
+ res3 = _mm256_mask_cvtpd_ph (res3, m16, x2);
+ res3 = _mm256_maskz_cvtpd_ph (m16, x2);
+
+ res3 = _mm_cvtpd_ph (x3);
+ res3 = _mm_mask_cvtpd_ph (res3, m8, x3);
+ res3 = _mm_maskz_cvtpd_ph (m8, x3);
+}
new file mode 100644
@@ -0,0 +1,15 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define AVX512VL
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vcvtpd2ph-1b.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vcvtpd2ph-1b.c"
+
new file mode 100644
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2pd\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256d res1;
+volatile __m128d res2;
+volatile __m128h x3;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+ res1 = _mm256_cvtph_pd (x3);
+ res1 = _mm256_mask_cvtph_pd (res1, m8, x3);
+ res1 = _mm256_maskz_cvtph_pd (m8, x3);
+
+ res2 = _mm_cvtph_pd (x3);
+ res2 = _mm_mask_cvtph_pd (res2, m8, x3);
+ res2 = _mm_maskz_cvtph_pd (m8, x3);
+}
new file mode 100644
@@ -0,0 +1,15 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define AVX512VL
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vcvtph2pd-1b.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vcvtph2pd-1b.c"
+
new file mode 100644
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtph2psx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256 res1;
+volatile __m128 res2;
+volatile __m128h x3;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+ res1 = _mm256_cvtxph_ps (x3);
+ res1 = _mm256_mask_cvtxph_ps (res1, m8, x3);
+ res1 = _mm256_maskz_cvtxph_ps (m8, x3);
+
+ res2 = _mm_cvtxph_ps (x3);
+ res2 = _mm_mask_cvtxph_ps (res2, m8, x3);
+ res2 = _mm_maskz_cvtxph_ps (m8, x3);
+}
new file mode 100644
@@ -0,0 +1,15 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define AVX512VL
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vcvtph2psx-1b.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vcvtph2psx-1b.c"
+
new file mode 100644
@@ -0,0 +1,27 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
+/* { dg-final { scan-assembler-times "vcvtps2phxy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phxy\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phxy\[ \\t\]+%ymm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phxx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phxx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtps2phxx\[ \\t\]+%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h res3;
+volatile __m256 x2;
+volatile __m128 x3;
+volatile __mmask8 m8;
+
+void extern
+avx512f_test (void)
+{
+ res3 = _mm256_cvtxps_ph (x2);
+ res3 = _mm256_mask_cvtxps_ph (res3, m8, x2);
+ res3 = _mm256_maskz_cvtxps_ph (m8, x2);
+
+ res3 = _mm_cvtxps_ph (x3);
+ res3 = _mm_mask_cvtxps_ph (res3, m8, x3);
+ res3 = _mm_maskz_cvtxps_ph (m8, x3);
+}
new file mode 100644
@@ -0,0 +1,15 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define AVX512VL
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vcvtps2ph-1b.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vcvtps2ph-1b.c"
+