| Message ID | 20190722055621.23526-8-sshivamurthy@micron.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Miquel Raynal |
| Headers | show |
| Series | Introduce generic ONFI support | expand |
Hi Shiva, shiva.linuxworks@gmail.com wrote on Mon, 22 Jul 2019 07:56:20 +0200: > From: Shivamurthy Shastri <sshivamurthy@micron.com> > > M70A series flashes by default enable continuous read feature (BIT0 in > configuration register). This feature will not expose the ECC to host > and causing read failure. This is not readable enough, can you rephrase? Besides that you can add my Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> > > Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com> > --- > drivers/mtd/nand/spi/micron.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c > index 6fde93ec23a1..1e28ea3d1362 100644 > --- a/drivers/mtd/nand/spi/micron.c > +++ b/drivers/mtd/nand/spi/micron.c > @@ -127,6 +127,15 @@ static int micron_spinand_detect(struct spinand_device *spinand) > return 1; > } > > +static int micron_spinand_init(struct spinand_device *spinand) > +{ > + /* > + * Some of the Micron flashes enable this BIT by default, > + * and there is a chance of read failure due to this. > + */ > + return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE, 0); > +} > + > static void micron_fixup_param_page(struct spinand_device *spinand, > struct nand_onfi_params *p) > { > @@ -150,6 +159,7 @@ static void micron_fixup_param_page(struct spinand_device *spinand, > > static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = { > .detect = micron_spinand_detect, > + .init = micron_spinand_init, > .fixup_param_page = micron_fixup_param_page, > }; > Thanks, Miquèl
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c index 6fde93ec23a1..1e28ea3d1362 100644 --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c @@ -127,6 +127,15 @@ static int micron_spinand_detect(struct spinand_device *spinand) return 1; } +static int micron_spinand_init(struct spinand_device *spinand) +{ + /* + * Some of the Micron flashes enable this BIT by default, + * and there is a chance of read failure due to this. + */ + return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE, 0); +} + static void micron_fixup_param_page(struct spinand_device *spinand, struct nand_onfi_params *p) { @@ -150,6 +159,7 @@ static void micron_fixup_param_page(struct spinand_device *spinand, static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = { .detect = micron_spinand_detect, + .init = micron_spinand_init, .fixup_param_page = micron_fixup_param_page, };