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[178.15.117.54]) by smtp.gmail.com with ESMTPSA id a6sm10351725eds.19.2019.07.21.22.57.11 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Sun, 21 Jul 2019 22:57:13 -0700 (PDT) From: shiva.linuxworks@gmail.com X-Google-Original-From: sshivamurthy@micron.com To: Miquel Raynal , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Vignesh Raghavendra , Boris Brezillon , Marcel Ziswiler , Frieder Schrempf , Shivamurthy Shastri , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Jeff Kletsky , Chuanhong Guo , liaoweixiong Subject: [PATCH 7/8] mtd: spinand: micron: Fix read failure in Micron M70A flashes Date: Mon, 22 Jul 2019 07:56:20 +0200 Message-Id: <20190722055621.23526-8-sshivamurthy@micron.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190722055621.23526-1-sshivamurthy@micron.com> References: <20190722055621.23526-1-sshivamurthy@micron.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190721_225715_339423_14D9266F X-CRM114-Status: GOOD ( 12.74 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:542 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (shiva.linuxworks[at]gmail.com) -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org From: Shivamurthy Shastri M70A series flashes by default enable continuous read feature (BIT0 in configuration register). This feature will not expose the ECC to host and causing read failure. Signed-off-by: Shivamurthy Shastri Reviewed-by: Miquel Raynal --- drivers/mtd/nand/spi/micron.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c index 6fde93ec23a1..1e28ea3d1362 100644 --- a/drivers/mtd/nand/spi/micron.c +++ b/drivers/mtd/nand/spi/micron.c @@ -127,6 +127,15 @@ static int micron_spinand_detect(struct spinand_device *spinand) return 1; } +static int micron_spinand_init(struct spinand_device *spinand) +{ + /* + * Some of the Micron flashes enable this BIT by default, + * and there is a chance of read failure due to this. + */ + return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE, 0); +} + static void micron_fixup_param_page(struct spinand_device *spinand, struct nand_onfi_params *p) { @@ -150,6 +159,7 @@ static void micron_fixup_param_page(struct spinand_device *spinand, static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = { .detect = micron_spinand_detect, + .init = micron_spinand_init, .fixup_param_page = micron_fixup_param_page, };