Message ID | 1296262841-8819-4-git-send-email-mspang@csclub.uwaterloo.ca |
---|---|
State | Superseded, archived |
Headers | show |
Le 29/01/2011 02:00, Michael Spang a écrit : > For the TS-7800, the FPGA contains a bootloader which handles > the SDRAM initialization and loads a bootloader from RAM. We > should not try to initialize RAM again while running from it. > > Signed-off-by: Michael Spang<mspang@csclub.uwaterloo.ca> > --- > arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S > index 0523bd4..37d7d14 100644 > --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S > +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S > @@ -86,6 +86,8 @@ > > lowlevel_init: > > +#ifndef CONFIG_SKIP_SDRAM_INIT > + > /* Use 'r4 as the base for internal register accesses */ > ldr r4, =ORION5X_REGS_PHY_BASE > > @@ -289,5 +291,7 @@ lowlevel_init: > orr r2, r2, r6 > str r2, [r3, #0x484] > > +#endif > + > /* Return to U-boot via saved link register */ > mov pc, lr That's basically making lowlevel_init empty, so I would prefer that you put #ifdef/#endif around the call to lowlevel_init in start.S and modify the orion5x Makefile to include lowlevel_init.S only if CONFIG_SKIP_DRAM_INIT is not defined. (come to think of it, CONFIG_SKIP_LOWLEVEL_INIT is a bit of a misnomer since it actually skips not only lowlevelinit but also cpu_init_crit. Possibly one could even go as far as renaming CONFIG_SKIP_LOWLEVEL_INIT to CONFIG_SKIP_CPU_INIT_CRIT, and then reuse CONFIG_SKIP_LOWLEVEL_INIT for lowlevel_init; but that can be a separate patch, with a nifty doc update.) Amicalement,
On Sat, Jan 29, 2011 at 2:36 AM, Albert ARIBAUD <albert.aribaud@free.fr> wrote: > Le 29/01/2011 02:00, Michael Spang a écrit : >> >> For the TS-7800, the FPGA contains a bootloader which handles >> the SDRAM initialization and loads a bootloader from RAM. We >> should not try to initialize RAM again while running from it. >> >> Signed-off-by: Michael Spang<mspang@csclub.uwaterloo.ca> >> --- >> arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | 4 ++++ >> 1 files changed, 4 insertions(+), 0 deletions(-) >> >> diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S >> b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S >> index 0523bd4..37d7d14 100644 >> --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S >> +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S >> @@ -86,6 +86,8 @@ >> >> lowlevel_init: >> >> +#ifndef CONFIG_SKIP_SDRAM_INIT >> + >> /* Use 'r4 as the base for internal register accesses */ >> ldr r4, =ORION5X_REGS_PHY_BASE >> >> @@ -289,5 +291,7 @@ lowlevel_init: >> orr r2, r2, r6 >> str r2, [r3, #0x484] >> >> +#endif >> + >> /* Return to U-boot via saved link register */ >> mov pc, lr > > That's basically making lowlevel_init empty, so I would prefer that you put > #ifdef/#endif around the call to lowlevel_init in start.S and modify the > orion5x Makefile to include lowlevel_init.S only if CONFIG_SKIP_DRAM_INIT is > not defined. > > (come to think of it, CONFIG_SKIP_LOWLEVEL_INIT is a bit of a misnomer since > it actually skips not only lowlevelinit but also cpu_init_crit. Possibly one > could even go as far as renaming CONFIG_SKIP_LOWLEVEL_INIT to > CONFIG_SKIP_CPU_INIT_CRIT, and then reuse CONFIG_SKIP_LOWLEVEL_INIT for > lowlevel_init; but that can be a separate patch, with a nifty doc update.) I've done the latter change. I thought about moving the call to lowlevel_init outside of cpu_init_crit, but I doubt it is useful to do board-specific initialization without also initializing the CPU. I've also removed the annotation that CONFIG_SKIP_LOWLEVEL_INIT option is ARM-only, because there is one mips board (vct) that uses this option. Michael
diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S index 0523bd4..37d7d14 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S @@ -86,6 +86,8 @@ lowlevel_init: +#ifndef CONFIG_SKIP_SDRAM_INIT + /* Use 'r4 as the base for internal register accesses */ ldr r4, =ORION5X_REGS_PHY_BASE @@ -289,5 +291,7 @@ lowlevel_init: orr r2, r2, r6 str r2, [r3, #0x484] +#endif + /* Return to U-boot via saved link register */ mov pc, lr
For the TS-7800, the FPGA contains a bootloader which handles the SDRAM initialization and loads a bootloader from RAM. We should not try to initialize RAM again while running from it. Signed-off-by: Michael Spang <mspang@csclub.uwaterloo.ca> --- arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)