diff mbox series

[ovs-dev] windows: Fix x64 build

Message ID 20180110172752.10652-1-aserdean@ovn.org
State Accepted
Headers show
Series [ovs-dev] windows: Fix x64 build | expand

Commit Message

Alin-Gabriel Serdean Jan. 10, 2018, 5:27 p.m. UTC
MSVC complains:
error C4013: 'atomic_storeX' undefined; assuming extern returning int

atomic_storeX - is no longer defined. This patch adds back its implementation.

Signed-off-by: Alin Gabriel Serdean <aserdean@ovn.org>
---
 lib/ovs-atomic-msvc.h | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

Comments

Ben Pfaff Jan. 10, 2018, 5:30 p.m. UTC | #1
On Wed, Jan 10, 2018 at 07:27:52PM +0200, Alin Gabriel Serdean wrote:
> MSVC complains:
> error C4013: 'atomic_storeX' undefined; assuming extern returning int
> 
> atomic_storeX - is no longer defined. This patch adds back its implementation.
> 
> Signed-off-by: Alin Gabriel Serdean <aserdean@ovn.org>

You might want to add a Fixes: tag.

Acked-by: Ben Pfaff <blp@ovn.org>
Alin-Gabriel Serdean Jan. 10, 2018, 6:41 p.m. UTC | #2
> -----Original Message-----
> From: Ben Pfaff [mailto:blp@ovn.org]
> Sent: Wednesday, January 10, 2018 7:30 PM
> To: Alin Gabriel Serdean <aserdean@ovn.org>
> Cc: dev@openvswitch.org
> Subject: Re: [ovs-dev] [PATCH] windows: Fix x64 build
> 
> On Wed, Jan 10, 2018 at 07:27:52PM +0200, Alin Gabriel Serdean wrote:
> > MSVC complains:
> > error C4013: 'atomic_storeX' undefined; assuming extern returning int
> >
> > atomic_storeX - is no longer defined. This patch adds back its
> implementation.
> >
> > Signed-off-by: Alin Gabriel Serdean <aserdean@ovn.org>
> 
> You might want to add a Fixes: tag.
> 
> Acked-by: Ben Pfaff <blp@ovn.org>
[Alin Serdean] Thanks for the quick review. I changed the tag and applied on
master.
diff mbox series

Patch

diff --git a/lib/ovs-atomic-msvc.h b/lib/ovs-atomic-msvc.h
index 6727d2c..9def887 100644
--- a/lib/ovs-atomic-msvc.h
+++ b/lib/ovs-atomic-msvc.h
@@ -124,8 +124,13 @@  atomic_signal_fence(memory_order order)
     }
 #elif _M_X64
 /* 64 bit writes are atomic on amd64 if 64 bit aligned. */
-#define atomic_store64(DST, SRC, ORDER)                                 \
-    atomic_storeX(64, DST, SRC, ORDER)
+#define atomic_store64(DST, SRC, ORDER)                                    \
+    if (ORDER == memory_order_seq_cst) {                                   \
+        InterlockedExchange64((int64_t volatile *) (DST),                  \
+                               (int64_t) (SRC));                           \
+    } else {                                                               \
+        *(DST) = (SRC);                                                    \
+    }
 #endif
 
 #define atomic_store8(DST, SRC, ORDER)                                     \