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[0/7,SRU,OEM-5.6] Support WD19TB external output on TGL platform

Message ID 20200703101031.99125-1-shane.lin@canonical.com
Headers show
Series Support WD19TB external output on TGL platform | expand

Message

Hsuan-Yu Lin July 3, 2020, 10:10 a.m. UTC
BugLink: https://bugs.launchpad.net/bugs/1886165

[Impact]
TGL platform can't output external monitor on WD19TB docking.
There's no screen on the external monitor.
error in dmesg:

[drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underru

[Fix]
According to Intel's suggestion,
we need this: https://patchwork.freedesktop.org/series/78909/
Also for dependency, the following patches are landed in drm-tip
and necessary for support TGL platform:

* commit f4ece33f51d8 ("drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock")
* commit a6e96d6948c8 ("drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders")
* commit f822a79734e1 ("drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed")
* commit 1a7e82efaa8a ("drm/i915/tgl: Add HBR and HBR2+ voltage swing table")
* commit 80907edcc6ed ("UBUNTU: SAUCE: drm/i915/bios: add intel_bios_hdmi_level_shift()")
* commit 6df896896c8d ("drm/i915/tgl: Implement WA_16011163337")
* commit cb730fe971f0 ("drm/i915/tgl: Update TC DP vswing table")

[Test]
The WD19TB can output HDMI/DP to external monitor.

[Regression Potential]
Medium, in order to support TGL platform, we also include two patches:
drm/i915/bios: add intel_bios_hdmi_level_shift()
drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed
The two patches are not related to TGL, but for dependency.

Clint Taylor (1):
  drm/i915/tgl: Implement WA_16011163337

Imre Deak (2):
  drm/i915/tgl+: Use the correct DP_TP_* register instances in MST
    encoders
  drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock

Jani Nikula (1):
  UBUNTU: SAUCE: drm/i915/bios: add intel_bios_hdmi_level_shift()

José Roberto de Souza (3):
  drm/i915/tgl: Update TC DP vswing table
  drm/i915/tgl: Add HBR and HBR2+ voltage swing table
  drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed

 drivers/gpu/drm/i915/display/intel_bios.c     |  16 ++
 drivers/gpu/drm/i915/display/intel_bios.h     |   2 +
 drivers/gpu/drm/i915/display/intel_ddi.c      | 169 +++++++-----------
 drivers/gpu/drm/i915/display/intel_display.c  |   1 -
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  13 +-
 drivers/gpu/drm/i915/display/intel_psr.c      |  45 +++++
 drivers/gpu/drm/i915/gt/intel_workarounds.c   |  11 +-
 drivers/gpu/drm/i915/i915_reg.h               |   2 +
 8 files changed, 144 insertions(+), 115 deletions(-)

Comments

Timo Aaltonen July 8, 2020, 5:43 a.m. UTC | #1
On 3.7.2020 13.10, Hsuan-Yu Lin wrote:
> BugLink: https://bugs.launchpad.net/bugs/1886165
> 
> [Impact]
> TGL platform can't output external monitor on WD19TB docking.
> There's no screen on the external monitor.
> error in dmesg:
> 
> [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underru
> 
> [Fix]
> According to Intel's suggestion,
> we need this: https://patchwork.freedesktop.org/series/78909/
> Also for dependency, the following patches are landed in drm-tip
> and necessary for support TGL platform:
> 
> * commit f4ece33f51d8 ("drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock")
> * commit a6e96d6948c8 ("drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders")
> * commit f822a79734e1 ("drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed")
> * commit 1a7e82efaa8a ("drm/i915/tgl: Add HBR and HBR2+ voltage swing table")
> * commit 80907edcc6ed ("UBUNTU: SAUCE: drm/i915/bios: add intel_bios_hdmi_level_shift()")
> * commit 6df896896c8d ("drm/i915/tgl: Implement WA_16011163337")
> * commit cb730fe971f0 ("drm/i915/tgl: Update TC DP vswing table")

Applied to oem-5.6-next, thanks

We need to add this to groovy kernel too, at least once it's mainline.
Juerg Haefliger July 8, 2020, 10:05 a.m. UTC | #2
The subject does not call out the series. Focal? Bionic? Something else?

...Juerg


> BugLink: https://bugs.launchpad.net/bugs/1886165
> 
> [Impact]
> TGL platform can't output external monitor on WD19TB docking.
> There's no screen on the external monitor.
> error in dmesg:
> 
> [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underru
> 
> [Fix]
> According to Intel's suggestion,
> we need this: https://patchwork.freedesktop.org/series/78909/
> Also for dependency, the following patches are landed in drm-tip
> and necessary for support TGL platform:
> 
> * commit f4ece33f51d8 ("drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock")
> * commit a6e96d6948c8 ("drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders")
> * commit f822a79734e1 ("drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed")
> * commit 1a7e82efaa8a ("drm/i915/tgl: Add HBR and HBR2+ voltage swing table")
> * commit 80907edcc6ed ("UBUNTU: SAUCE: drm/i915/bios: add intel_bios_hdmi_level_shift()")
> * commit 6df896896c8d ("drm/i915/tgl: Implement WA_16011163337")
> * commit cb730fe971f0 ("drm/i915/tgl: Update TC DP vswing table")
> 
> [Test]
> The WD19TB can output HDMI/DP to external monitor.
> 
> [Regression Potential]
> Medium, in order to support TGL platform, we also include two patches:
> drm/i915/bios: add intel_bios_hdmi_level_shift()
> drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed
> The two patches are not related to TGL, but for dependency.
> 
> Clint Taylor (1):
>   drm/i915/tgl: Implement WA_16011163337
> 
> Imre Deak (2):
>   drm/i915/tgl+: Use the correct DP_TP_* register instances in MST
>     encoders
>   drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock
> 
> Jani Nikula (1):
>   UBUNTU: SAUCE: drm/i915/bios: add intel_bios_hdmi_level_shift()
> 
> José Roberto de Souza (3):
>   drm/i915/tgl: Update TC DP vswing table
>   drm/i915/tgl: Add HBR and HBR2+ voltage swing table
>   drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed
> 
>  drivers/gpu/drm/i915/display/intel_bios.c     |  16 ++
>  drivers/gpu/drm/i915/display/intel_bios.h     |   2 +
>  drivers/gpu/drm/i915/display/intel_ddi.c      | 169 +++++++-----------
>  drivers/gpu/drm/i915/display/intel_display.c  |   1 -
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c |  13 +-
>  drivers/gpu/drm/i915/display/intel_psr.c      |  45 +++++
>  drivers/gpu/drm/i915/gt/intel_workarounds.c   |  11 +-
>  drivers/gpu/drm/i915/i915_reg.h               |   2 +
>  8 files changed, 144 insertions(+), 115 deletions(-)
>
Juerg Haefliger July 8, 2020, 10:06 a.m. UTC | #3
On Wed, 8 Jul 2020 08:43:59 +0300
Timo Aaltonen <tjaalton@ubuntu.com> wrote:

> On 3.7.2020 13.10, Hsuan-Yu Lin wrote:
> > BugLink: https://bugs.launchpad.net/bugs/1886165
> > 
> > [Impact]
> > TGL platform can't output external monitor on WD19TB docking.
> > There's no screen on the external monitor.
> > error in dmesg:
> > 
> > [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underru
> > 
> > [Fix]
> > According to Intel's suggestion,
> > we need this: https://patchwork.freedesktop.org/series/78909/
> > Also for dependency, the following patches are landed in drm-tip
> > and necessary for support TGL platform:
> > 
> > * commit f4ece33f51d8 ("drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock")
> > * commit a6e96d6948c8 ("drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders")
> > * commit f822a79734e1 ("drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed")
> > * commit 1a7e82efaa8a ("drm/i915/tgl: Add HBR and HBR2+ voltage swing table")
> > * commit 80907edcc6ed ("UBUNTU: SAUCE: drm/i915/bios: add intel_bios_hdmi_level_shift()")
> > * commit 6df896896c8d ("drm/i915/tgl: Implement WA_16011163337")
> > * commit cb730fe971f0 ("drm/i915/tgl: Update TC DP vswing table")  
> 
> Applied to oem-5.6-next, thanks

Oh. No 2 ACKs required for the OEM kernel?

...Juerg

 
> We need to add this to groovy kernel too, at least once it's mainline.
>
Timo Aaltonen July 8, 2020, 12:20 p.m. UTC | #4
On 8.7.2020 13.05, Juerg Haefliger wrote:
> The subject does not call out the series. Focal? Bionic? Something else?

fair point, but oem-5.6 is focal-only
Timo Aaltonen July 8, 2020, 12:40 p.m. UTC | #5
On 8.7.2020 13.06, Juerg Haefliger wrote:
> On Wed, 8 Jul 2020 08:43:59 +0300
> Timo Aaltonen <tjaalton@ubuntu.com> wrote:
> 
>> On 3.7.2020 13.10, Hsuan-Yu Lin wrote:
>>> BugLink: https://bugs.launchpad.net/bugs/1886165
>>>
>>> [Impact]
>>> TGL platform can't output external monitor on WD19TB docking.
>>> There's no screen on the external monitor.
>>> error in dmesg:
>>>
>>> [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underru
>>>
>>> [Fix]
>>> According to Intel's suggestion,
>>> we need this: https://patchwork.freedesktop.org/series/78909/
>>> Also for dependency, the following patches are landed in drm-tip
>>> and necessary for support TGL platform:
>>>
>>> * commit f4ece33f51d8 ("drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock")
>>> * commit a6e96d6948c8 ("drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders")
>>> * commit f822a79734e1 ("drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed")
>>> * commit 1a7e82efaa8a ("drm/i915/tgl: Add HBR and HBR2+ voltage swing table")
>>> * commit 80907edcc6ed ("UBUNTU: SAUCE: drm/i915/bios: add intel_bios_hdmi_level_shift()")
>>> * commit 6df896896c8d ("drm/i915/tgl: Implement WA_16011163337")
>>> * commit cb730fe971f0 ("drm/i915/tgl: Update TC DP vswing table")  
>>
>> Applied to oem-5.6-next, thanks
> 
> Oh. No 2 ACKs required for the OEM kernel?
> 
> ...Juerg

In general yes, but at least when it's for a respin with a deadline,
it's not realistic..
Juerg Haefliger July 8, 2020, 1:57 p.m. UTC | #6
On Wed, 8 Jul 2020 15:40:01 +0300
Timo Aaltonen <tjaalton@ubuntu.com> wrote:

> On 8.7.2020 13.06, Juerg Haefliger wrote:
> > On Wed, 8 Jul 2020 08:43:59 +0300
> > Timo Aaltonen <tjaalton@ubuntu.com> wrote:
> >   
> >> On 3.7.2020 13.10, Hsuan-Yu Lin wrote:  
> >>> BugLink: https://bugs.launchpad.net/bugs/1886165
> >>>
> >>> [Impact]
> >>> TGL platform can't output external monitor on WD19TB docking.
> >>> There's no screen on the external monitor.
> >>> error in dmesg:
> >>>
> >>> [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe B FIFO underru
> >>>
> >>> [Fix]
> >>> According to Intel's suggestion,
> >>> we need this: https://patchwork.freedesktop.org/series/78909/
> >>> Also for dependency, the following patches are landed in drm-tip
> >>> and necessary for support TGL platform:
> >>>
> >>> * commit f4ece33f51d8 ("drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clock")
> >>> * commit a6e96d6948c8 ("drm/i915/tgl+: Use the correct DP_TP_* register instances in MST encoders")
> >>> * commit f822a79734e1 ("drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed")
> >>> * commit 1a7e82efaa8a ("drm/i915/tgl: Add HBR and HBR2+ voltage swing table")
> >>> * commit 80907edcc6ed ("UBUNTU: SAUCE: drm/i915/bios: add intel_bios_hdmi_level_shift()")
> >>> * commit 6df896896c8d ("drm/i915/tgl: Implement WA_16011163337")
> >>> * commit cb730fe971f0 ("drm/i915/tgl: Update TC DP vswing table")    
> >>
> >> Applied to oem-5.6-next, thanks  
> > 
> > Oh. No 2 ACKs required for the OEM kernel?
> > 
> > ...Juerg  
> 
> In general yes, but at least when it's for a respin with a deadline,
> it's not realistic..

In that case why don't you just shove them in rather than sending them to the
ML, so that people don't waste their time trying to review them??

...Juerg


>
Hsuan-Yu Lin July 9, 2020, 3:46 a.m. UTC | #7
Hi Juerg:

As Timo stated, oem-5.6 is for focal-only, and for now, TGL patches we
don't have the intention to backport for bionic,
as we will have more potential risk because most of them are DRM patches.

Regards,
Shane


On Wed, Jul 8, 2020 at 8:20 PM Timo Aaltonen <tjaalton@ubuntu.com> wrote:
>
> On 8.7.2020 13.05, Juerg Haefliger wrote:
> > The subject does not call out the series. Focal? Bionic? Something else?
>
> fair point, but oem-5.6 is focal-only
>
>
> --
> t